The POWER6 is a
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
developed by
IBM that implemented the
Power ISA v.2.03. When it became available in systems in 2007, it succeeded the
POWER5+ as IBM's flagship Power microprocessor. It is claimed to be part of the eCLipz project, said to have a goal of converging IBM's server hardware where practical (hence "ipz" in the acronym:
iSeries,
pSeries
The IBM System p is a high-end line of RISC (Power)/UNIX-based servers. It was the successor of the RS/6000 line, and predecessor of the IBM Power Systems server series.
History
The previous RS/6000 line was originally a line of workstations an ...
, and
zSeries
IBM Z is a family name used by IBM for all of its z/Architecture mainframe computers.
In July 2017, with another generation of products, the official family was changed to IBM Z from IBM z Systems; the IBM Z family now includes the newest mo ...
).
![Power6 ceramic base](https://upload.wikimedia.org/wikipedia/commons/4/45/Power6_ceramic_base.jpg)
History
POWER6 was described at the
International Solid-State Circuits Conference (ISSCC) in February 2006, and additional details were added at the Microprocessor Forum in October 2006 and at the next ISSCC in February 2007. It was formally announced on May 21, 2007. It was released on June 8, 2007 at speeds of 3.5, 4.2 and 4.7 GHz,
but the company has noted prototypes have reached 6 GHz. POWER6 reached first silicon in the middle of 2005, and was bumped to 5.0 GHz in May 2008 with the introduction of the P595.
Description
The POWER6 is a
dual-core
A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such a ...
processor. Each core is capable of two-way
simultaneous multithreading
Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better use the resources provided by modern process ...
(SMT). The POWER6 has approximately 790 million transistors and is 341 mm
2 large fabricated on a
65 nm
The 65 nm process is an advanced lithographic node used in volume CMOS ( MOSFET) semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitc ...
process. A notable difference from
POWER5 is that the POWER6 executes instructions in-order instead of
out-of-order. This change often requires software to be recompiled for optimal performance, but the POWER6 still achieves significant performance improvements over the POWER5+ even with unmodified software, according to the lead engineer on the POWER6 project.
POWER6 also takes advantage of
ViVA-2, Virtual Vector Architecture, which enables the combination of several POWER6 nodes to act as a single
vector processor
In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and effectively on large one-dimensional arrays of data called ...
.
Each core has two
integer units, two
binary
Binary may refer to:
Science and technology Mathematics
* Binary number, a representation of numbers using only two digits (0 and 1)
* Binary function, a function that takes two arguments
* Binary operation, a mathematical operation that t ...
floating-point unit
In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...
s, an
AltiVec unit, and a novel
decimal
The decimal numeral system (also called the base-ten positional numeral system and denary or decanary) is the standard system for denoting integer and non-integer numbers. It is the extension to non-integer numbers of the Hindu–Arabic numeral ...
floating-point unit. The binary floating-point unit incorporates "many microarchitectures, logic, circuit, latch and integration techniques to achieve
6-cycle, 13-
FO4 pipeline", according to a company paper.
Unlike the servers from IBM's competitors, the POWER6 has hardware support for
IEEE 754
The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point arithmetic established in 1985 by the Institute of Electrical and Electronics Engineers (IEEE). The standard addressed many problems found i ...
decimal arithmetic and includes the first decimal
floating-point
In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...
unit integrated in silicon. More than 50 new floating point instructions handle the decimal math and conversions between
binary
Binary may refer to:
Science and technology Mathematics
* Binary number, a representation of numbers using only two digits (0 and 1)
* Binary function, a function that takes two arguments
* Binary operation, a mathematical operation that t ...
and
decimal
The decimal numeral system (also called the base-ten positional numeral system and denary or decanary) is the standard system for denoting integer and non-integer numbers. It is the extension to non-integer numbers of the Hindu–Arabic numeral ...
.
This feature was also added to the
z10 microprocessor featured in the
System z10
A system is a group of interacting or interrelated elements that act according to a set of rules to form a unified whole. A system, surrounded and influenced by its environment, is described by its boundaries, structure and purpose and expressed ...
.
Each core has a 64 KB, four-way set-associative instruction cache and a 64 KB data cache of an eight-way set-associative design with a two-stage pipeline supporting two independent 32-bit reads or one 64-bit write per cycle.
Each core has semi-private 4
MiB
The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit ...
unified
L2 cache, where the cache is assigned a specific core, but the other has a fast access to it. The two cores share a 32 MiB
L3 cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
which is off die, using an 80 GB/s bus.
POWER6 can connect to up to 31 other processors using two inter node links (50 GB/s), and supports up to 10 logical partitions per core (up to a limit of 254 per system). There is an interface to a service processor that monitors and adjusts performance and power according to set parameters.
IBM also makes use of a 5 GHz duty-cycle correction clock distribution network for the processor. In the network, the company implements a copper distribution wire that is 3 μm wide and 1.2 μm thick. The POWER6 design uses dual power supplies, a logic supply in the 0.8-to-1.2 Volt range and an SRAM power supply at about 150-mV higher.
The thermal characteristics of POWER6 are similar to that of the
POWER5.
Dr Frank Soltis, an IBM chief scientist, said IBM had solved power leakage problems associated with high frequency by using a combination of
90 nm and 65 nm parts in the POWER6 design.
POWER6+
The slightly enhanced POWER6+ was introduced in April 2009, but had been shipping in
Power 560 and 570 systems since October 2008. It added more memory keys for secure
memory partition, a feature taken from IBM's
mainframe processors.
Products
, the range of POWER6 systems includes "Express" models (the 520, 550 and 560) and Enterprise models (the 570 and 595). The various system models are designed to serve any sized business.
For example, the 520 Express is marketed to small businesses while the Power 595 is marketed for large, multi-environment data centers.
The main difference between the Express and Enterprise models is that the latter include Capacity Upgrade on Demand (CUoD) capabilities and hot-pluggable processor and memory "books".
IBM also offers four POWER6 based
blade server
A blade server is a stripped-down server computer with a modular design optimized to minimize the use of physical space and energy. Blade servers have many components removed to save space, minimize power consumption and other considerations, whil ...
s.
Specifications are shown in the table below.
All blades support AIX, i, and Linux. The BladeCenter S and H chassis is supported for blades running AIX, i, and Linux. The BladeCenter E, HT, and T chassis support blades running AIX and Linux but not i.
At the SuperComputing 2007 (SC07) conference in Reno a new water-cooled Power 575 was revealed. The 575 is composed of 2U "nodes" each with 32 POWER6 cores at 4.7 GHz with up to 256 GB of RAM. Up to 448 cores can be installed in a single frame.
See also
*
IBM Power microprocessors
*
POWER7
*
z10, a
mainframe
A mainframe computer, informally called a mainframe or big iron, is a computer used primarily by large organizations for critical applications like bulk data processing for tasks such as censuses, industry and consumer statistics, enterprise ...
processor sharing much technology with the POWER6.
References
External links
IBM POWER6 Press Kit*
*
*
*
*
Recommended reading
POWER Roadmap, IBM, Oct 2006*
*
*
*
*
*
*
* "POWER: The Sixth Generation". (30 October 2006). ''
Microprocessor Report''.
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IBM microprocessors
Power microprocessors
Computer-related introductions in 2007
64-bit microprocessors