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ZSeries
IBM Z is a family name used by IBM for all of its z/Architecture mainframe computers. In July 2017, with another generation of products, the official family was changed to IBM Z from IBM z Systems; the IBM Z family now includes the newest model, the IBM z16, as well as the z15, the z14, and the z13 (released under the IBM z Systems/IBM System z names), the IBM zEnterprise models (in common use the zEC12 and z196), the IBM System z10 models (in common use the z10 EC), the IBM System z9 models (in common use the z9EC) and ''IBM eServer zSeries'' models (in common use refers only to the z900 and z990 generations of mainframe). Architecture The ''zSeries,'' ''zEnterprise,'' ''System z'' and ''IBM Z'' families were named for their availability – ''z'' stands for zero downtime. The systems are built with spare components capable of hot failovers to ensure continuous operations. The IBM Z family maintains full backward compatibility. In effect, current systems are the direc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
IBM System Z9
IBM System z9 is a line of IBM mainframe computers. The first models were available on September 16, 2005. The System z9 also marks the end of the previously used eServer zSeries naming convention. It was also the last mainframe computer that NASA ever used. Background System z9 is a mainframe using the z/Architecture, previously known as ESAME. z/Architecture is a 64-bit architecture which replaces the previous 31-bit-addressing/32-bit-data ESA/390 architecture while remaining completely compatible with it as well as the older 24-bit-addressing/32-bit-data System/360 architecture. The primary advantage of this arrangement is that memory intensive applications like DB2 are no longer bounded by 31-bit memory restrictions while older applications can run without modifications. Name change With the announcement of the System z9 Business Class server, IBM has renamed the System z9 109 as the System z9 Enterprise Class server. IBM documentation abbreviates them as the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Mainframe Computer
A mainframe computer, informally called a mainframe or big iron, is a computer used primarily by large organizations for critical applications like bulk data processing for tasks such as censuses, industry and consumer statistics, enterprise resource planning, and large-scale transaction processing. A mainframe computer is large but not as large as a supercomputer and has more processing power than some other classes of computers, such as minicomputers, servers, workstations, and personal computers. Most large-scale computer-system architectures were established in the 1960s, but they continue to evolve. Mainframe computers are often used as servers. The term ''mainframe'' was derived from the large cabinet, called a ''main frame'', that housed the central processing unit and main memory of early computers. Later, the term ''mainframe'' was used to distinguish high-end commercial computers from less powerful machines. Design Modern mainframe design is characterized less ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Z Application Assist Processor
The IBM System z Application Assist Processor (zAAP), previously known as the zSeries Application Assist Processor, is a mainframe processor introduced by IBM in 2004. zAAP engines are dedicated to running specific Java and XML workloads under z/OS, accelerating performance. zAAPs are available for zSeries 990 and 890 servers and later zSeries and zEnterprise models. Beginning with the IBM z13, the zAAP functionality is integrated with zIIP processors (zAAP on zIIP). Currently a zAAP engine contains the same underlying hardware as any other mainframe engine. However, IBM uses microcode to limit code execution to Java and XML workloads only. As with Integrated Facility for Linux (IFL) and zIIP, zAAPs are not specifically optimized to run Java faster or better. IBM does not change the "software model" or MSU rating on its mainframes with the installation of zAAPs. Consequently, IBM's customers do not incur software license charges for their zAAPs, reducing their costs of running ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Coupling Facility
In IBM System/390 and IBM Z mainframe computers, a Coupling Facility or CF is a piece of computer hardware or virtual machine that coordinates multiple processors. A Parallel Sysplex relies on one or more Coupling Facilities (CFs). A coupling facility is a mainframe processor (runs in an own LPAR, with dedicated physical CP, defined through Hardware Management Console (HMC)), with memory and special channels (CF Links), and a specialized operating system called Coupling Facility Control Code (CFCC). It has no I/O devices, other than the CF links. The information in the CF resides entirely in memory as CFCC is not a virtual memory operating system. A CF typically has a large memory – of the order of several tens of gigabytes. The CF runs no application software. When originally introduced, the CFCC executed in a separate 9674 mainframe unit that was essentially a processor without I/O facilities other than the CF links. Later IBM enabled the use of an Internal Coupling Fa ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Hypervisor
A hypervisor (also known as a virtual machine monitor, VMM, or virtualizer) is a type of computer software, firmware or hardware that creates and runs virtual machines. A computer on which a hypervisor runs one or more virtual machines is called a ''host machine'', and each virtual machine is called a ''guest machine''. The hypervisor presents the guest operating systems with a virtual operating platform and manages the execution of the guest operating systems. Unlike an emulator, the guest executes most instructions on the native hardware. Multiple instances of a variety of operating systems may share the virtualized hardware resources: for example, Linux, Windows, and macOS instances can all run on a single physical x86 machine. This contrasts with operating-system–level virtualization, where all instances (usually called ''containers'') must share a single kernel, though the guest operating systems can differ in user space, such as different Linux distributions with the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System/370
The IBM System/370 (S/370) is a model range of IBM mainframe computers announced on June 30, 1970, as the successors to the System/360 family. The series mostly maintains backward compatibility with the S/360, allowing an easy migration path for customers; this, plus improved performance, were the dominant themes of the product announcement. In September 1990, the System/370 line was replaced with the System/390. Evolution The original System/370 line was announced on June 30, 1970, with first customer shipment of the Models 155 and 165 planned for February 1971 and April 1971 respectively. The 155 first shipped in January 1971. System/370 underwent several architectural improvements during its roughly 20-year lifetime. The following features mentioned in Principles of Operation are either optional on S/360 but standard on S/370, introduced with S/370 or added to S/370 after announcement. *Branch and Save *Channel Indirect Data Addressing *Channel-Set Switching *Clear I/O *C ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
LPAR
A logical partition (LPAR) is a subset of a computer's hardware resources, virtualized as a separate computer. In effect, a physical machine can be partitioned into multiple logical partitions, each hosting a separate instance of an operating system. PR/SM Although the terms ''PR/SM'' and ''LPAR'' are often used interchangeably in IBM Z, including in IBM documentation, ''PR/SM'' was not present in the IBM 370/168's Virtual Machine Facility/370; it came in with the IBM 3090, years later. Formally, LPAR designates the mode of operation or an individual logical partition, whereas PR/SM is the commercial designation of the feature. In mainframe computing PR/SM (Processor Resource/System Manager) is a type-1 Hypervisor (a virtual machine monitor) that allows multiple logical partitions to share physical resources such as CPUs, I/O channels and LAN interfaces; when sharing channels, the LPARs can share I/O devices such as direct access storage devices (DASD). PR/SM is integra ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Z/Architecture
z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture-based system, the z900, in late 2000. Later z/Architecture systems include the IBM z800, z990, z890, System z9, System z10, zEnterprise 196, zEnterprise 114, zEC12, zBC12, z13, z14, z15 and z16. z/Architecture retains backward compatibility with previous 32-bit-data/31-bit-addressing architecture ESA/390 and its predecessors all the way back to the 32-bit-data/24-bit-addressing System/360. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture will be unaffected by this change. Each z/OS address space, called a 64-bit address space, is 16 exabytes in size. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
IBM System Z10
IBM System z10 is a line of IBM mainframes. The z10 Enterprise Class (EC) was announced on February 26, 2008. On October 21, 2008, IBM announced the z10 Business Class (BC), a scaled-down version of the z10 EC. The System z10 represents the first model family powered by the z10 quad core processing engine. Its successors are the zEnterprise System models introduced in 2010 and 2012. Features Processors The number of "characterizable" (or configurable) processing units (PUs) is indicated in the ''hardware'' model designation (e.g., the E26 has 26 characterizable PUs). Depending on the ''capacity'' model, a PU can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), or Internal Coupling Facility (ICF) processor. (The specialty processors are all identical and IBM locks out certain functions based on what the processor is characterized as.) It is also ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Neural Net
Artificial neural networks (ANNs), usually simply called neural networks (NNs) or neural nets, are computing systems inspired by the biological neural networks that constitute animal brains. An ANN is based on a collection of connected units or nodes called artificial neurons, which loosely model the neurons in a biological brain. Each connection, like the synapses in a biological brain, can transmit a signal to other neurons. An artificial neuron receives signals then processes them and can signal neurons connected to it. The "signal" at a connection is a real number, and the output of each neuron is computed by some non-linear function of the sum of its inputs. The connections are called ''edges''. Neurons and edges typically have a ''weight'' that adjusts as learning proceeds. The weight increases or decreases the strength of the signal at a connection. Neurons may have a threshold such that a signal is sent only if the aggregate signal crosses that threshold. Typically, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
IBM Z15 (microprocessor)
The z15 is a microprocessor made by IBM for their z15 mainframe computers, announced on September 12, 2019. Description The Processor Unit chip (PU chip) has 12 cores. The z15 cores support two-way simultaneous multithreading. The cores implement the CISC z/Architecture with a superscalar, out-of-order pipeline. New in z15 is an on-chip Nest Accelerator Unit, shared by all cores, to accelerate compression. The cache (e.g. level 3) is doubled from the previous generation z14, while the "L4 Cache increased from 672MB to 960MB, or +43%" with the new add-on chip System Controller (SC) SCM. Both it and all levels of cache in the main processor from level 1 use eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ..., instead of the traditionally used SRAM. "A five-CPC drawer sy ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
IBM Z14 (microprocessor)
The z14 is a microprocessor made by IBM for their z14 mainframe computers, announced on July 17, 2017. Manufactured at GlobalFoundries' East Fishkill, New York fabrication plant. IBM stated that it is the world's fastest microprocessor by clock rate at 5.2 GHz, with a 10% increased performance per core and 30% for the whole chip compared to its predecessor the z13. Description The Processor Unit chip (PU chip) has an area of 696 mm2 (25.3 × 27.5 mm) and consists of 6.1 billion transistors. It is fabricated using GlobalFoundries' 14 nm FinFET silicon on insulator fabrication process, using 17 layers of metal and supporting speeds of 5.2 GHz, which is higher than its predecessor, the z13. The PU chip has 10 cores but can have 7–10 cores (or "processor units" in IBM's parlance) enabled depending on configuration. The z14 cores support two-way simultaneous multithreading for more applications than previously available. The PU chip is packaged in a singl ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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