The z14 is a

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...

made by IBM for their z14

mainframe computer A mainframe computer, informally called a mainframe or big iron, is a computer used primarily by large organizations for critical applications like bulk data processing for tasks such as censuses, industry and consumer statistics, enterpris ...

s, announced on July 17, 2017. Manufactured at

GlobalFoundries GlobalFoundries Inc. (GF or GloFo) is a multinational semiconductor contract manufacturing and design company incorporated in the Cayman Islands and headquartered in Malta, New York. Created by the divestiture of the manufacturing arm of AMD, th ...

East Fishkill, New York East Fishkill is a town on the southern border of Dutchess County, New York, United States. The population was 29,707 at the 2020 census. The town was once the eastern portion of the town of Fishkill. Hudson Valley Research Park is located in ...

fabrication plant. IBM stated that it is the world's fastest microprocessor by

clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...

at 5.2 GHz, with a 10% increased performance per core and 30% for the whole chip compared to its predecessor the z13.IBM z14 Announced, Support Added To LLVM Clang
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Description

The Processor Unit chip (PU chip) has an area of 696 mm² (25.3 × 27.5 mm) and consists of 6.1 billion

transistor upright=1.4, gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (pink). A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch e ...

s. It is fabricated using GlobalFoundries'

14 nm The 14 nm process refers to the MOSFET technology node that is the successor to the 22nm (or 20nm) node. The 14nm was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following 22nm was expe ...

FinFET A fin field-effect transistor (FinFET) is a multigate device, a MOSFET (metal-oxide-semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, f ...

silicon on insulator In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...

fabrication process Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuit (IC) chips such as modern computer processors, microcontrollers, and memory chips such as NAND flash and DRAM that are p ...

, using 17 layers of metal and supporting speeds of 5.2

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...

, which is higher than its predecessor, the z13. The PU chip has 10 cores but can have 7–10 cores (or "processor units" in IBM's parlance) enabled depending on configuration. The z14 cores support two-way

simultaneous multithreading Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better use the resources provided by modern process ...

for more applications than previously available. The PU chip is packaged in a single-chip module, which is the same as its predecessor, but a departure from previous designs which were mounted on large

multi-chip module A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are int ...

s. A computer drawer consists of six PU chips and one Storage Controller (SC) chip containing the L4 cache. The cores implement the CISC

z/Architecture z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture-b ...

with a

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

, out-of-order

pipeline Pipeline may refer to: Electronics, computers and computing * Pipeline (computing), a chain of data-processing stages or a CPU optimization found on ** Instruction pipelining, a technique for implementing instruction-level parallelism within a s ...

. New in z14 is a

cryptographic Cryptography, or cryptology (from grc, , translit=kryptós "hidden, secret"; and ''graphein'', "to write", or '' -logia'', "study", respectively), is the practice and study of techniques for secure communication in the presence of adve ...

coprocessor A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Operations performed by the coprocessor may be floating-point arithmetic, graphics, signal processing, string processing, cryptography o ...

, called CPACF, attached to each core, used for

random number generation Random number generation is a process by which, often by means of a random number generator (RNG), a sequence of numbers or symbols that cannot be reasonably predicted better than by random chance is generated. This means that the particular outc ...

hashing Hash, hashes, hash mark, or hashing may refer to: Substances * Hash (food), a coarse mixture of ingredients * Hash, a nickname for hashish, a cannabis product Hash mark * Hash mark (sports), a marking on hockey rinks and gridiron football fiel ...

encryption In cryptography, encryption is the process of encoding information. This process converts the original representation of the information, known as plaintext, into an alternative form known as ciphertext. Ideally, only authorized parties can decip ...

and decrypting and compression. Further enhancements include an optimization of the core's pipeline, doubling the on-chip caches, better

branch prediction In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow ...

, a new decimal arithmetic

SIMD Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy. SIMD can be internal (part of the hardware design) and it can be directly accessible through an instruction set architecture (ISA), but it should ...

engine designed to boost

COBOL COBOL (; an acronym for "common business-oriented language") is a compiled English-like computer programming language designed for business use. It is an imperative, procedural and, since 2002, object-oriented language. COBOL is primarily us ...

and

PL/I PL/I (Programming Language One, pronounced and sometimes written PL/1) is a procedural, imperative computer programming language developed and published by IBM. It is designed for scientific, engineering, business and system programming. I ...

code, a "guarded storage facility" that helps

Java Java (; id, Jawa, ; jv, ꦗꦮ; su, ) is one of the Greater Sunda Islands in Indonesia. It is bordered by the Indian Ocean to the south and the Java Sea to the north. With a population of 151.6 million people, Java is the world's List ...

applications during

garbage collection Waste collection is a part of the process of waste management. It is the transfer of solid waste from the point of use and disposal to the point of treatment or landfill. Waste collection also includes the curbside collection of recyclable m ...

, and other enhancements that increase the cores' performance compared to the predecessors. The instruction pipeline has an instruction queue that can fetch 6 instructions per cycle; and issue up to 10 instructions per cycle. Each core has a private 128 KB L1 instruction

cache Cache, caching, or caché may refer to: Places United States * Cache, Idaho, an unincorporated community * Cache, Illinois, an unincorporated community * Cache, Oklahoma, a city in Comanche County * Cache, Utah, Cache County, Utah * Cache County ...

, a private 128 KB L1 data cache, a private 2 MB L2 instruction cache, and a private 4 MB L2 data cache. In addition, there is a 128 MB shared L3 cache implemented in

eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalen ...

. The z14 chip has on board multi-channel DDR4 RAM

memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...

supporting a

RAID Raid, RAID or Raids may refer to: Attack * Raid (military), a sudden attack behind the enemy's lines without the intention of holding ground * Corporate raid, a type of hostile takeover in business * Panty raid, a prankish raid by male college ...

-like configuration to recover from memory faults. The z14 also includes two GX bus as well as two new Gen 3 PCIe controllers for accessing host channel adapters and peripherals. The PU chips has three X-buses for communications to three neighboring PU chips and the SC chip.

Storage Controller

A compute drawer consists of two clusters. Each cluster comprises either two or three PU chips. The two clusters share a single Storage Controller chip (SC chip). Even though each PU chip has 128 MB L3 cache shared by the 10 cores and other on-die facilities, the SC chip adds 672 MB off-die

L4 cache A CPU cache is a hardware cache In computing, a cache ( ) is a hardware or software component that stores data so that future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation ...

shared by the six PU chips in the drawer. The SC chips also handle the communications between the sets of three PU in the drawer as well as communications between drawers using the A-Bus. The SC chip is manufactured on the same 14 nm process as the z14 PU chips, has 17 metal layers, similarly measures 25.3 × 27.5 mm (696 mm²), but consists of 9.7 billion transistors due to amount of L4 memory and runs at half the clock frequency of the PU chip.

References

{{Reflist z14 z14 Computer-related introductions in 2017