![Transputer Evaluation IMSB008 81](https://upload.wikimedia.org/wikipedia/commons/d/d1/Transputer_Evaluation_IMSB008_81.jpg)
The transputer is a series of pioneering
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
s from the 1980s, intended for
parallel computing
Parallel computing is a type of computation in which many calculations or processes are carried out simultaneously. Large problems can often be divided into smaller ones, which can then be solved at the same time. There are several different fo ...
. To support this, each transputer had its own integrated memory and
serial communication
In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are ...
links to exchange data with other transputers. They were designed and produced by
Inmos, a
semiconductor
A semiconductor is a material which has an electrical resistivity and conductivity, electrical conductivity value falling between that of a electrical conductor, conductor, such as copper, and an insulator (electricity), insulator, such as glas ...
company based in
Bristol
Bristol () is a city, ceremonial county and unitary authority in England. Situated on the River Avon, it is bordered by the ceremonial counties of Gloucestershire to the north and Somerset to the south. Bristol is the most populous city in ...
,
United Kingdom
The United Kingdom of Great Britain and Northern Ireland, commonly known as the United Kingdom (UK) or Britain, is a country in Europe, off the north-western coast of the continental mainland. It comprises England, Scotland, Wales and North ...
.
For some time in the late 1980s, many considered the transputer to be the next great design for the future of computing. While the transputer did not achieve this expectation, the transputer architecture was highly influential in provoking new ideas in
computer architecture
In computer engineering, computer architecture is a description of the structure of a computer system made from component parts. It can sometimes be a high-level description that ignores details of the implementation. At a more detailed level, t ...
, several of which have re-emerged in different forms in modern systems.
Background
In the early 1980s, conventional
central processing unit
A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, an ...
s (CPUs) appeared to have reached a performance limit. Up to that time, manufacturing difficulties limited the amount of circuitry that could fit on a chip. Continued improvements in the
fabrication process had largely removed this restriction. Within a decade, chips could hold more circuitry than the designers knew how to use. Traditional
complex instruction set computer
A complex instruction set computer (CISC ) is a computer architecture in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step ...
(CISC) designs were reaching a performance plateau, and it wasn't clear it could be overcome.
[Fuller, Samuel H. & Millett, Lynette I., Editors (2011). ]
The Future of Computing Performance
', CSTB, National Academic Press, p. 84. Retrieved on November 2, 2016.
It seemed that the only way forward was to increase the use of parallelism, the use of several CPUs that would work together to solve several tasks at the same time. This depended on such machines being able to run several tasks at once, a process termed
multitasking. This had generally been too difficult for prior microprocessor designs to handle, but more recent designs were able to accomplish it effectively. It was clear that in the future, this would be a feature of all
operating system
An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs.
Time-sharing operating systems schedule tasks for efficient use of the system and may also in ...
s (OSs).
A side effect of most multitasking design is that it often also allows the processes to be run on physically different CPUs, in which case it is termed
multiprocessing
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system. The term also refers to the ability of a system to support more than one processor or the ability to allocate tasks between them. There ar ...
. A low-cost CPU built for multiprocessing could allow the speed of a machine to be raised by adding more CPUs, potentially far more cheaply than by using one faster CPU design.
The first transputer designs were due to computer scientist
David May and telecommunications consultant Robert Milne. In 1990, May received an Honorary DSc from
University of Southampton
, mottoeng = The Heights Yield to Endeavour
, type = Public research university
, established = 1862 – Hartley Institution1902 – Hartley University College1913 – Southampton University Coll ...
, followed in 1991 by his election as a Fellow of
The Royal Society
The Royal Society, formally The Royal Society of London for Improving Natural Knowledge, is a learned society and the United Kingdom's national academy of sciences. The society fulfils a number of roles: promoting science and its benefits, re ...
and the award of the Patterson Medal of the
Institute of Physics
The Institute of Physics (IOP) is a UK-based learned society and professional body that works to advance physics education, research and application.
It was founded in 1874 and has a worldwide membership of over 20,000. The IOP is the Physica ...
in 1992.
Tony Fuge
Tony may refer to:
People and fictional characters
* Tony (given name), including a list of people and fictional characters
* Gregory Tony (born 1978), American law enforcement officer
* Motu Tony (born 1981), New Zealand international rugby leagu ...
, then a leading engineer at Inmos, was awarded the
Prince Philip Designers Prize
The Prince Philip Designers Prize is an annual design recognition given by the Chartered Society of Designers and originally awarded by Prince Philip, Duke of Edinburgh (1921–2021).
It is the longest running design award in the United Kingdom, h ...
in 1987 for his work on the T414 transputer.
Design
The transputer was the first general purpose microprocessor designed specifically to be used in
parallel computing
Parallel computing is a type of computation in which many calculations or processes are carried out simultaneously. Large problems can often be divided into smaller ones, which can then be solved at the same time. There are several different fo ...
systems. The goal was to produce a family of chips ranging in power and cost that could be wired together to form a complete parallel computer. The name, from "''trans''istor" and "com''puter''"
), was selected to indicate the role the individual transputers would play: numbers of them would be used as basic building blocks, just as
transistor
upright=1.4, gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (pink).
A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch e ...
s had earlier.
Originally the plan was to make the transputer cost only a few dollars per unit. Inmos saw them being used for practically everything, from operating as the main CPU for a computer to acting as a
channel controller
In computing, channel I/O is a high-performance input/output (I/O) architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers. In the past, channels were generally implemented with cus ...
for
disk drive
Disk storage (also sometimes called drive storage) is a general category of storage mechanisms where data is recorded by various electronic, magnetic, optical, or mechanical changes to a surface layer of one or more rotating disks. A disk drive is ...
s in the same machine. In a traditional machine, the processing capability of a disk controller, for instance, would be idle when the disk was not being accessed. In contrast, in a transputer system, spare cycles on any of these transputers could be used for other tasks, greatly increasing the overall performance of the machines.
Even one transputer would have all the circuitry needed to work by itself, a feature more commonly associated with
microcontroller
A microcontroller (MCU for ''microcontroller unit'', often also MC, UC, or μC) is a small computer on a single VLSI integrated circuit (IC) chip. A microcontroller contains one or more CPUs (processor cores) along with memory and programmable i ...
s. The intent was to allow transputers to be connected together as easily as possible, with no need for a complex
bus
A bus (contracted from omnibus, with variants multibus, motorbus, autobus, etc.) is a road vehicle that carries significantly more passengers than an average car or van. It is most commonly used in public transport, but is also in use for cha ...
, or
motherboard
A motherboard (also called mainboard, main circuit board, mb, mboard, backplane board, base board, system board, logic board (only in Apple computers) or mobo) is the main printed circuit board (PCB) in general-purpose computers and other expand ...
. Power and a simple
clock signal
In electronics and especially synchronous digital circuits, a clock signal (historically also known as ''logic beat'') oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
A clock sign ...
had to be supplied, but little else:
random-access memory
Random-access memory (RAM; ) is a form of computer memory that can be read and changed in any order, typically used to store working Data (computing), data and machine code. A Random access, random-access memory device allows data items to b ...
(RAM), a RAM controller, bus support and even a
real-time operating system
A real-time operating system (RTOS) is an operating system (OS) for real-time applications that processes data and events that have critically defined time constraints. An RTOS is distinct from a time-sharing operating system, such as Unix, which m ...
(RTOS) were all built in.
Architecture
The original transputer used a very simple and rather unusual architecture to achieve a high performance in a small area. It used
microcode
In processor design, microcode (μcode) is a technique that interposes a layer of computer organization between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. Microcode is a laye ...
as the main method to control the data path, but unlike other designs of the time, many instructions took only one cycle to execute. Instruction
opcode
In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the operat ...
s were used as the entry points to the microcode
read-only memory
Read-only memory (ROM) is a type of non-volatile memory used in computers and other electronic devices. Data stored in ROM cannot be electronically modified after the manufacture of the memory device. Read-only memory is useful for storing sof ...
(ROM) and the outputs from the ROM were fed directly to the data path. For multi-cycle instructions, while the data path was performing the first cycle, the microcode decoded four possible options for the second cycle. The decision as to which of these options would actually be used could be made near the end of the first cycle. This allowed for very fast operation while keeping the architecture generic.
The
clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
of 20 MHz was quite high for the era and the designers were very concerned about the practicality of distributing such a fast clock signal on a board. A slower external clock of 5 MHz was used, and this was multiplied up to the needed internal frequency using a
phase-locked loop
A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. There are several different types; the simplest is an electronic circuit consisting of a ...
(PLL). The internal clock actually had
four non-overlapping phases and designers were free to use whichever combination of these they wanted, so it could be argued that the transputer actually ran at 80 MHz.
Dynamic logic was used in many parts of the design to reduce area and increase speed. Unfortunately, these methods are difficult to combine with
automatic test pattern generation ATPG (acronym for both Automatic Test Pattern Generation and Automatic Test Pattern Generator) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables automatic t ...
scan testing so they fell out of favour for later designs.
Prentice-Hall published a book on the general principles of the transputer.
Links
The basic design of the transputer included
serial link
In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are s ...
s known as "os-link"s
[
Kazuto Tanaka; Satoshi Iwanami; Takeshi Yamakawa; Chikara Fukunaga; Kazuto Matsui; Takashi Yoshida]
"The Design and Performance of SpaceWire Router-network using CSP"
p. 2.
that allowed it to communicate with up to four other transputers, each at 5, 10, or 20 Mbit/s – which was very fast for the 1980s. Any number of transputers could be connected together over links (which could run tens of metres) to form one computing ''farm''. A hypothetical desktop machine might have two of the "low end" transputers handling
input/output
In computing, input/output (I/O, or informally io or IO) is the communication between an information processing system, such as a computer, and the outside world, possibly a human or another information processing system. Inputs are the signals ...
(I/O) tasks on some of their serial lines (hooked up to appropriate hardware) while they talked to one of their larger cousins acting as a
CPU
A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, and ...
on another.
There were limits to the size of a system that could be built in this fashion. Since each transputer was linked to another in a fixed point-to-point layout, sending messages to a more distant transputer required that messages be relayed by each chip in the line. This introduced a delay with every "hop" over a link, leading to long delays on large nets. To solve this problem Inmos also provided a zero-delay switch that connected up to 32 transputers (or switches) into even larger networks.
Booting
Transputers could boot from memory, as is the case for most computers, but could also be booted
over its network links. A special pin on the chips, BootFromROM, indicated which method it should use. If BootFromROM was asserted when the chip was reset, it would begin processing at the instruction two bytes from the top of memory, which was normally used to perform a backward jump into the boot code. If this pin was not asserted, the chip would instead wait for bytes to be received on any network link. The first byte to be received was the length of the code to follow. Following bytes were copied into low memory and then jumped into once that number of bytes had been received.
The general concept for the system was to have one transputer act as the central authority for booting a system containing a number of connected transputers. The selected transputer would have the BootFromROM permanently asserted, which would cause it to begin running a booter process from ROM on startup. The other transputers would have the BootFromROM tied low, and would simply wait. The loader would boot the central transputer, which would then begin sending boot code to the other transputers in the network, and could customize the code sent to each one, for instance, sending a
device driver
In computing, a device driver is a computer program that operates or controls a particular type of device that is attached to a computer or automaton. A driver provides a software interface to hardware devices, enabling operating systems and ot ...
to the transputer connected to the hard drives.
The system also included the 'special' code lengths of 0 and 1 which were reserved for
PEEK and POKE
In computing, PEEK and POKE are commands used in some high-level programming languages for accessing the contents of a specific memory cell referenced by its memory address. PEEK gets the byte located at the specified memory address.
POKE sets ...
. This allowed inspection and changing of RAM in an unbooted transputer. After a peek, followed by a memory address, or a poke, with an address and single word of data, the transputer would return to waiting for a bootstrap. This mechanism was generally used for debugging.
Scheduler
Added circuitry scheduled traffic over the links. Processes waiting for communications would automatically pause while the networking circuitry finished its reads or writes. Other processes running on the transputer would then be given that processing time. It included two
priority level Priority level or priority, in the Telecommunications Service Priority system, is the level that may be assigned to an NS/EP telecommunications service, which level specifies the order in which provisioning or restoration of the service is to occu ...
s to improve
real-time
Real-time or real time describes various operations in computing or other processes that must guarantee response times within a specified time (deadline), usually a relatively short time. A real-time process is generally one that happens in defined ...
and
multiprocessor
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system. The term also refers to the ability of a system to support more than one processor or the ability to allocate tasks between them. There ar ...
operation. The same logical system was used to communicate between programs running on one transputer, implemented as ''virtual network links'' in memory. So programs asking for any input or output automatically paused while the operation completed, a task that normally required an operating system to handle as the arbiter of hardware. Operating systems on the transputer did not need to handle scheduling; the chip could be considered to have an OS inside it.
Instruction set
To include all this function on one chip, the transputer's core logic was simpler than most CPUs. While some have called it
reduced instruction set computer
In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set comput ...
(RISC) due to its rather sparse nature, and because that was then a desirable marketing
buzzword
A buzzword is a word or phrase, new or already existing, that becomes popular for a period of time. Buzzwords often derive from technical terms yet often have much of the original technical meaning removed through fashionable use, being simply used ...
, it was heavily
microcode
In processor design, microcode (μcode) is a technique that interposes a layer of computer organization between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. Microcode is a laye ...
d, had a limited register set, and complex memory-to-memory instructions, all of which place it firmly in the
CISC camp. Unlike register-heavy
load/store RISC CPUs, the transputer had only three data registers, which behaved as a stack. In addition a workspace pointer pointed to a conventional memory stack, easily accessible via the instructions
Load Local
and
Store Local
. This allowed for very fast
context switch
In computing, a context switch is the process of storing the state of a process or thread, so that it can be restored and resume execution at a later point, and then restoring a different, previously saved, state. This allows multiple processes ...
ing by simply changing the workspace pointer to the memory used by another process (a method used in a number of contemporary designs, such as the
TMS9900
Introduced in June 1976, the TMS9900 was one of the first commercially available, single-chip 16-bit microprocessors. It implemented Texas Instruments' TI-990 minicomputer architecture in a single-chip format, and was initially used for low-end m ...
). The three register stack contents were not preserved past certain instructions, like Jump, when the transputer could do a context switch.
The transputer instruction set consisted of 8-bit instructions assembled from
opcode
In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the operat ...
and
operand
In mathematics, an operand is the object of a mathematical operation, i.e., it is the object or quantity that is operated on.
Example
The following arithmetic expression shows an example of operators and operands:
:3 + 6 = 9
In the above examp ...
nibble
In computing, a nibble (occasionally nybble, nyble, or nybl to match the spelling of byte) is a four-bit aggregation, or half an octet. It is also known as half-byte or tetrade. In a networking or telecommunication context, the nibble is oft ...
s. The ''upper'' nibble contained the 16 possible primary instruction codes, making it one of the very few commercialized
minimal instruction set computer
Minimal instruction set computer (MISC) is a central processing unit (CPU) architecture, usually in the form of a microprocessor, with a very small number of basic operations and corresponding opcodes, together forming an instruction set. Such ...
s. The ''lower'' nibble contained the one immediate constant operand, commonly used as an offset relative to the workspace (memory stack) pointer. Two
prefix
A prefix is an affix which is placed before the Word stem, stem of a word. Adding it to the beginning of one word changes it into another word. For example, when the prefix ''un-'' is added to the word ''happy'', it creates the word ''unhappy'' ...
instructions allowed construction of larger constants by prepending their lower nibbles to the operands of following instructions. Further instructions were supported via the instruction code ''Operate'' (
Opr
), which decoded the constant operand as an extended zero-operand opcode, providing for almost endless and easy instruction set expansion as newer implementations of the transputer were introduced.
The 16 'primary' one-operand instructions were:
All these instructions take a constant, representing an offset or an arithmetic constant. If this constant was less than 16, all these instructions coded to one byte.
The first 16 'secondary' zero-operand instructions (using the OPR primary instruction) were:
Development
![Transputer Standardmodule IMSB404 IMSB418 73](https://upload.wikimedia.org/wikipedia/commons/e/e1/Transputer_Standardmodule_IMSB404_IMSB418_73.jpg)
To provide an easy means of prototyping, constructing and configuring multiple-transputer systems, Inmos introduced the ''TRAM'' (TRAnsputer Module) standard in 1987. A TRAM was essentially a building block
daughterboard
In computing, an expansion card (also called an expansion board, adapter card, peripheral card or accessory card) is a printed circuit board that can be inserted into an electrical connector, or expansion slot (also referred to as a bus slo ...
comprising a transputer and, optionally, external memory and/or peripheral devices, with simple standardised connectors providing power, transputer links, clock and system signals. Various sizes of TRAM were defined, from the basic Size 1 TRAM (3.66 in by 1.05 in) up to Size 8 (3.66 in by 8.75 in). Inmos produced a range of TRAM
motherboard
A motherboard (also called mainboard, main circuit board, mb, mboard, backplane board, base board, system board, logic board (only in Apple computers) or mobo) is the main printed circuit board (PCB) in general-purpose computers and other expand ...
s for various host buses such as
Industry Standard Architecture
Industry Standard Architecture (ISA) is the 16-bit internal bus of IBM PC/AT and similar computers based on the Intel 80286 and its immediate successors during the 1980s. The bus was (largely) backward compatible with the 8-bit bus of the 8 ...
(ISA),
MicroChannel
Micro Channel architecture, or the Micro Channel bus, is a proprietary 16- or 32-bit parallel computer bus introduced by IBM in 1987 which was used on PS/2 and other computers until the mid-1990s. Its name is commonly abbreviated as "MCA", alth ...
, or
VMEbus
VMEbus (Versa Module Europa or Versa Module Eurocard bus) is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. I ...
. TRAM links operate at 10 Mbit/s or 20 Mbit/s.
Software
Transputers were intended to be programmed using the programming language
occam, based on the
communicating sequential processes
In computer science, communicating sequential processes (CSP) is a formal language for describing patterns of interaction in concurrent systems. It is a member of the family of mathematical theories of concurrency known as process algebras, or pro ...
(CSP)
process calculus
In computer science, the process calculi (or process algebras) are a diverse family of related approaches for formally modelling concurrent systems. Process calculi provide a tool for the high-level description of interactions, communications, and ...
. The transputer was built to run
Occam specifically, more than contemporary
CISC designs were built to run languages like
Pascal
Pascal, Pascal's or PASCAL may refer to:
People and fictional characters
* Pascal (given name), including a list of people with the name
* Pascal (surname), including a list of people and fictional characters with the name
** Blaise Pascal, Fren ...
or
C. Occam supported
concurrency
Concurrent means happening at the same time. Concurrency, concurrent, or concurrence may refer to:
Law
* Concurrence, in jurisprudence, the need to prove both ''actus reus'' and ''mens rea''
* Concurring opinion (also called a "concurrence"), a ...
and channel-based inter-process or inter-processor communication as a fundamental part of the language. With the parallelism and communications built into the chip and the language interacting with it directly, writing code for things like device controllers became a triviality; even the most basic code could watch the serial ports for I/O, and would automatically sleep when there was no data.
The initial Occam development environment for the transputer was the Inmos D700 ''Transputer Development System'' (TDS). This was an unorthodox integrated development environment incorporating an editor, compiler, linker and (post-mortem) debugger. The TDS was a transputer application written in Occam. The TDS text editor was notable in that it was a
folding editor
Code or text folding, or less commonly holophrasting, is a feature of some graphical user interfaces that allows the user to selectively hide ("fold") or display ("unfold") parts of a document. This allows the user to manage large amounts of text ...
, allowing blocks of code to be hidden and revealed, to make the structure of the code more apparent. Unfortunately, the combination of an unfamiliar programming language and equally unfamiliar development environment did nothing for the early popularity of the transputer. Later, Inmos would release more conventional Occam cross-compilers, the ''Occam 2 Toolsets''.
Implementations of more mainstream programming languages, such as C,
FORTRAN,
Ada
Ada may refer to:
Places
Africa
* Ada Foah, a town in Ghana
* Ada (Ghana parliament constituency)
* Ada, Osun, a town in Nigeria
Asia
* Ada, Urmia, a village in West Azerbaijan Province, Iran
* Ada, Karaman, a village in Karaman Province, Tur ...
,
Forth
Forth or FORTH may refer to:
Arts and entertainment
* ''forth'' magazine, an Internet magazine
* ''Forth'' (album), by The Verve, 2008
* ''Forth'', a 2011 album by Proto-Kaw
* Radio Forth, a group of independent local radio stations in Scotla ...
, and Pascal were also later released by both Inmos and third-party vendors. These usually included language extensions or libraries providing, in a less elegant way, Occam-like concurrency and channel-based communication.
The transputer's lack of support for virtual memory inhibited the porting of mainstream variants of the
Unix
Unix (; trademarked as UNIX) is a family of multitasking, multiuser computer operating systems that derive from the original AT&T Unix, whose development started in 1969 at the Bell Labs research center by Ken Thompson, Dennis Ritchie, and ot ...
operating system, though ports of
Unix-like
A Unix-like (sometimes referred to as UN*X or *nix) operating system is one that behaves in a manner similar to a Unix system, although not necessarily conforming to or being certified to any version of the Single UNIX Specification. A Unix-li ...
operating systems (such as
Minix and
Idris Idris may refer to:
People
* Idris (name), a list of people and fictional characters with the given name or surname
* Idris (prophet), Islamic prophet in the Qur'an, traditionally identified with Enoch, an ancestor of Noah in the Bible
* Idris G ...
from
Whitesmiths
Whitesmiths Ltd. was a software company founded in New York City by P. J. Plauger, Mark Krieger and Gabriel Pham, and last located in Westford, Massachusetts. It sold a Unix-like operating system called Idris (operating system), Idris, as well as ...
) were produced. An advanced Unix-like
distributed operating system
A distributed operating system is system software over a collection of independent software, networked, communicating, and physically separate computational nodes. They handle jobs which are serviced by multiple CPUs. Each individual node holds a ...
,
HeliOS
In ancient Greek religion and Greek mythology, mythology, Helios (; grc, , , Sun; Homeric Greek: ) is the deity, god and personification of the Sun (Solar deity). His name is also Latinized as Helius, and he is often given the epithets Hyper ...
, was also designed specifically for multi-transputer systems by
Perihelion Software
Perihelion Software Limited was a United Kingdom company founded in 1986 by Dr. Tim King along with a number of colleagues who had all worked together at MetaComCo on AmigaOS and written compilers for both the Amiga and the Atari ST.
Perihelion ...
.
Implementations
The first transputers were announced in 1983 and released in 1984.
In keeping with their role as
microcontroller
A microcontroller (MCU for ''microcontroller unit'', often also MC, UC, or μC) is a small computer on a single VLSI integrated circuit (IC) chip. A microcontroller contains one or more CPUs (processor cores) along with memory and programmable i ...
-like devices, they included on-board RAM and a built-in RAM controller which enabled more memory to be added with no added hardware. Unlike other designs, transputers did not include I/O lines: these were to be added with hardware attached to the existing serial links. There was one 'Event' line, similar to a conventional processor's interrupt line. Treated as a channel, a program could 'input' from the event channel, and proceed only after the event line was asserted.
All transputers ran from an external 5 MHz clock input; this was multiplied to provide the processor clock.
The transputer did not include a
memory management unit
A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit having all memory references passed through itself, primarily performing the translation of virtual memory addresses to physical ad ...
(MMU) or a
virtual memory
In computing, virtual memory, or virtual storage is a memory management technique that provides an "idealized abstraction of the storage resources that are actually available on a given machine" which "creates the illusion to users of a very l ...
system.
Transputer variants (except the cancelled T9000) can be categorised into three groups: the
16-bit
16-bit microcomputers are microcomputers that use 16-bit microprocessors.
A 16-bit register can store 216 different values. The range of integer values that can be stored in 16 bits depends on the integer representation used. With the two mos ...
''T2'' series, the
32-bit
In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32-bit units. Compared to smaller bit widths, 32-bit computers can perform large calculation ...
''T4'' series, and the 32-bit ''T8'' series with 64-bit
IEEE 754
The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point arithmetic established in 1985 by the Institute of Electrical and Electronics Engineers (IEEE). The standard addressed many problems found i ...
floating-point
In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...
support.
T2: 16-bit
![Inmos T225 die](https://upload.wikimedia.org/wikipedia/commons/9/97/Inmos_T225_die.JPG)
The prototype 16-bit transputer was the ''S43'', which lacked the scheduler and DMA-controlled block transfer on the links. At launch, the ''T212'' and ''M212'' (the latter with an on-board disk controller) were the 16-bit offerings. The T212 was available in 17.5 and 20 MHz processor clock speed ratings. The T212 was superseded by the ''T222'', with on-chip RAM expanded from 2 KB to 4 KB, and, later, the ''T225''. This added debugging-
breakpoint
In software development, a breakpoint is an intentional stopping or pausing place in a program, put in place for debugging purposes. It is also sometimes simply referred to as a pause.
More generally, a breakpoint is a means of acquiring knowle ...
support (by extending the instruction "
J 0") plus some extra instructions from the T800 instruction set. Both the T222 and T225 ran at 20 MHz.
T4: 32-bit
![Inmos T425 die](https://upload.wikimedia.org/wikipedia/commons/e/e2/Inmos_T425_die.JPG)
Launched in October 1985, the ''T414'' employed the equivalent of 900,000 transistors and was fabricated with a feature size. It was a 32-bit design, able to process 32-bit units of data and to address up to 4 GB of main memory.
Originally, the first 32-bit variant was to be the ''T424'', but fabrication difficulties meant that this was redesigned as the T414 with 2 KB on-board RAM instead of the intended 4 KB. The T414 was available in 15 and 20 MHz varieties. The RAM was later reinstated to 4 KB on the ''T425'' (in 20, 25, and 30 MHz varieties), which also added the
J 0 breakpoint support and extra T800 instructions. The ''T400'', released in September 1989, was a low-cost 20 MHz T425 derivative with 2 KB and two instead of four links, intended for the
embedded system
An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is ''embedded'' as ...
s market.
T8: floating point
![Inmos T805 die](https://upload.wikimedia.org/wikipedia/commons/0/08/Inmos_T805_die.JPG)
The second-generation ''T800'' transputer, introduced in 1987, had an extended instruction set. The most important addition was a 64-bit
floating-point unit
In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...
(FPU) and three added registers for floating point, implementing the
IEEE 754-1985
IEEE 754-1985 was an industry standard for representing floating-point numbers in computers, officially adopted in 1985 and superseded in 2008 by IEEE 754-2008, and then again in 2019 by minor revision IEEE 754-2019. During its 23 years, it was the ...
floating point standard. It also had 4 KB of on-board RAM and was available in 20 or 25 MHz versions. Breakpoint support was added in the later ''T801'' and ''T805'', the former featuring separate address and data buses to improve performance. The T805 was also later available as a 30 MHz part.
An enhanced ''T810'' was planned, which would have had more RAM, more and faster links, extra instructions, and improved microcode, but this was cancelled around 1990.
Inmos also produced a variety of support chips for the transputer processors, such as the ''C004'' 32-way link switch and the ''C011'' and ''C012'' "link adapters" which allowed transputer links to be interfaced to an 8-bit data bus.
T400
Part of the original Inmos strategy was to make CPUs so small and cheap that they could be combined with other logic in one device. Although a ''
system on a chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
'' (SoC) as they are commonly termed, are ubiquitous now, the concept was almost unheard of back in the early 1980s. Two projects were started in around 1983, the ''M212'' and the ''TV-toy''. The M212 was based on a standard T212 core with the addition of a disk controller for the ST 506 and ST 412 Shugart standards. TV-toy was to be the basis for a
video game console
A video game console is an electronic device that Input/output, outputs a video signal or image to display a video game that can be played with a game controller. These may be home video game console, home consoles, which are generally placed i ...
and was joint project between Inmos and
Sinclair Research
Sinclair Research Ltd is a British consumer electronics company founded by Clive Sinclair in Cambridge. It was originally incorporated in 1973 as Westminster Mail Order Ltd, renamed Sinclair Instrument Ltd, then Science of Cambridge Ltd, the ...
.
The links in the T212 and T414/T424 transputers had hardware DMA engines so that transfers could happen in parallel with execution of other processes. A variant of the design, termed the T400, not to be confused with a later transputer of the same name, was designed where the CPU handled these transfers. This reduced the size of the device considerably since 4 link engines were approximately the same size as the whole CPU. The T400 was intended to be used as a core in what were then called ''systems on silicon'' (SOS) devices, now termed and better known as ''
system on a chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
'' (SoC). It was this design that was to form part of TV-toy. The project was canceled in 1985.
T100
Although the prior SoC projects had had only limited success (the M212 was sold for a time), many designers still firmly believed in the concept and in 1987, a new project, the T100 was started which combined an 8-bit version of the transputer CPU with configurable logic based on state machines. The transputer instruction set is based on 8-bit instructions and can easily be used with any word size which is a multiple of 8 bits. The target market for the T100 was to be bus controllers such as Futurebus, and an upgrade for the standard link adapters (C011 etc.). The project was stopped when the T840 (later to become the basis of the T9000) was started.
File:KL inmos IMST212 ES.jpg, Inmos T212, PREQUAL
File:KL inmos IMST222 ES.jpg, Inmos T222, PREQUAL
File:KL STMicroelectronics_IMST225.jpg, STMicroelectronics IMST225 (Inmos T225)
File:KL inmos IMST400.jpg, Inmos T400
File:KL inmos IMST414.jpg, Inmos T414
File:KL inmos IMST425.jpg, Inmos T425
File:KL inmos IMST800 ES.jpg, Inmos T800, PREQUAL
File:KL STMicroelectronics IMST805.jpg, STMicroelectronics IMST805 (Inmos T805)
TPCORE
TPCORE is an implementation of the transputer, including the os-links, that runs in a FPGA.
T9000
Inmos improved on the performance of the T8 series transputers with the introduction of the ''T9000'' (code-named ''H1'' during development). The T9000 shared most features with the T800, but moved several pieces of the design into hardware and added several features for
superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...
support. Unlike the earlier models, the T9000 had a true 16 KB high-speed
cache
Cache, caching, or caché may refer to:
Places United States
* Cache, Idaho, an unincorporated community
* Cache, Illinois, an unincorporated community
* Cache, Oklahoma, a city in Comanche County
* Cache, Utah, Cache County, Utah
* Cache Count ...
(using random replacement) instead of RAM, but also allowed it to be used as memory and included MMU-like functionality to handle all of this (termed the ''PMI''). For more speed the T9000 cached the top 32 locations of the stack, instead of three as in earlier versions.
The T9000 used a five-stage pipeline for even more speed. An interesting addition was the ''grouper'' which would collect instructions out of the cache and group them into larger packages of up to 8 bytes to feed the pipeline faster. Groups then completed in one cycle, as if they were single larger instructions working on a faster CPU.
The link system was upgraded to a new 100 MHz mode, but unlike the prior systems, the links were no longer downwardly compatible. This new packet-based link protocol was called ''DS-Link'', and later formed the basis of the
IEEE 1355
IEEE Standard 1355-1995, IEC 14575, or ISO 14575 is a data communications standard for Heterogeneous Interconnect (HIC).
IEC 14575 is a low-cost, low latency, scalable serial interconnection system, originally intended for communication between la ...
serial interconnect standard. The T9000 also added link routing hardware called the ''VCP'' (Virtual Channel Processor) which changed the links from point-to-point to a true network, allowing for the creation of any number of ''virtual channels'' on the links. This meant programs no longer had to be aware of the physical layout of the connections. A range of DS-Link support chips were also developed, including the ''C104'' 32-way crossbar switch, and the ''C101'' link adapter.
Long delays in the T9000's development meant that the faster load/store designs were already outperforming it by the time it was to be released. It consistently failed to reach its own performance goal of beating the T800 by a factor of ten. When the project was finally cancelled it was still achieving only about 36 MIPS at 50 MHz. The production delays gave rise to the quip that the best host architecture for a T9000 was an overhead projector.
This was too much for Inmos, which did not have the funding needed to continue development. By this time, the company had been sold to SGS-Thomson (now
STMicroelectronics
STMicroelectronics N.V. commonly referred as ST or STMicro is a Dutch multinational corporation and technology company of French-Italian origin headquartered in Plan-les-Ouates near Geneva, Switzerland and listed on the French stock market. ST ...
), whose focus was the embedded systems market, and eventually the T9000 project was abandoned. However, a comprehensively redesigned 32-bit transputer intended for embedded applications, the ''ST20'' series, was later produced, using some technology developed for the T9000. The ST20 core was incorporated into chipsets for
set-top box
A set-top box (STB), also colloquially known as a cable box and historically television decoder, is an information appliance device that generally contains a TV-tuner input and displays output to a television set and an external source of sign ...
and
Global Positioning System
The Global Positioning System (GPS), originally Navstar GPS, is a satellite-based radionavigation system owned by the United States government and operated by the United States Space Force. It is one of the global navigation satellite sy ...
(GPS) applications.
ST20
Although not strictly a transputer, the ST20 was heavily influenced by the T4 and T9 and formed the basis of the T450, which was arguably the last of the transputers. The mission of the ST20 was to be a reusable core in the then emerging SoC market. The original name of the ST20 was the Reusable Micro Core (RMC). The architecture was loosely based on the original T4 architecture with a microcode-controlled data path. However, it was a full redesign, using
VHDL
The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates ...
as the design language and with an optimized (and rewritten) microcode compiler. The project was conceived as early as 1990 when it was realized that the T9 would be too big for many applications. Actual design work started in mid-1992. Several trial designs were done, ranging from a very simple RISC-style CPU with complex instructions implemented in software via traps to a rather complex superscalar design similar in concept to the
Tomasulo algorithm
Tomasulo's algorithm is a computer architecture hardware algorithm for dynamic scheduling of instructions that allows out-of-order execution and enables more efficient use of multiple execution units. It was developed by Robert Tomasulo at IBM in ...
. The final design looked very similar to the original T4 core although some simple instruction grouping and a ''workspace cache'' were added to help with performance.
Adoption
While the transputer was simple but powerful compared to many contemporary designs, it never came close to meeting its goal of being used universally in both CPU and microcontroller roles. In the microcontroller market, the market was dominated by 8-bit machines where cost was the most serious consideration. Here, even the T2s were too powerful and costly for most users.
In the
computer desktop
In computing, a desktop environment (DE) is an implementation of the desktop metaphor made of a bundle of programs running on top of a computer operating system that share a common graphical user interface (GUI), sometimes described as a graphica ...
and
workstation
A workstation is a special computer designed for technical or scientific applications. Intended primarily to be used by a single user, they are commonly connected to a local area network and run multi-user operating systems. The term ''workstat ...
field, the transputer was fairly fast (operating at about 10 million
instructions per second
Instructions per second (IPS) is a measure of a computer's processor speed. For complex instruction set computers (CISCs), different instructions take different amounts of time, so the value measured depends on the instruction mix; even for compa ...
(MIPS) at 20 MHz). This was excellent performance for the early 1980s, but by the time the
floating-point unit
In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...
(FPU) equipped T800 was shipping, other RISC designs had surpassed it. This could have been mitigated to a large extent if machines had used multiple transputers as planned, but T800s cost about $400 each when introduced, which meant a poor price/performance ratio. Few transputer-based workstation systems were designed; the most notable likely being the
Atari Transputer Workstation.
The transputer was more successful in the field of
massively parallel
Massively parallel is the term for using a large number of computer processors (or separate computers) to simultaneously perform a set of coordinated computations in parallel. GPUs are massively parallel architecture with tens of thousands of t ...
computing, where several vendors produced transputer-based systems in the late 1980s. These included
Meiko Scientific
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the Inmos transputer microprocessor.
History
In 1985, when Inmos management suggested the release of the transputer be ...
(founded by ex-Inmos employees),
Floating Point Systems
Floating Point Systems, Inc. (FPS), was a Beaverton, Oregon vendor of attached array processors and minisupercomputers. The company was founded in 1970 by former Tektronix engineer Norm Winningstad, with partners Tom Prince, Frank Bouton and Robert ...
,
Parsytec
ISRA VISION PARSYTEC AG is a company of ISRA VISION AG and was founded in 1985 as Parsytec (PARallel SYstem TEChnology) in Aachen, Germany.
Parsytec has become known in the late 1980s and early 1990s as a manufacturer of transputer-based paralle ...
, and Parsys. Several British academic institutions founded research activities in the application of transputer-based parallel systems, including
Bristol Polytechnic
The University of the West of England (also known as UWE Bristol) is a public research university, located in and around Bristol, England.
The institution was know as the Bristol Polytechnic in 1970; it received university status in 1992 and ...
's Bristol Transputer Centre and the
University of Edinburgh
The University of Edinburgh ( sco, University o Edinburgh, gd, Oilthigh Dhùn Èideann; abbreviated as ''Edin.'' in post-nominals) is a public research university based in Edinburgh, Scotland. Granted a royal charter by King James VI in 15 ...
's
Edinburgh Concurrent Supercomputer
The Edinburgh Concurrent Supercomputer (ECS) was a large Meiko Computing Surface supercomputer. This transputer-based, massively parallel system was installed at the University of Edinburgh during the late 1980s and early 1990s.
History
Follow ...
Project. Also, the Data Acquisition and Second Level Trigger systems of the High Energy Physics
ZEUS
Zeus or , , ; grc, Δῐός, ''Diós'', label=Genitive case, genitive Aeolic Greek, Boeotian Aeolic and Doric Greek#Laconian, Laconian grc-dor, Δεύς, Deús ; grc, Δέος, ''Déos'', label=Genitive case, genitive el, Δίας, ''D ...
Experiment for the
Hadron Elektron Ring Anlage
HERA (german: Hadron-Elektron-Ringanlage, en, Hadron-Electron Ring Accelerator) was a particle accelerator at DESY in Hamburg. It began operating in 1992. At HERA, electrons or positrons were collided with protons at a center of mass energy ...
(HERA) collider at
DESY
The Deutsches Elektronen-Synchrotron (English ''German Electron Synchrotron''), commonly referred to by the abbreviation DESY, is a national research center in Germany. It operates particle accelerators used to investigate the structure of matt ...
was based on a network of over 300 synchronously clocked transputers divided into several subsystems. These controlled both the readout of the custom detector electronics and ran reconstruction algorithms for physics event selection.
The parallel processing abilities of the transputer were put to use commercially for
image processing
An image is a visual representation of something. It can be two-dimensional, three-dimensional, or somehow otherwise feed into the visual system to convey information. An image can be an artifact, such as a photograph or other two-dimensiona ...
by the world's largest printing company,
RR Donnelley & Sons, in the early 1990s. The ability to quickly transform digital images in preparation for print gave the firm a significant edge over their competitors. This development was led by Michael Bengtson in the RR Donnelley Technology Center. Within a few years, the processing ability of even desktop computers ended the need for custom multi-processing systems for the firm.
The German company Jäger Messtechnik used transputers for their early ADwin real-time
data acquisition Data acquisition is the process of sampling signals that measure real-world physical conditions and converting the resulting samples into digital numeric values that can be manipulated by a computer. Data acquisition systems, abbreviated by the acro ...
and control products.
A French company built the Archipel Volvox Supercomputer with up to 144 T800 and T400 Transputers. It was controlled by a Silicon Graphics Indigo2 running UNIX and a special card that interfaced to the Volvox backplanes.
Transputers also found use in protocol analysers such as the Siemens/Tektronix K1103 and in military applications where the array architecture suited applications such as radar and the serial links (that were high speed in the 1980s) served well to save cost and weight in sub-system communications.
The transputer also appeared in products related to
virtual reality
Virtual reality (VR) is a simulated experience that employs pose tracking and 3D near-eye displays to give the user an immersive feel of a virtual world. Applications of virtual reality include entertainment (particularly video games), educ ...
such as the ProVision 100 system made by Division Limited of Bristol, featuring a combination of
Intel i860
The Intel i860 (also known as 80860) is a RISC microprocessor design introduced by Intel in 1989. It is one of Intel's first attempts at an entirely new, high-end instruction set architecture since the failed Intel iAPX 432 from the beginning of ...
,
80486
The Intel 486, officially named i486 and also known as 80486, is a microprocessor. It is a higher-performance follow-up to the Intel 386. The i486 was introduced in 1989. It represents the fourth generation of binary compatible CPUs following the ...
/33 and
Toshiba
, commonly known as Toshiba and stylized as TOSHIBA, is a Japanese multinational conglomerate corporation headquartered in Minato, Tokyo, Japan. Its diversified products and services include power, industrial and social infrastructure system ...
HSP processors, together with T805 or T425 transputers, implementing a
rendering engine
Rendering or image synthesis is the process of generating a physically-based rendering, photorealistic or Non-photorealistic rendering, non-photorealistic image from a 2D model, 2D or 3D model by means of a computer program. The resulting im ...
that could then be accessed as a
server
Server may refer to:
Computing
*Server (computing), a computer program or a device that provides functionality for other programs or devices, called clients
Role
* Waiting staff, those who work at a restaurant or a bar attending customers and su ...
by
PC,
Sun SPARCstation or
VAX
VAX (an acronym for Virtual Address eXtension) is a series of computers featuring a 32-bit instruction set architecture (ISA) and virtual memory that was developed and sold by Digital Equipment Corporation (DEC) in the late 20th century. The VA ...
systems.
Myriade
Myriade is a European miniaturized satellite platform developed by EADS Astrium and CNES. EADS Astrium offers the Myriade bus under the commercial name Astrosat-100. CNES began developing Myriade in 1998, as a continuation of the Proteus program.
...
, a European
miniaturized satellite
A small satellite, miniaturized satellite, or smallsat is a satellite of low mass and size, usually under . While all such satellites can be referred to as "small", different classifications are used to categorize them based on mass. Satellites ca ...
platform developed by
Astrium Satellites
Astrium was an aerospace manufacturer subsidiary of the European Aeronautic Defence and Space Company (EADS) that provided civil and military space systems and services from 2006 to 2013. In 2012, Astrium had a turnover of €5.8 billion and 18 ...
and
CNES
The (CNES; French: ''Centre national d'études spatiales'') is the French government space agency (administratively, a "public administration with industrial and commercial purpose"). Its headquarters are located in central Paris and it is und ...
and used by satellites such as the
Picard, is based on the T805 yielding around 4 MIPS and is scheduled to stay in production until about 2015.
The asynchronous operation of the communications and computation allowed the development of asynchronous algorithms, such as Bane's "Asychronous Polynomial Zero Finding" algorithm.
[T.L. Freeman and M.K. Bane, "''Asynchronous Polynomial Zero-Finding Algorithms''". Parallel Computing 17, pp. 673-681. (1991)] The field of asynchronous algorithms, and the asynchronous implementation of current algorithms, is likely to play a key role in the move to
exascale computing
Exascale computing refers to computing systems capable of calculating at least "1018 IEEE 754 Double Precision (64-bit) operations (multiplications and/or additions) per second (exaFLOPS)"; it is a measure of supercomputer performance.
Exascale ...
.
The
High Energy Transient Explorer
High Energy Transient Explorer 1 (HETE-1) was a NASA astronomical satellite with international participation (mainly Japan and France).
History
The concept of a satellite capable of multi-wavelength observations of gamma-ray bursts (GRB) wa ...
2 (HETE-2) spacecraft used 4× T805 transputers and 8× DSP56001 yielding about 100 million
instructions per second
Instructions per second (IPS) is a measure of a computer's processor speed. For complex instruction set computers (CISCs), different instructions take different amounts of time, so the value measured depends on the instruction mix; even for compa ...
(MIPS) of performance.
[HETE-2 Spacecraft]
/ref>
Legacy
Growing internal parallelism has been one driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (as is used in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies and issuing multiple independent instructions to different execution units. This is termed superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...
processing. Superscalar processors are suited for optimising the execution of sequentially constructed fragments of code. The combination of superscalar processing and speculative execution
Speculative execution is an optimization technique where a computer system performs some task that may not be needed. Work is done before it is known whether it is actually needed, so as to prevent a delay that would have to be incurred by doing t ...
delivered a tangible performance increase on existing bodies of code – which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more task-level parallelism.
Nevertheless, the model of cooperating concurrent processors can still be found in cluster computing
A computer cluster is a set of computers that work together so that they can be viewed as a single system. Unlike grid computers, computer clusters have each node set to perform the same task, controlled and scheduled by software.
The comp ...
systems that dominate supercomputer
A supercomputer is a computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second ( FLOPS) instead of million instructions ...
design in the 21st century. Unlike the transputer architecture, the processing units in these systems typically use superscalar CPUs with access to substantial amounts of memory and disk storage, running conventional operating systems and network interfaces. Resulting from the more complex nodes, the software architecture used for coordinating the parallelism in such systems is typically far more heavyweight than in the transputer architecture.
The fundamental transputer motive remains, yet was masked for over 20 years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the greater physical resources, almost at the same time when technology scaling began to hit its limits. Power consumption, and thus heat dissipation needs, render further clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
increases unfeasible. These factors led the industry towards solutions little different in essence from those proposed by Inmos.
The most powerful supercomputers in the world, based on designs from Columbia University
Columbia University (also known as Columbia, and officially as Columbia University in the City of New York) is a private research university in New York City. Established in 1754 as King's College on the grounds of Trinity Church in Manhatt ...
and built as IBM Blue Gene
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with low power consumption.
The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, ...
, are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoCs.
Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for Inmos. On top of adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in one die. The transputer designers struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistor densities, can now typically place many. One of the most recent commercial developments has emerged from the firm XMOS
XMOS is a fabless semiconductor company that develops audio products and multicore microcontrollers.
Company history
XMOS was founded in July 2005 by Ali Dixon, James Foster, Noel Hurley, David May, and Hitesh Mehta. It received seed funding ...
, which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and Inmos. There is an emerging class of multicore/manycore processors taking the approach of a ''network on a chip'' (NoC), such as the Cell processor
Cell is a Multi-core processor, multi-core microprocessor microarchitecture that combines a general-purpose PowerPC Central processing unit, core of modest performance with streamlined coprocessor, coprocessing elements which greatly accelerate m ...
, Adapteva
Zero ASIC Corporation, formerly Adapteva, Inc., is a fabless semiconductor company focusing on low power many core microprocessor design. The company was the second company to announce a design with 1,000 specialized processing cores on a single i ...
Epiphany architecture, Tilera, etc.
The transputer and Inmos helped establish Bristol
Bristol () is a city, ceremonial county and unitary authority in England. Situated on the River Avon, it is bordered by the ceremonial counties of Gloucestershire to the north and Somerset to the south. Bristol is the most populous city in ...
, UK, as a hub for microelectronic design and innovation.
See also
* Adapteva
Zero ASIC Corporation, formerly Adapteva, Inc., is a fabless semiconductor company focusing on low power many core microprocessor design. The company was the second company to announce a design with 1,000 specialized processing cores on a single i ...
* David May (computer scientist)
Michael David May FRS FREng (born 24 February 1951) is a British computer scientist. He is a Professor in the Department of Computer Science at the University of Bristol and founder of XMOS Semiconductor, serving until February 2014 as the ...
* Ease (programming language)
Ease is a general purpose parallel programming language. It is designed by Steven Ericsson-Zenith, a researcher at Yale University, the Institute for Advanced Science & Engineering in Silicon Valley, California, the Ecole Nationale Supérieure des ...
* IEEE 1355
IEEE Standard 1355-1995, IEC 14575, or ISO 14575 is a data communications standard for Heterogeneous Interconnect (HIC).
IEC 14575 is a low-cost, low latency, scalable serial interconnection system, originally intended for communication between la ...
* Inmos
* iWarp
iWARP is a computer networking protocol that implements remote direct memory access (RDMA) for efficient data transfer over Internet Protocol networks. Contrary to some accounts, iWARP is not an acronym.
Because iWARP is layered on Internet Eng ...
* Meiko Computing Surface
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the Inmos transputer microprocessor.
History
In 1985, when Inmos management suggested the release of the transputer be ...
References
External links
The Transputer FAQ
Ram Meenakshisundaram's Transputer Home Page
WoTUG
A group applying the principles of transputers (e.g., communicating sequential processes
In computer science, communicating sequential processes (CSP) is a formal language for describing patterns of interaction in concurrent systems. It is a member of the family of mathematical theories of concurrency known as process algebras, or pro ...
(CSP)) in other environments.
Transputer emulator
– It emulates one T414 transputer (i.e., no FPU, no blitting instructions) and supplies the file and terminal I/O services that were usually supplied by a host computer system.
PC-based Transputer emulator
– This is a PC port of the original T414 transputer emulator (called jserver) written by Julian Highfield in the mid- to late 1990s.
Transputers can be fun.
The Transterpreter virtual machine.
– A portable runtime for occam-pi and other languages based on the transputer bytecode.
– The occam-pi compiler.
transputer.net.
– Documents and more about transputer.
Inmos alumni
Directory of ex-Inmos employees, plus photos and general info. Maintained by Ken Heddings.
Prince Philip Designers Prize
winners from 1959 to 2009, Design Council website
{{Authority control
16-bit microprocessors
32-bit microprocessors
Parallel computing
Stack machines