Elbrus (computer)
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The Elbrus (russian: Эльбрус) is a line of
Soviet The Soviet Union,. officially the Union of Soviet Socialist Republics. (USSR),. was a List of former transcontinental countries#Since 1700, transcontinental country that spanned much of Eurasia from 1922 to 1991. A flagship communist state, ...
and
Russia Russia (, , ), or the Russian Federation, is a List of transcontinental countries, transcontinental country spanning Eastern Europe and North Asia, Northern Asia. It is the List of countries and dependencies by area, largest country in the ...
n computer systems developed by the Lebedev Institute of Precision Mechanics and Computer Engineering. These computers are used in the space program, nuclear weapons research, and defense systems, as well as for theoretical and researching purposes, such as an experimental
Refal Refal ("Recursive functions algorithmic language"; russian: РЕФАЛ) "is a functional programming language oriented toward symbolic computations", including " string processing, language translation, ndartificial intelligence". It is one of th ...
and CLU translators.


History

Historically, computers under the ''Elbrus'' brand comprised several different
instruction set architecture In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ' ...
s (ISAs). The first of them was the line of the large fourth-generation computers, developed by Vsevolod Burtsev. These were heavily influenced by the
Burroughs large systems The Burroughs Large Systems Group produced a family of large 48-bit mainframes using stack machine instruction sets with dense syllables.E.g., 12-bit syllables for B5000, 8-bit syllables for B6500 The first machine in the family was the B5000 in ...
and similarly to them implemented
tagged architecture In computer science, a tagged architecture is a particular type of computer architecture where every word of memory constitutes a tagged union, being divided into a number of bits of data, and a ''tag'' section that describes the type of the data: ...
and a variant of
ALGOL-68 ALGOL 68 (short for ''Algorithmic Language 1968'') is an imperative programming language that was conceived as a successor to the ALGOL 60 programming language, designed with the goal of a much wider scope of application and more rigorously de ...
as
system programming language A system programming language is a programming language used for system programming; such languages are designed for writing system software, which usually requires different development approaches when compared with application software. Edsger D ...
. After that Burtsev retired, and new Lebedev's chief developer,
Boris Babayan Boris Artashesovich Babayan (russian: Борис Арташеcович Бабаян; hy, Բորիս Արտաշեսի Բաբայան; born Baku, 20 December 1933) is a Soviet and Russian computer scientist of Armenian descent, notable as the pi ...
, introduced the completely new system architecture. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a
very long instruction word Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP). Whereas conventional central processing units (CPU, processor) mostly allow programs to specify instructions to exe ...
(VLIW) approach. In 1992, a spin-off company
Moscow Center of SPARC Technologies MCST (russian: МЦСТ, acronym for Moscow Center of SPARC Technologies) is a Russian microprocessor company that was set up in 1992. Different types of processors made by MCST were used in personal computers, servers and computing systems. MCS ...
(MCST) was created and continued development, using the "Elbrus" moniker as a brand for all computer systems developed by the company. In the late 1990s, a series of
SPARC SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed ...
-based
central processing unit A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, an ...
s (CPUs) were developed at MCST as a way to raise funds for in-house
semiconductor intellectual property core In electronic design, a semiconductor intellectual property core (SIP core), IP core, or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores can be licensed to ...
development and to fill the niche of domestically-developed CPUs for the
backdoor A back door is a door in the rear of a building. Back door may also refer to: Arts and media * Back Door (jazz trio), a British group * Porta dos Fundos (literally “Back Door” in Portuguese) Brazilian comedy YouTube channel. * Works so title ...
-wary military.


Models

* ''
Elbrus 1 Mount Elbrus ( rus, links=no, Эльбрус, r=Elbrus, p=ɪlʲˈbrus; kbd, Ӏуащхьэмахуэ, 'uaşhəmaxuə; krc, Минги тау, Mingi Taw) is the highest and most prominent peak in Russia and Europe. It is situated in the we ...
'' (1979) was the first in the line. ** A side development was an update of the 1965 BESM-6 as Elbrus-1K2. ** a 10-processor computer, with superscalar, out-of-order execution and
reduced instruction set computer In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set comput ...
(RISC) processors. * ''
Elbrus 2 Mount Elbrus ( rus, links=no, Эльбрус, r=Elbrus, p=ɪlʲˈbrus; kbd, Ӏуащхьэмахуэ, 'uaşhəmaxuə; krc, Минги тау, Mingi Taw) is the highest and most prominent peak in Russia and Europe. It is situated in the we ...
'' (1984) ** Re-implementation of the Elbrus 1 architecture with faster emitter-coupled logic (ECL) chips. * ''
Elbrus 3 Mount Elbrus ( rus, links=no, Эльбрус, r=Elbrus, p=ɪlʲˈbrus; kbd, Ӏуащхьэмахуэ, 'uaşhəmaxuə; krc, Минги тау, Mingi Taw) is the List of elevation extremes by region, highest and List of European ultra-prominen ...
'' (1990) was a 16-processor computer developed by the Babayan's team, and one of the first VLIW computers in the world. * ''
Elbrus 2000 The Elbrus 2000, E2K (russian: Эльбрус 2000) is a Russian 512-bit wide Very long instruction word, VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architec ...
'' (2001) was a microprocessor development of the ''Elbrus 3'' architecture. Also known as ''Elbrus-S''. ** ''Elbrus-3M1'' (2005) is a two-processor computer based on
Elbrus 2000 The Elbrus 2000, E2K (russian: Эльбрус 2000) is a Russian 512-bit wide Very long instruction word, VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architec ...
microprocessor working at 300MHz. ** ''Elbrus МВ3S1/C'' (2009) is a
ccNUMA Non-uniform memory access (NUMA) is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to the processor. Under NUMA, a processor can access its own local memory faster than non ...
four-processor computer based on Elbrus-S microprocessor working at 500MHz. * ''
Elbrus-2S+ Elbrus-2S+ (russian: Эльбрус-2С+) is a multi-core microprocessor based on the Elbrus 2000 architecture developed by Moscow Center of SPARC Technologies (MCST). There are multiple reports regarding the evolution of this technology for the ...
'' (2011) working at 500MHz, with capacity to calculate 16GFlops. * ''
Elbrus-2SM Elbrus-2S+ (russian: Эльбрус-2С+) is a multi-core microprocessor based on the Elbrus 2000 architecture developed by Moscow Center of SPARC Technologies (MCST). There are multiple reports regarding the evolution of this technology for the ...
'' (2014) working at 300MHz, with capacity to calculate 9.6GFlops. * '' Elbrus-4S'' (2014) working at 800MHz, with capacity to calculate 50GFlops. * '' Elbrus-1S+'' (2016)
system on a chip A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
(SoC) with
graphics processing unit A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...
(GPU), working at 600–1000MHz, with capacity to calculate 24GFlops. * ''
Elbrus-8S The Elbrus-8S (russian: Эльбрус-8С) is a Russian 28 nanometer 8-core microprocessor developed by Moscow Center of SPARC Technologies (MCST). The first prototypes were produced by the end of 2014 and serial production started in 2016. The ...
'' (2014–2015) working at 1300MHz, with capacity to calculate 250GFlops. * ''
Elbrus-8SV The Elbrus-8S (russian: Эльбрус-8С) is a Russian 28 nanometer 8-core microprocessor developed by Moscow Center of SPARC Technologies (MCST). The first prototypes were produced by the end of 2014 and serial production started in 2016. The ...
'' (2018) working at 1500MHz, with capacity to calculate 576GFlops. * '' Elbrus-16S'' (2019) working at 2000MHz, with capacity to calculate 1.5TFlops.


SPARC

* ''Elbrus-90micro'' (1998–2010) is a computer line based on
SPARC SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed ...
instruction set architecture In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ' ...
(ISA) microprocessors: MCST R80, R150, R500, R500S and
MCST-4R The MCST R1000 (russian: МЦСТ R1000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. During development this microprocessor was designated as MCST-4R. MCST R1000 Highlights *implement ...
working at 80, 150, 500, and 1000MHz. The Elbrus-90 is used to control the
S-400 missile system The S-400 Triumf (russian: link=no, C-400 Триумф – Triumf; translation: Triumph; NATO reporting name: SA-21 Growler), previously known as the S-300 PMU-3, is a mobile, surface-to-air missile (SAM) system developed in the 1990s by Russ ...
.


See also

* List of Soviet computer systems * List of Russian microprocessors


References


External links

* (Russian)
MCST: Microprocessors and VLSI
(Russian)

(Russian)
"Elbrus-S" processor info
(Russian)
МВ3S1/C "Elbrus-S" based processor module
(Russian)
(I) Power Point document "Elbrus-3M1"

(II) Power Point document "Elbrus-3M1"



Video of booting Windows 2000 on Elbrus microprocessor

The Elbrus-2: a Soviet-era high performance computer
– project and hardware history discussion, including an interview with
Boris Babayan Boris Artashesovich Babayan (russian: Борис Арташеcович Бабаян; hy, Բորիս Արտաշեսի Բաբայան; born Baku, 20 December 1933) is a Soviet and Russian computer scientist of Armenian descent, notable as the pi ...
, from the
Computer History Museum The Computer History Museum (CHM) is a museum of computer history, located in Mountain View, California. The museum presents stories and artifacts of Silicon Valley and the information age, and explores the computing revolution and its impact on ...

Realworldtech - From Russia, With Skepticism

EDN Network: The Russians Are Coming?


{{List of Soviet computer systems Mainframe computers Supercomputers Soviet inventions Sun Microsystems Soviet computer systems High-level language computer architecture