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Moscow Center Of SPARC Technologies
MCST (russian: МЦСТ, acronym for Moscow Center of SPARC Technologies) is a Russian microprocessor company that was set up in 1992. Different types of processors made by MCST were used in personal computers, servers and computing systems. MCST develops microprocessors based on two different instruction set architecture (ISA): '' Elbrus'' and ''SPARC''. MCST is a direct descendant of the Lebedev Institute of Precision Mechanics and Computer Engineering. MCST is the base organization of the Department of Informatics and Computer Engineering of the Moscow Institute of Physics and Technology. MCST develops the Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of . The name "Elbrus" has been given the backronym "ExpLicit Basic Resources Utilization Scheduling". Products * '' Elbrus 1'' (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and AL ...
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Joint-stock Company
A joint-stock company is a business entity in which shares of the company's capital stock, stock can be bought and sold by shareholders. Each shareholder owns company stock in proportion, evidenced by their share (finance), shares (certificates of ownership). Shareholders are able to transfer their shares to others without any effects to the continued existence of the company. In modern-day corporate law, the existence of a joint-stock company is often synonymous with incorporation (business), incorporation (possession of legal personality separate from shareholders) and limited liability (shareholders are liable for the company's debts only to the value of the money they have invested in the company). Therefore, joint-stock companies are commonly known as corporations or limited company, limited companies. Some jurisdiction (area), jurisdictions still provide the possibility of registering joint-stock companies without limited liability. In the United Kingdom and in other count ...
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Burroughs Large Systems
The Burroughs Large Systems Group produced a family of large 48-bit mainframes using stack machine instruction sets with dense syllables.E.g., 12-bit syllables for B5000, 8-bit syllables for B6500 The first machine in the family was the B5000 in 1961. It was optimized for compiling ALGOL 60 programs extremely well, using single-pass compilers. It evolved into the B5500. Subsequent major redesigns include the B6500/B6700 line and its successors, as well as the separate B8500 line. In the 1970s, the Burroughs Corporation was organized into three divisions with very different product line architectures for high-end, mid-range, and entry-level business computer systems. Each division's product line grew from a different concept for how to optimize a computer's instruction set for particular programming languages. "Burroughs Large Systems" referred to all of these large-system product lines together, in contrast to the COBOL-optimized Medium Systems (B2000, B3000, and B4000) or the f ...
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Elbrus МВ3S1/C
Mount Elbrus ( rus, links=no, Эльбрус, r=Elbrus, p=ɪlʲˈbrus; kbd, Ӏуащхьэмахуэ, 'uaşhəmaxuə; krc, Минги тау, Mingi Taw) is the highest and most prominent peak in Russia and Europe. It is situated in the western part of the Caucasus and is the highest peak of the Caucasus Mountains. The dormant volcano rises above sea level; it is the highest stratovolcano in Eurasia, as well as the tenth-most prominent peak in the world. The mountain stands in Southern Russia, in the Russian republic of Kabardino-Balkaria. Elbrus has two summits, both of which are dormant volcanic domes. The taller, western summit is ; the eastern summit is . The eastern summit was first ascended on 10 July 1829 by Khillar Khachirov, and the western summit in 1874 by a British expedition led by F. Crauford Grove and including Frederick Gardner, Horace Walker and the Swiss guide Peter Knubel. Etymology The name ''Elbrus'' seems to have a connection with ''Alborz'' ( ...
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Very Long Instruction Word
Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP). Whereas conventional central processing units (CPU, processor) mostly allow programs to specify instructions to execute in sequence only, a VLIW processor allows programs to explicitly specify instructions to execute in parallel. This design is intended to allow higher performance without the complexity inherent in some other designs. Overview The traditional means to improve performance in processors include dividing instructions into substeps so the instructions can be executed partly at the same time (termed ''pipelining''), dispatching individual instructions to be executed independently, in different parts of the processor (''superscalar architectures''), and even executing instructions in an order different from the program (''out-of-order execution''). These methods all complicate hardware (larger circuits, higher cost and energy use) because ...
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Elbrus 2000
The Elbrus 2000, E2K (russian: Эльбрус 2000) is a Russian 512-bit wide Very long instruction word, VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): * Elbrus Very long instruction word, VLIW * Intel x86 (a complete, system-level implementation with a software binary translation, dynamic binary translation virtual machine, similar to Transmeta Crusoe) Thanks to its unique architecture the Elbrus 2000 can execute 20 instructions per clock, so even with its modest clock speed it can compete with much faster clocked superscalar microprocessors when running in native Very long instruction word, VLIW mode. For security reasons the Elbrus 2000 architecture implements dynamic data type-checking during Execution (computing), execution. In order to prevent unauthorized access, each Pointer (computer programming), pointer has additional Data type, type information that is verified ...
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MCST-R2000
The MCST R2000 (russian: МЦСТ R2000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. MCST R2000 Highlights *implements the SPARC V9 instruction set architecture (ISA) *octa-core A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such a ... *core specifications: **out-of-order, dual-issue superscalar ***two integer units ***one floating-point unit *integrated memory controller *integrated ccNUMA controller *2 GHz clock rate *28 nanometer, 28 nm process *~500 million transistors References

{{List of Russian microprocessors SPARC microprocessors 64-bit microprocessors ...
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MCST-4R
The MCST R1000 (russian: МЦСТ R1000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. During development this microprocessor was designated as MCST-4R. MCST R1000 Highlights *implements the SPARC V9 instruction set architecture (ISA) *quad-core *core specifications: **in-order, dual-issue superscalar **7-stage integer pipeline **9-stage floating-point pipeline ** VIS extensions 1 and 2 ** Multiply–accumulate unit **16 KB L1 instruction cache ( parity protection) **32 KB L1 data cache ( parity protection) **size 7.6 mm2 *shared 2MB L2 cache ( ECC protection) *integrated memory controller *integrated ccNUMA controller *1 GHz clock rate *90 nm process The 90  nm process refers to the level of MOSFET (CMOS) fabrication process technology that was commercialized by the 2003–2005 timeframe, by leading semiconductor companies like Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, Elpid ... *die size 1 ...
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MCST-R500S
The MCST R500S (russian: МЦСТ R500S) is a 32-bit system-on-a-chip, developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. MCST R500S Highlights *implements the SPARC V8 instruction set architecture (ISA) *dual-core *the two cores can work in redundancy to increase reliability of the system. *core specifications: **in-order, single-issue **5-stage integer pipeline **7-stage floating-point pipeline **16 KB L1 instruction cache **32 KB L1 data cache *shared 512KB L2 cache *integrated controllers: **memory **PCI **RDMA (to connect with other MCST R500S) **MSI ( Mbus and SBus) **EBus **PS/2 **Ethernet 100 **SCSI-2 **RS-232 *500 МHz clock rate *130 nm process The 130 nanometer (130 nm) process refers to the level of semiconductor process technology that was reached in the 2000–2001 timeframe, by most leading semiconductor companies, like Intel, Texas Instruments, IBM, and TSMC. The origin of the 1 ... *die size 100 mm2 *~45 million transi ...
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Elbrus 3
Mount Elbrus ( rus, links=no, Эльбрус, r=Elbrus, p=ɪlʲˈbrus; kbd, Ӏуащхьэмахуэ, 'uaşhəmaxuə; krc, Минги тау, Mingi Taw) is the List of elevation extremes by region, highest and List of European ultra-prominent peaks, most prominent peak in Russia and Europe. It is situated in the Western Caucasus, western part of the Caucasus and is the highest peak of the Caucasus Mountains. The dormant volcano rises above sea level; it is the highest stratovolcano in Eurasia, as well as the List of mountain peaks by prominence, tenth-most prominent peak in the world. The mountain stands in Southern Russia, in the Republics of Russia, Russian republic of Kabardino-Balkaria. Elbrus has two Summit (topography), summits, both of which are dormant Lava dome, volcanic domes. The taller, western summit is ; the eastern summit is . The eastern summit was first ascended on 10 July 1829 by Khillar Khachirov, and the western summit in 1874 by a British expedition led ...
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Emitter Coupled Logic
In electronics, emitter-coupled logic (ECL) is a high-speed integrated circuit bipolar transistor logic family. ECL uses an overdriven bipolar junction transistor (BJT) differential amplifier with single-ended input and limited emitter current to avoid the saturated (fully on) region of operation and its slow turn-off behavior. As the current is steered between two legs of an emitter-coupled pair, ECL is sometimes called ''current-steering logic'' (CSL), ''current-mode logic'' (CML) or ''current-switch emitter-follower'' (CSEF) logic. In ECL, the transistors are never in saturation, the input and output voltages have a small swing (0.8 V), the input impedance is high and the output impedance is low. As a result, the transistors change states quickly, gate delays are low, and the fanout capability is high. In addition, the essentially constant current draw of the differential amplifiers minimises delays and glitches due to supply-line inductance and capacitance, and the complementa ...
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