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Mpc5xx
The MPC5xx family of processors such as the MPC555 and MPC565 are 32-bit PowerPC embedded microprocessors that operate between 40 and 66 MHz and are frequently used in automotive applications including engine and transmission controllers. Delphi Corporation use either the MPC561 or MPC565 in the engine controllers they supply to General Motors, with nearly all 2009 model GM North America vehicles now using an MPC5xx in the engine controller. Bosch also used the MPC5xx throughout the ME(D)-9 series of Gasoline Engine Controllers, EDC-16 series of Diesel Engine Controllers as did the Cummins B series diesel engine ECU. They are generally considered microcontrollers because of their integrated peripheral set and their unusual architecture: no MMU, large on-chip SRAM and very large (as much as 1 MB) low latency access on-chip flash memories, which means their architecture is tailored to control applications. Instead of a block-address translation and a hardware-driven, fixe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC Microprocessors
PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple– IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors. PowerPC was the cornerstone of AIM's PReP and Common Hardware Reference Platform (CHRP) initiatives in the 1990s. Originally intended for personal computers, the architecture is well known for being used by Apple's Power Macintosh, PowerBook, iMac, iBook, eMac, Mac Mini, and Xserve lines from 1994 until 2005, when Apple migrated to Intel's x86. It has since become a niche in personal computers, but remains popular for embedded and high-performance processors. Its use in 7th generation of video game consoles and embedde ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC
PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple Inc., Apple–IBM–Motorola alliance, known as AIM alliance, AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors. PowerPC was the cornerstone of AIM's PReP and Common Hardware Reference Platform (CHRP) initiatives in the 1990s. Originally intended for personal computers, the architecture is well known for being used by Apple's Power Macintosh, PowerBook, iMac, iBook, eMac, Mac Mini, and Xserve lines from 1994 until 2005, when Mac transition to Intel processors, Apple migrated to Intel's x86. It has since become a niche in personal computers, but remains popular for embedded system, embedded and high-performanc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Design
Processor design is a subfield of computer engineering and electronics engineering (fabrication) that deals with creating a processor, a key component of computer hardware. The design process involves choosing an instruction set and a certain execution paradigm (e.g. VLIW or RISC) and results in a microarchitecture, which might be described in e.g. VHDL or Verilog. For microprocessor design, this description is then manufactured employing some of the various semiconductor device fabrication processes, resulting in a die which is bonded onto a chip carrier. This chip carrier is then soldered onto, or inserted into a socket on, a printed circuit board (PCB). The mode of operation of any processor is the execution of lists of instructions. Instructions typically include those to compute or manipulate data values using registers, change or retrieve values in read/write memory, perform relational tests between data values and to control program flow. Processor designs are often test ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Computer Bus
In computer architecture, a bus (shortened form of the Latin '' omnibus'', and historically also called data highway or databus) is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols. Early computer buses were parallel electrical wires with multiple hardware connections, but the term is now used for any physical arrangement that provides the same logical function as a parallel electrical busbar. Modern computer buses can use both parallel and bit serial connections, and can be wired in either a multidrop (electrical parallel) or daisy chain topology, or connected by switched hubs, as in the case of Universal Serial Bus (USB). Background and nomenclature Computer systems generally consist of three main parts: * The central processing unit (CPU) that processes data, * The memory that holds the p ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Instruction Cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which stores copies of the data from frequently used main memory locations. Most CPUs have a hierarchy of multiple cache levels (L1, L2, often L3, and rarely even L4), with different instruction-specific and data-specific caches at level 1. The cache memory is typically implemented with static random-access memory (SRAM), in modern CPUs by far the largest part of them by chip area, but SRAM is not always used for all levels (of I- or D-cache), or even any level, sometimes some latter or all levels are implemented with eDRAM. Other types of caches exist (that are not counted towards the "cache size" of the most important caches mentioned above), such as the translation lookaside buffer (TLB) which is part of the memory management unit (MMU) w ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Floating Point Unit
Floating may refer to: * a type of dental work performed on horse teeth * use of an isolation tank * the guitar-playing technique where chords are sustained rather than scratched * ''Floating'' (play), by Hugh Hughes * Floating (psychological phenomenon), slipping into altered states * Floating exchange rate, a market-valued currency * Floating voltage, and floating ground, a voltage or ground in an electric circuit that is not connected to the Earth or another reference voltage * Floating point, a representation in computing of rational numbers most commonly associated with the IEEE 754 standard * ''Floating'' (film), a 1997 American drama film Albums and songs * ''Floating'' (Eloy album) (1974) * ''Floating'' (Ketil Bjørnstad album) (2005) * ''Floating'' (EP), a 1991 EP by Bill Callahan * "Floating" (The Moody Blues song) (1969) * "Floating" (Megan Rochell song) (2006) * "Floating" (Jape song) (2004) * "Floating", a song by Jolin Tsai from the 2000 album '' Don't Stop' ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Harvard Architecture
The Harvard architecture is a computer architecture with separate storage and signal pathways for instructions and data. It contrasts with the von Neumann architecture, where program instructions and data share the same memory and pathways. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters. These early machines had data storage entirely contained within the central processing unit, and provided no access to the instruction storage as data. Programs needed to be loaded by an operator; the processor could not initialize itself. Modern processors appear to the user to be systems with von Neumann architectures, with the program code stored in the same main memory as the data. For performance reasons, internally and largely invisible to the user, most designs have separate processor caches for the instructions and data, with separate pathways into the processor for e ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerQUICC
PowerQUICC is the name for several PowerPC- and Power ISA-based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the Communications Processor Module ( QUICC Engine) which is a separate RISC core specialized in such tasks such as I/O, communications, ATM, security acceleration, networking and USB. Many components are System-on-a-chip designs tailor-made for embedded applications. PowerQUICC processors are used in networking, automotive, industrial, storage, printing and consumer applications. Freescale are using PowerQUICC processors as a part of their mobileGT platform. Freescale also manufactures QUICC microcontrollers based on the older 68k technology. There are four distinct lines of processors, mainly based on processing power. PowerQUICC I The MPC8xx family was Motorola's first PowerPC based embedded processors, suited for network processors and system-on-a-chip devices. The core is an original implementation of th ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Serial Communications
In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels. Serial communication is used for all long-haul communication and most computer networks, where the cost of cable and synchronization difficulties make parallel communication impractical. Serial computer buses are becoming more common even at shorter distances, as improved signal integrity and transmission speeds in newer serial technologies have begun to outweigh the parallel bus's advantage of simplicity (no need for serializer and deserializer, or SerDes) and to outstrip its disadvantages (clock skew, interconnect density). The migration from PCI to PCI Express is an example. Cables Many serial communication systems were originally designed to transfer data over relatively l ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
GPIO
A general-purpose input/output (GPIO) is an uncommitted digital signal pin on an integrated circuit or electronic circuit (e.g. MCUs/ MPUs ) board which may be used as an input or output, or both, and is controllable by software. GPIOs have no predefined purpose and are unused by default. If used, the purpose and behavior of a GPIO is defined and implemented by the designer of higher assembly-level circuitry: the circuit board designer in the case of integrated circuit GPIOs, or system integrator in the case of board-level GPIOs. Integrated circuit GPIOs Integrated circuit (IC) GPIOs are implemented in a variety of ways. Some ICs provide GPIOs as a primary function whereas others include GPIOs as a convenient "accessory" to some other primary function. Examples of the former include the Intel 8255, which interfaces 24 GPIOs to a parallel communication bus, and various GPIO ''expander'' ICs, which interface GPIOs to serial communication buses such as I²C and SMBus. An example o ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Analog-to-digital Converter
In electronics, an analog-to-digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal. An ADC may also provide an isolated measurement such as an electronic device that converts an analog input voltage or current to a digital number representing the magnitude of the voltage or current. Typically the digital output is a two's complement binary number that is proportional to the input, but there are other possibilities. There are several ADC architectures. Due to the complexity and the need for precisely matched components, all but the most specialized ADCs are implemented as integrated circuits (ICs). These typically take the form of metal–oxide–semiconductor (MOS) mixed-signal integrated circuit chips that integrate both analog and digital circuits. A digital-to-analog converter (DAC) performs the reverse function; it converts a digital signa ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC E200
The PowerPC e200 is a family of 32-bit Power ISA microprocessor cores developed by Freescale for primary use in automotive and industrial control systems. The cores are designed to form the CPU part in system-on-a-chip (SoC) designs with speed ranging up to 600 MHz, thus making them ideal for embedded applications. The e200 core is developed from the MPC5xx family processors, which in turn is derived from the MPC8xx core in the PowerQUICC SoC processors. e200 adheres to the Power ISA v.2.03 as well as the previous ''Book E'' specification. All e200 core based microprocessors are named in the MPC55xx and MPC56xx/JPC56x scheme, not to be confused with the MPC52xx processors which is based on the PowerPC e300 core. In April 2007 Freescale and IPextreme opened up the e200 cores for licensing to other manufacturers. Continental AG and Freescale are developing SPACE, a tri-core e200 based processor designed for electronic brake systems in cars. STMicroelectronics and Freesc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
