PowerPC (with the backronym Performance Optimization With Enhanced
RISC – Performance Computing, sometimes abbreviated as PPC) is a
reduced instruction set computing (RISC) instruction set architecture
(ISA) created by the 1991 Apple–IBM–
Motorola alliance, known as
AIM. PowerPC, as an evolving instruction set, has since 2006 been
named Power ISA, while the old name lives on as a trademark for some
implementations of Power Architecture-based processors.
PowerPC was the cornerstone of AIM's
PReP and Common Hardware
Reference Platform initiatives in the 1990s. Originally intended for
personal computers, the architecture is well known for being used by
Apple's Power Macintosh, PowerBook, iMac, iBook, and
Xserve lines from
1994 until 2006, when Apple migrated to Intel's x86. It has since
become niche in personal computers, but remain popular as embedded and
high-performance processors. Its use in video game consoles and
embedded applications provided an array of uses. In addition, PowerPC
CPUs are still used in
AmigaOne and third party
AmigaOS 4 personal
PowerPC is largely based on IBM's earlier POWER instruction set
architecture, and retains a high level of compatibility with it; the
architectures have remained close enough that the same programs and
operating systems will run on both if some care is taken in
preparation; newer chips in the POWER series use the Power ISA.
1.1 Apple and
1.2 Operating systems
1.3 Breakup of AIM
2 Design features
2.1 Endian modes
4 Operating systems
4.1 Operating systems with native support
5.3 Game consoles
5.4 Desktop computers
5.5 Embedded applications
6 See also
8 Further reading
9 External links
The history of
RISC began with IBM's 801 research project, on which
John Cocke was the lead developer, where he developed the concepts of
RISC in 1975–78. 801-based microprocessors were used in a number of
IBM embedded products, eventually becoming the 16-register ROMP
processor used in the
IBM RT. The RT was a rapid design implementing
RISC architecture. Between the years of 1982–1984,
IBM started a
project to build the fastest microprocessor on the market; this new
32-bit architecture became referred to as the America Project
throughout its development cycle, which lasted for approximately 5–6
years. The result is the POWER instruction set architecture,
introduced with the
RISC System/6000 in early 1990.
The original POWER microprocessor, one of the first superscalar RISC
implementations, is a high performance, multi-chip design.
realized that a single-chip microprocessor was needed in order to
RS/6000 line from lower-end to high-end machines. Work began
on a one-chip POWER microprocessor, designated the RSC (
Chip). In early 1991,
IBM realized its design could potentially become
a high-volume microprocessor used across the industry.
Apple had already realized the limitations and risks of its dependency
upon a single CPU vendor at a time when
Motorola was falling behind on
delivering the 68040 CPU. Furthermore, Apple had conducted its own
research and made an experimental quad-core CPU design called
Aquarius,:86-90 which convinced the company's technology leadership
that the future of computing was in the
IBM approached Apple with the goal of collaborating on the development
of a family of single-chip microprocessors based on the POWER
architecture. Soon after, Apple, being one of Motorola's largest
customers of desktop-class microprocessors, asked
Motorola to join
the discussions due to their long relationship,
Motorola having had
more extensive experience with manufacturing high-volume
microprocessors than IBM, and to form a second source for the
microprocessors. This three-way collaboration between Apple, IBM, and
Motorola became known as the AIM alliance.
In 1991, the
PowerPC was just one facet of a larger alliance among
these three companies. At the time, most of the personal computer
industry was shipping systems based on the
Intel 80386 and 80486
chips, which have a complex instruction set computer (CISC)
architecture, and development of the Pentium processor was well
PowerPC chip was one of several joint ventures involving
the three alliance members, in their efforts to counter the growing
Intel dominance of personal computing.
For Motorola, POWER looked like an unbelievable deal. It allowed the
company to sell a widely tested and powerful
RISC CPU for little
design cash on its own part. It also maintained ties with an important
customer, Apple, and seemed to offer the possibility of adding IBM
too, which might buy smaller versions from
Motorola instead of making
At this point
Motorola already had its own
RISC design in the form of
the 88000, which was doing poorly in the market.
Motorola was doing
well with its 68000 family and the majority of the funding was focused
on this. The
88000 effort was somewhat starved for resources.
88000 was already in production, however;
Data General was
88000 machines and Apple already had
88000 prototype machines
88000 had also achieved a number of embedded design wins
in telecom applications. If the new POWER one-chip version could be
made bus-compatible at a hardware level with the 88000, that would
allow both Apple and
Motorola to bring machines to market far faster
since they would not have to redesign their board architecture.
The result of these various requirements is the
computing) specification. The differences between the earlier POWER
instruction set and that of
PowerPC is outlined in Appendix E of the
PowerPC ISA v.2.02.
IBM had a long-standing desire for a unifying operating
system that would simultaneously host all existing operating systems
as personalities upon one microkernel. From 1991 to 1995, the company
designed and aggressively evangelized what would become Workplace OS,
primarily targeting PowerPC.:290-291
When the first
PowerPC products reached the market, they were met with
enthusiasm. In addition to Apple, both
IBM and the
Group offered systems built around the processors.
Windows NT 3.51
Windows NT 3.51 for the architecture, which was used in Motorola's
PowerPC servers, and
Sun Microsystems offered a version of its Solaris
IBM ported its
Workplace OS featured a new port of OS/2
Intel emulation for application compatibility), pending a
successful launch of the
PowerPC 620. Throughout the mid-1990s,
PowerPC processors achieved benchmark test scores that matched or
exceeded those of the fastest x86 CPUs.
Ultimately, demand for the new architecture on the desktop never truly
materialized. Windows, OS/2, and Sun customers, faced with the lack of
application software for the PowerPC, almost universally ignored the
Workplace OS platform (and thus,
OS/2 for PowerPC) was
summarily canceled upon its first developers' release in December 1995
due to the simultaneous buggy launch of the
PowerPC 620. The PowerPC
versions of Solaris and Windows were discontinued after only a brief
period on the market. Only on the Macintosh, due to Apple's
persistence, did the
PowerPC gain traction. To Apple, the performance
PowerPC was a bright spot in the face of increased competition
from Windows 95 and Windows NT-based PCs.
With the cancellation of Workplace OS, the general
(especially AIM's Common Hardware Reference Platform) was instead seen
as a hardware-only compromise to run many operating systems one at a
time upon a single unifying vendor-neutral hardware
In parallel with the alliance between
IBM and Motorola, both companies
had development efforts underway internally. The
PowerQUICC line was
the result of this work inside Motorola. The 4xx series of embedded
processors was underway inside IBM. The
IBM embedded processor
business grew to nearly US$100 million in revenue and attracted
hundreds of customers.
The development of the
PowerPC is centered at an Austin, Texas,
facility called the Somerset Design Center. The building is named
after the site in Arthurian legend where warring forces put aside
their swords, and members of the three teams that staff the building
say the spirit that inspired the name has been a key factor in the
project's success thus far.
Part of the culture here is not to have an
Motorola or Apple
culture, but to have our own.
— Motorola's Russell Stanphill, codirector of Somerset
Breakup of AIM
Toward the close of the decade, manufacturing issues began plaguing
AIM alliance in much the same way they did Motorola, which
consistently pushed back deployments of new processors for Apple and
other vendors: first from
Motorola in the 1990s with the
and 74xx processors, and
IBM with the
PowerPC 970 processor in
2003. In 2004,
Motorola exited the chip manufacturing business by
spinning off its semiconductor business as an independent company
called Freescale Semiconductor. Around the same time,
IBM exited the
32-bit embedded processor market by selling its line of PowerPC
Applied Micro Circuits Corporation
Applied Micro Circuits Corporation (AMCC) and focusing on
64-bit chip designs, while maintaining its commitment of
toward game console makers such as Nintendo's
GameCube and Wii, Sony's
PlayStation 3 and Microsoft's Xbox 360, of which the latter two both
64-bit processors. In 2005 Apple announced they would no longer
PowerPC processors in their Apple Macintosh computers, favoring
Intel-produced processors instead, citing the performance limitations
of the chip for future personal computer hardware specifically related
to heat generation and energy usage, as well as the inability of IBM
to move the 970 processor to the 3 GHz range. The IBM-Freescale
alliance was replaced by an open standards body called Power.org.
Power.org operates under the governance of the IEEE with IBM
continuing to use and evolve the
PowerPC processor on game consoles
Freescale Semiconductor focusing solely on embedded devices.
A schematic showing the evolution of the different POWER,
IBM continues to develop
PowerPC microprocessor cores for use in their
application-specific integrated circuit (ASIC) offerings. Many high
volume applications embed
PowerPC specification is now handled by
Power.org where IBM,
Freescale, and AMCC are members. PowerPC, Cell and POWER processors
are now jointly marketed as the Power Architecture.
a unified ISA, combining POWER and
PowerPC ISAs into the new Power ISA
v.2.03 specification and a new reference platform for servers called
Power Architecture Platform Reference).
As of 2015[update], IBM's POWER microprocessors, which implement the
Power ISA, are used by
IBM in their
IBM Power Systems, running
AIX, and Linux.
PowerPC designs are named and labeled by their apparent
technology generation. That began with the "G3", which was an internal
project name inside AIM for the development of what would become the
PowerPC 750 family. Apple popularized the term "G3" when they
introduced Power Mac G3 and
PowerBook G3 at an event at 10 November
Motorola and Apple liked the moniker and used the term "G4" for
the 7400 family introduced in 1998 and the
Power Mac G4
Power Mac G4 in 1999.
At the time of the G4 was launched,
Motorola categorized all their
PowerPC models (former, current and future) according to what
generation they adhered to, even renaming the older 603e core "G2".
Motorola had a G5 project that never came to fruition, but the name
stuck and Apple reused it when the 970 family launched in 2003 even if
those were designed and built by IBM.
PowerPC generations according to Motorola, ca 2000.
G1 - The 601, 500 and 800 family processors
G2 - The 602, 603, 604, 620, 8200 and 5000 families
G3 - The 750 and 8300 families
G4 - The 7400 and 8400* families
G5 - The 7500* and 8500 families (
Motorola didn't use the G5 moniker
after Apple usurped the name)
G6 - The 7600*
(*) These designs didn't become real products.
Made by Freescale
PowerPC e series (2006)
Qor series (2008)
Made by IBM
POWER ISA (1990)
POWER series (1990)
PowerPC series (1992)
RAD series (1997)
Cancelled in gray, historic in italic
PowerPC is designed along
RISC principles, and allows for a
superscalar implementation. Versions of the design exist in both
64-bit implementations. Starting with the basic POWER
Support for operation in both big-endian and little-endian modes; the
PowerPC can switch from one mode to the other at run-time (see below).
This feature is not supported in the
Single-precision forms of some floating point instructions, in
addition to double-precision forms
Additional floating point instructions at the behest of Apple
64-bit specification that is backward compatible with the
A fused multiply–add
A paged memory management architecture that is used extensively in
server and PC systems.
Addition of a new memory management architecture called Book-E,
replacing the conventional paged memory management architecture for
embedded applications. Book-E is application software compatible with
PowerPC implementations, but needs minor changes to the
Some instructions present in the POWER instruction set were deemed too
complex and were removed in the
PowerPC architecture. Some removed
instructions could be emulated by the operating system if necessary.
The removed instructions are:
Load and store instructions for the quad-precision floating-point data
PowerPC chips switch endianness via a bit in the MSR (machine
state register), with a second bit provided to allow the OS to run
with a different endianness. Accesses to the "inverted page table" (a
hash table that functions as a TLB with off-chip storage) are always
done in big-endian mode. The processor starts in big-endian mode.
In little-endian mode, the three lowest-order bits of the effective
address are exclusive-ORed with a three bit value selected by the
length of the operand. This is enough to appear fully little-endian to
normal software. An operating system will see a warped view of the
world when it accesses external chips such as video and network
hardware. Fixing this warped view requires that the motherboard
perform an unconditional
64-bit byte swap on all data entering or
leaving the processor.
Endianness thus becomes a property of the
motherboard. An OS that operates in little-endian mode on a big-endian
motherboard must both swap bytes and undo the exclusive-OR when
accessing little-endian chips.
AltiVec operations, despite being 128-bit, are treated as if they were
64-bit. This allows for compatibility with little-endian motherboards
that were designed prior to AltiVec.
An interesting side effect of this implementation is that a program
can store a
64-bit value (the longest operand format) to memory while
in one endian mode, switch modes, and read back the same
without seeing a change of byte order. This will not be the case if
the motherboard is switched at the same time.
Mercury Systems and
Matrox ran the
PowerPC in little-endian mode. This
was done so that
PowerPC devices serving as co-processors on PCI
boards could share data structures with host computers based on x86.
Both PCI and x86 are little-endian.
Windows NT for PowerPC
ran the processor in little-endian mode while Solaris,
AIX and Linux
ran in big endian.
Some of IBM's embedded
PowerPC chips use a per-page endianness bit.
None of the previous applies to them.
PowerPC 604e 200 MHz
PowerPC CPU from the
Wii video game console
The Freescale XPC855T Service Processor of a Sun
The first implementation of the architecture was the
released in 1992, based on the RSC, implementing a hybrid of the
PowerPC instructions. This allowed the chip to be used by
IBM in their existing POWER1-based platforms, although it also meant
some slight pain when switching to the 2nd generation "pure" PowerPC
designs. Apple continued work on a new line of Macintosh computers
based on the chip, and eventually released them as the 601-based Power
Macintosh on March 14, 1994.
IBM also had a full line of
PowerPC based desktops built and ready to
ship; unfortunately, the operating system that
IBM had intended to run
on these desktops—
Microsoft Windows NT—was not complete by early
1993, when the machines were ready for marketing. Accordingly, and
IBM had developed animosity toward Microsoft, IBM
decided to port
OS/2 to the
PowerPC in the form of Workplace OS. This
new software platform spent three years (1992 to 1995) in development
and was canceled with the December 1995 developer release, because of
the disappointing launch of the
PowerPC 620. For this reason, the IBM
PowerPC desktops did not ship, although the reference design
(codenamed Sandalbow) based on the
PowerPC 601 CPU was released as an
RS/6000 model (Byte's April 1994 issue included an extensive article
about the Apple and
Apple, which also lacked a
PowerPC based OS, took a different route.
Utilizing the portability platform yielded by the secret Star Trek
project, the company ported the essential pieces of their Mac OS
operating system to the
PowerPC architecture, and further wrote a 68k
emulator that could run
68k based applications and the parts of the OS
that had not been rewritten.
The second generation was "pure" and includes the "low end" PowerPC
603 and "high end"
PowerPC 604. The 603 is notable due to its very low
cost and power consumption. This was a deliberate design goal on
Motorola's part, who used the 603 project to build the basic core for
all future generations of PPC chips. Apple tried to use the 603 in a
new laptop design but was unable due to the small 8 KiB level 1
cache. The 68000 emulator in the Mac OS could not fit in 8 KiB
and thus slowed the computer drastically. The 603e
solved this problem by having a 16 KiB L1 cache, which allowed
the emulator to run efficiently.
In 1993, developers at IBM's Essex Junction, Burlington, Vermont
facility started to work on a version of the
PowerPC that would
Intel x86 instruction set directly on the CPU. While this
was just one of several concurrent power architecture projects that
IBM was working on, this chip began to be known inside
IBM and by the
media as the
PowerPC 615. Profitability concerns and rumors of
performance issues in the switching between the x86 and native PowerPC
instruction sets resulted in the project being canceled in 1995 after
only a limited number of chips were produced for in-house testing.
Aside the rumors, the switching process took only 5 cycles, or the
amount of time needed for the processor to empty its instruction
Microsoft also aided the processor's demise by refusing to
64-bit implementation is the
PowerPC 620, but it appears to
have seen little use because Apple didn't want to buy it and because,
with its large die area, it was too costly for the embedded market. It
was later and slower than promised, and
IBM used their own POWER3
design instead, offering no
64-bit "small" version until the late-2002
introduction of the
PowerPC 970. The 970 is a
64-bit processor derived
POWER4 server processor. To create it, the
POWER4 core was
modified to be backward-compatible with
PowerPC processors, and
a vector unit (similar to the
AltiVec extensions in Motorola's 74xx
series) was added.
IBM's RS64 processors are a family of chips implementing the "Amazon"
variant of the
PowerPC architecture. These processors are used in the
RS/6000 and AS/400 computer families; the Amazon architecture includes
proprietary extensions used by AS/400. The
POWER4 and later POWER
processors implement the Amazon architecture and replaced the RS64
chips in the
RS/6000 and AS/400 families.
IBM developed a separate product line called the "4xx" line focused on
the embedded market. These designs included the 401, 403, 405, 440,
and 460. In 2004,
IBM sold their 4xx product line to Applied Micro
Circuits Corporation (AMCC). AMCC continues to develop new high
performance products, partly based on IBM's technology, along with
technology that was developed within AMCC. These products focus on a
variety of applications including networking, wireless, storage,
printing/imaging and industrial automation.
PowerPC is mostly found in controllers in cars. For
the automotive market,
Freescale Semiconductor initially offered many
variations called the
MPC5xx family such as the MPC555, built on a
variation of the 601 core called the 8xx and designed in Israel by
Motorola Silicon Israel Limited). The 601 core is single issue,
meaning it can only issue one instruction in a clock cycle. To this
they add various bits of custom hardware, to allow for I/O on the one
chip. In 2004, the next-generation four-digit 55xx devices were
launched for the automotive market. These use the newer e200 series of
Networking is another area where embedded
PowerPC processors are found
in large numbers. MSIL took the
QUICC engine from the MC68302 and made
PowerQUICC MPC860. This was a very famous processor used in many
Cisco edge routers in the late 1990s. Variants of the PowerQUICC
include the MPC850, and the MPC823/MPC823e. All variants include a
RISC microengine called the CPM that offloads communications
processing tasks from the central processor and has functions for DMA.
The follow-on chip from this family, the MPC8260, has a 603e-based
core and a different CPM.
Honda also uses
PowerPC processors for ASIMO.
In 2003, BAE SYSTEMS Platform Solutions delivered the
Vehicle-Management Computer for the F-35 fighter jet. This platform
consists of dual PowerPCs made by Freescale in a triple redundant
Operating systems that work on the
PowerPC architecture are generally
divided into those that are oriented toward the general-purpose
PowerPC systems, and those oriented toward the embedded PowerPC
Operating systems with native support
Apple classic Mac OS starting with System 7.1.2; and Copland, the
original and canceled attempt at Mac OS 8
BeOS R5 Pro (BeBox, Macintosh and clones)
IBM i; formerly named i5/OS, originally OS/400
Inferno; from Bell Labs and maintained by Vita Nuova Holdings
POSIX: Unix, Unix-like
Mac OS X
Mac OS X through
Mac OS X
Mac OS X Leopard 10.5.8
Workplace OS, including a port of OS/2
NetBSD, port designations for
amigappc very experimental
32-bit macppc released port
CRUX PPC, with 32/
64-bit releases supported through release
18.104.22.168. Support was dropped from subsequent releases.
32-bit powerpc a released port since potato Support has been
Debian 9 Stretch
64-bit big-endian ppc64 in mostly stalled development
64-bit little-endian ppc64le a released port since jessie
Fedora with 32/
64-bit ppc releases up to version 12.
PowerPC is a
Fedora secondary architecture from Fedora 16 onwards.
Gentoo Linux, with
32-bit ppc releases and
64-bit ppc64 releases
MintPPC, support for Old World and New World 32/
64-bit Macs based on
Linux Mint LXDE and Debian
MkLinux, Mach-kernel based distribution for older Macs, officially
launched by Apple
OpenSUSE, Full support for Old World and New World PowerMacs
(32/64-bit), PS3 Cell,
IBM POWER systems through the release of 11.1.
Support was dropped from subsequent releases.
Red Hat Enterprise Linux,
32-bit ppc support was dropped following
release of 5.11. Maintaining full support for
64-bit ppc64 in
Linux Enterprise Server
Ubuntu, community supported for versions released after 6.10
Yellow Dog Linux, full support for 32/64-bit; PS3
PowerPC edition on the
Windows NT 3.51
Windows NT 3.51 and 4.0
PowerPC port no longer under active development
CellOS for PlayStation 3
Wind River Linux
PikeOS RTOS and virtualization platform from SYSGO
ELinOS embedded Linux
Linux from LynuxWorks
Operating System Embedded (OSE) from ENEA AB
Junos router and switch OS
SCIOPTA RTOS, certified according IEC61508, EN50128 and ISO26262
PowerPC Operating System by IBM
Companies that have licensed the
64-bit POWER or
Altera, field-programmable gate array (FPGA) manufacturer now Intel
Apple ('A' in original AIM alliance), has switched to
Intel in early
Applied Micro Circuits Corporation
Applied Micro Circuits Corporation (AMCC)
BAE Systems for
RAD750 processor, used in spacecraft and planetary
Cisco Systems for routers
Culturecom for V-Dragon CPU
Kumyoung used in karaoke player CPU (Muzen and Vivaus series)
Freescale Semiconductor now
NXP soon Qualcomm), as part
of the original AIM alliance
Kilocore 1025 core CPU
STMicroelectronics for the SPC5xx series
FPGA maker, embedded
PowerPC in the Virtex-II Pro, Virtex-4,
and Virtex-5 FPGAs
Hindustan Computers Ltd.
PowerPC based game consoles
PowerPC processors have been used in a number of video game consoles:
Bandai for its
Bandai Pippin, designed by
Apple Computer (1995)
Microsoft, for the
Xbox 360 processor, Xenon
Nintendo for the GameCube, Wii, and
Wii U processors
Sony and Toshiba, for the Cell processor (inside the
PlayStation 3 and
The Power architecture is currently used in the following desktop
Sam440ep, Sam440epFlex, based on an AMCC 440ep SoC, built by ACube
Sam460ex, based on an AMCC 460ex SoC, built by ACube Systems
Nemo motherboard based around PA6T-1682M found in the
from A-EON Technology
Cyrus motherboard based around Freescale Qoriq P5020 found in the
AmigaOne X5000 from A-EON Technology
Tabor motherboard based around Freescale
QorIQ P1022 found in the
AmigaOne A1222 from A-EON Technology
The Power architecture is currently used in the following embedded
National Instruments Smart Cameras for machine vision
Mars rover Curiosity
Common Hardware Reference Platform (CHRP)
Power Architecture Platform Reference (PAPR)
PowerPC Reference Platform (PReP)
RTEMS real-time operating system
Vasm, a free assembler
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PowerPC Architecture, a 640-page PDF manual. P/N MPCFPE32B/AD.
IBM (2000). Book E: Enhanced
PowerPC Architecture (3rd ed.)
Duntemann, Jeff; Pronk, Ron (1994). Inside the
Coriolis Group Books. ISBN 1-883577-04-7.
PowerPC Architecture, an
IBM article giving POWER and
PPC Overview - an overview of
PowerPC Edition review by Michal Necasek
PowerPC Architecture History Diagram
NXP processors and microcontrollers
Industrial control unit
see also: Hitachi 6309
Embedded system 68k-variants
Memory management unit
Reduced instruction set computer
Reduced instruction set computer (RISC) architectures
Altera Nios II
Analog Devices Blackfin
XMOS XCore XS1
Special function register
In-circuit serial programming
In-circuit serial programming (ICSP)
In-system programming (ISP)
Program and Debug Interface (PDI)
High-voltage serial programming (HVSP)
High voltage parallel programming (HVPP)
Joint Test Action Group
Joint Test Action Group (JTAG)
In-circuit debugging (ICD)
In-circuit emulator (ICE)
In-target probe (ITP)
List of common microcontrollers
List of Wi-Fi microcontrollers
Programmable logic controller
Universal Turing machine
Quantum Turing machine
Random access machine
Random access stored program machine
Artificial neural network
Neural processing unit (NPU)
Convolutional neural network
Register memory architecture
Adiabatic quantum computing
Linear optical quantum computing
Symmetric multiprocessing (SMP)
Asymmetric multiprocessing (AMP)
Power Architecture (PowerPC)
Memory dependence prediction
Simultaneous (SMT) (Hyper-threading)
Clustered Multi-Thread (CMT)
Instructions per second (IPS)
Instructions per clock (IPC)
Cycles per instruction (CPI)
Floating-point operations per second (FLOPS)
Transactions per second (TPS)
Synaptic Updates Per Second (SUPS)
Performance per watt
Orders of magnitude (computing)
Cache performance measurement and metric
Central processing unit
Central processing unit (CPU)
Vision processing unit (VPU)
Digital signal processor
Digital signal processor (DSP)
I/O processor/DMA controller
Physics processing unit
Physics processing unit (PPU)
Multi-chip module (MCM)
Chip stack multi-chip modules
System on a chip
System on a chip (SoC)
Multiprocessor system-on-chip (MPSoC)
Network on a chip (NoC)
Execution unit (EU)
Arithmetic logic unit
Arithmetic logic unit (ALU)
Address generation unit
Address generation unit (AGU)
Floating-point unit (FPU)
Load-store unit (LSU)
Unified Reservation Station
Sum addressed decoder (SAD)
Memory management unit
Memory management unit (MMU)
Input–output memory management unit
Input–output memory management unit (IOMMU)
Memory Controller (IMC)
Power Management Unit (PMU)
Translation lookaside buffer
Translation lookaside buffer (TLB)
Memory buffer register (MBR)
Three-dimensional integrated circuit
Mixed-signal integrated circuit
Power management integrated circuit
Emitter-coupled logic (ECL)
Transistor–transistor logic (TTL)
Dynamic frequency scaling
Dynamic voltage scaling
Non-executable memory (NX bit)
Memory Protection Extensions (
Intel Secure Key
Hardware restriction (firmware)
Software Guard Extensions (
Trusted Execution Technology
Trusted Platform Module
Trusted Platform Module (TPM)
Hardware security module
History of general-