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List Of PowerPC Processors
The following is a list of PowerPC processors. General-purpose PowerPC processors IBM/Motorola PowerPC 600 family * 601 50 and 66 MHz * 602 consumer products (multiplexed data/address bus) * 603/ 603e/ 603ev notebooks, embedded devices * 604/ 604e/ 604ev workstations and low end servers * 620 the first 64-bit implementation PowerPC 7xx family * 740/750 (1997) 233–366 MHz Motorola/Freescale PowerPC 7xx family * PowerPC 740 and 750, 233–366 MHz * 745/755, 300–466 MHz PowerPC 74xx family * 7400/7410 350–550 MHz, uses AltiVec, a SIMD extension of the original PPC specs * 7440/7450 micro-architecture family up to 1.5 GHz and 256 kB on-chip L2 cache and improved Altivec * 7447/7457 micro-architecture family up to 1.83 GHz with 512 kB on-chip L2 cache * 7448 micro-architecture family (2.0 GHz) in 90 nm with 1MB L2 cache and slightly improved AltiVec (out of order instructions). *8640/8641/8640D/8641D with one ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 600
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the first Apple Power M ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
90 Nanometer
The 90 nm process refers to the level of MOSFET ( CMOS) fabrication process technology that was commercialized by the 2003–2005 timeframe, by leading semiconductor companies like Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, Elpida, AMD, Infineon, Texas Instruments and Micron Technology. The origin of the 90 nm value is historical, it reflects a trend of 70% scaling every 2–3 years. The naming is formally determined by the International Technology Roadmap for Semiconductors (ITRS). The 193 nm wavelength was introduced by many (but not all) companies for lithography of critical layers mainly during the 90 nm node. Yield issues associated with this transition (due to the use of new photoresists) were reflected in the high costs associated with this transition. Even more significantly, the 300 mm wafer size became mainstream at the 90 nm node. The previous wafer size was 200 mm diameter. History A 90nm silicon MOSFET was fabric ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Titan (microprocessor)
Titan was a planned family of 32-bit Power ISA-based microprocessor cores designed by Applied Micro Circuits Corporation (AMCC), but was scrapped in 2010. Applied Micro chose to continue development of the PowerPC 400 core instead, on a 40 nm fabrication process. Details It was designed to be the foundation of embedded processors and system-on-a-chip (SoC) solutions. While being high performance, reaching speeds up to 2 GHz, it would remain extremely power efficient, drawing just 2.5 W per core. Where there usually is a trade-off between performance and power, AMCC used the ''Fast14'' technology from Intrinsity to build an extremely efficient microprocessor design leveraging high performance combined with low power and comparably cheap bulk 90 nm CMOS manufacturing. By using NMOS transistors and no latches, the design results in a chip with fewer transistors than traditional design, thus reducing cost. The design allows for dual core SoC implementations consumin ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 400
The PowerPC 400 family is a line of 32-bit embedded RISC processor cores based on the PowerPC or Power ISA instruction set architectures. The cores are designed to fit inside specialized applications ranging from system-on-a-chip (SoC) microcontrollers, network appliances, application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs) to set-top boxes, storage devices and supercomputers. Applied Micro Circuits Corporation (AMCC) bought assets concerning the 400 family cores from IBM in April 2004 for $227 million, and they now market the processors under their own name. IBM continues evolving the cores while supplying design and foundry services around the cores. Several cores are also available for licensing by OEMs from IBM and Synopsys. Variants PowerPC 403 Introduced in 1994, the PowerPC 403 was one of the first PowerPC processors. It was the first one targeted strictly to the embedded market. Compared to the other PowerPC processors of th ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CoreConnect
__NOTOC__ CoreConnect is a microprocessor bus-architecture from IBM for system-on-a-chip (SoC) designs. It was designed to ease the integration and reuse of processor, system, and peripheral cores within standard and custom SoC designs. As a standard SoC design point, it serves as the foundation of IBM or non-IBM devices. Elements of this architecture include the processor local bus (PLB), the on-chip peripheral bus (OPB), a bus bridge, and a device control register (DCR) bus. High-performance peripherals connect to the high-bandwidth, low- latency PLB. Slower peripheral cores connect to the OPB, which reduces traffic on the PLB. CoreConnect has bridging capabilities to the competing AMBA bus architecture, allowing reuse of existing SoC-components. IBM makes the CoreConnect bus available as a no-fee, no-royalty architecture to tool-vendors, core IP-companies, and chip-development companies. As such it is licensed by over 1500 electronics companies such as Cadence, Ericsson, Luce ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PWRficient
PWRficient is a microprocessor series by P.A. Semi where the PA6T-1682M was the only one that became an actual product. PWRficient processors comply with the 64-bit Power ISA, and are designed for high performance and extreme power efficiency. The processors are highly modular and can be combined to multi-core system-on-a-chip (SoC) designs, combining CPU, northbridge, and southbridge functionality on a single processor die. Details The PA6T is the first and only processor core from P.A. Semi, in two distinct product lines: 16xxM dual core and 13xxM/E single core. The PA6T lines differed in L2 cache size, memory controllers, communication functionality, and cryptography offloading features. P.A. Semi planned up to 16 cores. The PA6T is the first Power ISA core designed from scratch in the previous ten years outside the AIM alliance, which included IBM, Motorola, Freescale, and Apple Inc. Since Texas Instruments was an investors in P.A. Semi, it was suggested that its fabr ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
BiCMOS
Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two semiconductor technologies, those of the bipolar junction transistor and the CMOS (complementary metal-oxide-semiconductor) logic gate, into a single integrated circuit. In more recent times the bipolar processes have been extended to include high mobility devices using silicon–germanium junctions. Bipolar transistors offer high speed, high gain, and low output impedance with relatively high power consumption per device, which are excellent properties for high-frequency analog amplifiers including low noise radio frequency (RF) amplifiers that only use a few active devices, while CMOS technology offers high input impedance and is excellent for constructing large numbers of low-power logic gates. In a BiCMOS process the doping profile and other process features may be tilted to favour either the CMOS or the bipolar devices. For example GlobalFoundries offer a basic 180 nm BiCMOS7WL process and several ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
X704
The x704 is a microprocessor that implements the 32-bit version of the PowerPC instruction set architecture (ISA) developed by Exponential Technology. The microprocessor was notable for its high clock frequency (for the time, circa 1997) in the range of 400 to 533 MHz, its use of Bipolar junction transistor, bipolar transistors for logic and CMOS circuits for memory, and its failure to see use in an Apple, Inc, Apple Apple Macintosh, Macintosh, the opposite of what industry observers such as ''Microprocessor Report'' expected. Exponential Technology eventually failed as a result of the x704's lack of success, but some of its former employees founded Intrinsity, a start-up that developed a high clock frequency MIPS architecture, MIPS implementation, FastMATH. The company has been acquired by Apple, Inc, Apple and licensed Fast14 Dynamic logic (digital logic), dynamic logic to third parties such as ATI Technologies, ATI for their GPUs. The x704 is a superscalar microprocessor that iss ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Exponential Technology
Exponential Technology was a vendor of PowerPC microprocessors. The company was founded by George Taylor and Jim Blomgren in 1993. The company's plan was to use BiCMOS technology to produce very fast processors for the Apple Computer market. Logic used 3-level ECL circuits (single-ended for control logic, and differential for datapaths) while RAM structures used CMOS. The company was originally named Renaissance Microsystems. Rick Shriner was the CEO. Their chips were manufactured by Hitachi. Their product, the Exponential X704, was advertised to run at 533 MHz, but the first version of the device only ran at about 400 MHz, still significantly faster than the 233 MHz PowerPC 604e used in Macintosh computers at the time. This lower frequency along with small level-one caches, produced systems which had good but not stellar performance. This allowed Motorola (Apple's traditional processor vendor), to convince the computer maker that Motorola's future roadmap would pr ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Blue Gene/Q
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with low power consumption. The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, and Blue Gene/Q. During their deployment, Blue Gene systems often led the TOP500 and Green500 rankings of the most powerful and most power-efficient supercomputers, respectively. Blue Gene systems have also consistently scored top positions in the Graph500 list. The project was awarded the 2009 National Medal of Technology and Innovation. As of 2015, IBM seems to have ended the development of the Blue Gene family though no public announcement has been made. IBM's continuing efforts of the supercomputer scene seems to be concentrated around OpenPower, using accelerators such as FPGAs and GPUs to battle the end of Moore's law. History In December 1999, IBM announced a US$100 million research initiative for a five-year effort to build a m ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Blue Gene/P
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the FLOPS, petaFLOPS (PFLOPS) range, with low power consumption. The project created three generations of supercomputers, Blue Gene/L, Blue Gene/P, and Blue Gene/Q. During their deployment, Blue Gene systems often led the TOP500 and Green500 rankings of the most powerful and most power-efficient supercomputers, respectively. Blue Gene systems have also consistently scored top positions in the Graph500 list. The project was awarded the 2009 National Medal of Technology and Innovation. As of 2015, IBM seems to have ended the development of the Blue Gene family though no public announcement has been made. IBM's continuing efforts of the supercomputer scene seems to be concentrated around OpenPOWER Foundation, OpenPower, using accelerators such as FPGAs and GPUs to battle the end of Moore's law. History In December 1999, IBM announced a US$100 million research initiative for a five- ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
