Goldmont Plus is a microarchitecture for low-power

Atom Every atom is composed of a nucleus and one or more electrons bound to the nucleus. The nucleus is made of one or more protons and a number of neutrons. Only the most common variety of hydrogen has no neutrons. Every solid, liquid, gas, ...

Celeron Celeron is Intel's brand name for low-end IA-32 and x86-64 computer microprocessor models targeted at low-cost personal computers. Celeron processors are compatible with IA-32 software. They typically offer less performance per clock speed com ...

and Pentium Silver branded processors used in systems on a chip (SoCs) made by

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...

. The ''Gemini Lake'' platform with 14 nm Goldmont Plus core was officially launched on December 11, 2017. Intel launched the ''Gemini Lake Refresh'' platform on November 4, 2019.

Design

Goldmont Plus is an enhanced 2nd generation out-of-order low-power

microarchitecture designed for entry level desktop and notebook computers. Goldmont Plus is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the Intel Gen9 graphics architecture with improvements introduced with the

Kaby Lake Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's ...

microarchitecture. The Goldmont Plus microarchitecture builds on the success of the Goldmont microarchitecture, and provides the following enhancements: * Widened previous generation Atom processor back-end

pipeline Pipeline may refer to: Electronics, computers and computing * Pipeline (computing), a chain of data-processing stages or a CPU optimization found on ** Instruction pipelining, a technique for implementing instruction-level parallelism within a s ...

to 4-wide allocation to 4-wide retire, while maintaining 3-wide fetch and decode pipeline. * Enhanced branch prediction unit. * 64 KB shared second level pre-decode cache (16 KB in Goldmont microarchitecture). * Larger

reservation station A unified reservation station, also known as unified scheduler, is a decentralized feature of the microarchitecture of a CPU that allows for register renaming, and is used by the Tomasulo algorithm for dynamic instruction scheduling. Reservat ...

and re-order buffer entries to support large out-of-order window. * Wider integer

execution unit In computer engineering, an execution unit (E-unit or EU) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program. It may have its own internal control sequence unit (not ...

. New dedicated JEU port with support for faster branch redirection. * Radix-1024

floating point In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...

divider for fast scalar/packed single, double and extended precision floating point divides. * Improved

AES-NI An Advanced Encryption Standard instruction set is now integrated into many processors. The purpose of the instruction set is to improve the speed and security of applications performing encryption and decryption using Advanced Encryption Standard ...

instruction latency and throughput. * Larger load and store buffers. Improved store-to-load forwarding latency store data from register. * Shared instruction and data second level TLB. Paging cache enhancements (PxE/ePxE caches). * Modular system design with four cores sharing up to 4 MB

L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...

. * Support for Read Processor ID (RDPID) new instruction.

Technology

* A

14 nm The 14 nm process refers to the MOSFET technology node that is the successor to the 22nm (or 20nm) node. The 14nm was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following 22nm was e ...

manufacturing process * System on a chip architecture * 3D

tri-gate transistor The 22 nm node is the process step following 32 nm process, 32 nm in CMOS MOSFET semiconductor device fabrication. The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is arou ...

s * Consumer chips up to four cores * Supports

SSE4.2 SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core (microarchitecture), Core microarchitecture and AMD K10, AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vag ...

instruction set * Supports Intel AESNI and PCLMUL instructions * Supports Intel RDRAND and RDSEED instructions * Supports

Intel SHA extensions Intel SHA Extensions are a set of extensions to the x86 instruction set architecture which support hardware acceleration of Secure Hash Algorithm (SHA) family. It was introduced in 2013. There are seven new SSE-based instructions, four supportin ...

* Supports

Intel MPX Intel MPX (Memory Protection Extensions) was a set of extensions to the x86 instruction set architecture. With compiler, runtime library and operating system support, Intel MPX claimed to enhance security to software by checking pointer reference ...

(Memory Protection Extensions) * Supports

Intel SGX Intel Software Guard Extensions (SGX) is a set of security-related instruction codes that are built into some Intel central processing units (CPUs). They allow user-level and operating system code to define protected private regions of memory, cal ...

* 4 MB

, up from 2MB in Goldmont * Updated Gen 9

Intel HD Graphics Intel Graphics Technology (GT) is the collective name for a series of integrated graphics processors (IGPs) produced by Intel that are manufactured on the same package or die as the central processing unit (CPU). It was first introduced in 2010 ...

with

DirectX 12 Microsoft DirectX is a collection of application programming interfaces (APIs) for handling tasks related to multimedia, especially game programming and video, on Microsoft platforms. Originally, the names of these APIs all began with "Direct" ...

, OpenGL 4.6, OpenGL ES 3.2 and OpenCL 2.0 support. *

HEVC High Efficiency Video Coding (HEVC), also known as H.265 and MPEG-H Part 2, is a video compression standard designed as part of the MPEG-H project as a successor to the widely used Advanced Video Coding (AVC, H.264, or MPEG-4 Part 10). In compar ...

Main10 &

VP9 VP9 is an open and royalty-free video coding format developed by Google. VP9 is the successor to VP8 and competes mainly with MPEG's High Efficiency Video Coding (HEVC/H.265). At first, VP9 was mainly used on Google's video platform YouTube. ...

10-bit Profile2 hardware decoding support * Integrated native HDMI 2.0 display controller (Goldmont only supported HDMI 1.4 natively) * 10 W

thermal design power The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipate ...

(TDP) desktop processors * 4.8 to 6.0 W TDP mobile processors *

eMMC The MultiMediaCard, officially abbreviated as MMC, is a memory card standard used for solid-state storage. Unveiled in 1997 by SanDisk and Siemens, MMC is based on a surface-contact low pin-count serial interface using a single memory stack sub ...

5.1 technology to connect to NAND flash storage *

USB 3.1 USB 3.0, released in November 2008, is the third major version of the Universal Serial Bus (USB) standard for interfacing computers and electronic devices. Among other improvements, USB 3.0 adds the new transfer rate referred to as '' ...

and

USB-C USB-C (properly known as USB Type-C) is a 24-pin USB connector system with a rotationally symmetrical connector. The designation C refers only to the connector's physical configuration or form factor and should not be confused with the conn ...

specification * Support for DDR4 and LPDDR4 memory * Supports CNVi

List of Goldmont Plus processors

Desktop processors (Gemini Lake)

List of desktop processors as follows:

Mobile processors (Gemini Lake)

List of mobile processors as follows:

Desktop processors (Gemini Lake Refresh)