A GATE ARRAY or UNCOMMITTED LOGIC ARRAY (ULA) is an approach to the design and manufacture of application-specific integrated circuits (ASICs), using a prefabricated chip with active devices like NAND-gates, that are later interconnected according to a custom order by adding metal layers in the factory.
* 1 Design * 2 History * 3 Field programmable gate array * 4 References
A gate array circuit is a prefabricated silicon chip circuit with no particular function, in which transistors , standard NAND or NOR logic gates , and other active devices are placed at regular predefined positions and manufactured on a wafer , usually called a master slice. Creation of a circuit with a specified function is accomplished by adding a final surface layer or layers of metal interconnects to the chips on the master slice late in the manufacturing process, joining these elements to allow the function of the chip to be customized as desired. This layer is analogous to the copper layer(s) of a printed circuit board (PCB).
An application circuit must be built on a gate array that has enough gates, wiring and I/O pins. Since requirements vary, gate arrays usually come in families, with larger members having more of all resources, but correspondingly more expensive. While the designer can fairly easily count how many gates and I/Os pins are needed, the amount of routing tracks needed may vary considerably even among designs with the same amount of logic. (For example, a crossbar switch requires much more routing than a systolic array with the same gate count.) Since unused routing tracks increase the cost (and decrease the performance) of the part without providing any benefit, gate array manufacturers try to provide just enough tracks so that most designs that will fit in terms of gates and I/O pins can be routed. This is determined by estimates such as those derived from Rent\'s rule or by experiments with existing designs.
The main drawbacks of gate arrays are their somewhat lower density and performance compared with other approaches to ASIC design. However this style is often a viable approach for low production volumes.
Designers still wished for a way to create their own complex chips without the expense of full-custom design, and eventually this wish was granted with the arrival of the field-programmable gate array (FPGA), complex programmable logic device (CPLD), metal configurable standard cells (MCSC), and structured ASIC. Whereas a ULA required a semiconductor wafer foundry to deposit and etch the interconnections, the FPGA and CPLD had programmable interconnections. Today's approach is to make the prototypes by FPGAs, as the risk is low and the functionality can be verified quickly, but for production FPGAs are very expensive, power hungry, and in many cases do not reach the required speed. To address these issues, several ASIC companies like BaySand, Faraday, Gigoptics and others offer FPGA to ASIC conversion services.
FIELD PROGRAMMABLE GATE ARRAY
Field programmable gate array are manufactured e.g. by
* ^ Т34ВГ1 — article about the