Sun Microsystems Sun Microsystems, Inc. (Sun for short) was an American technology company that sold computers, computer components, software, and information technology services and created the Java programming language, the Solaris operating system, ZFS, the ...

' UltraSPARC T2

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...

is a multithreading,

multi-core A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such a ...

CPU A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, and ...

. It is a member of the

SPARC SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed ...

family, and the successor to the

UltraSPARC T1 Sun Microsystems' UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename "Niagara", is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU ty ...

. The chip is sometimes referred to by its codename, Niagara 2. Sun started selling servers with the T2 processor in October 2007.

New features

The T2 is a commodity derivative of the

UltraSPARC The UltraSPARC is a microprocessor developed by Sun Microsystems and fabricated by Texas Instruments, introduced in mid-1995. It is the first microprocessor from Sun to implement the 64-bit SPARC V9 instruction set architecture (ISA). Marc Trembl ...

series of microprocessors, targeting Internet workloads in computers, storage and networking devices. The processor, manufactured in

65 nm The 65 nm process is an advanced lithographic node used in volume CMOS ( MOSFET) semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitc ...

, is available with eight CPU cores, and each core is able to handle eight threads concurrently. Thus the processor is capable of processing up to 64 concurrent threads. Other new features include: * Speed bump for each thread, which increased the frequency from 1.2

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...

to 1.6 GHz * One

PCI Express PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common ...

port (x8 1.0) vs. the T1's JBus interface * Two

Sun Neptune Neptune, also known as Sun Multithreaded 10 GbE, is a dual 10 Gbit/s, multithreaded, PCIe x8-based network interface controller for 10 Gigabit Ethernet. It was developed and originally produced by Sun Microsystems, and later licensed to Marvell Te ...

10 Gigabit Ethernet 10 Gigabit Ethernet (10GE, 10GbE, or 10 GigE) is a group of computer networking technologies for transmitting Ethernet frames at a rate of 10 gigabits per second. It was first defined by the IEEE 802.3ae-2002 standard. Unlike previous Eth ...

ports (embedded into the T2 processor) with packet classification and filtering *

L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...

size increased to 4 MB (8-banks, 16-way associative) from 3 MB * Improved thread scheduling and instruction prefetching to achieve higher single-threaded performance * Two integer ALUs per core instead of one, each one being shared by a group of four threads * One

floating point unit Floating may refer to: * a type of dental work performed on horse teeth * use of an isolation tank * the guitar-playing technique where chords are sustained rather than scratched * ''Floating'' (play), by Hugh Hughes * Floating (psychological phe ...

per core, up from just one

FPU FPU may stand for: Universities * Florida Polytechnic University, in Lakeland, Florida, United States * Franklin Pierce University, in New Hampshire, United States * Fresno Pacific University, in California, United States * Fukui Prefectural Univ ...

for the entire

chip Chromatin immunoprecipitation (ChIP) is a type of immunoprecipitation experimental technique used to investigate the interaction between proteins and DNA in the cell. It aims to determine whether specific proteins are associated with specific genomi ...

* Eight encryption engines, with each supporting

DES Des is a masculine given name, mostly a short form (hypocorism) of Desmond. People named Des include: People * Des Buckingham, English football manager * Des Corcoran, (1928–2004), Australian politician * Des Dillon (disambiguation), sever ...

Triple DES In cryptography, Triple DES (3DES or TDES), officially the Triple Data Encryption Algorithm (TDEA or Triple DEA), is a symmetric-key block cipher, which applies the DES cipher algorithm three times to each data block. The Data Encryption Standa ...

, AES,

RC4 In cryptography, RC4 (Rivest Cipher 4, also known as ARC4 or ARCFOUR, meaning Alleged RC4, see below) is a stream cipher. While it is remarkable for its simplicity and speed in software, multiple vulnerabilities have been discovered in RC4, ren ...

SHA1 In cryptography, SHA-1 (Secure Hash Algorithm 1) is a cryptographically broken but still widely used hash function which takes an input and produces a 160-bit (20-byte) hash value known as a message digest – typically rendered as 40 hexadecima ...

SHA256 SHA-2 (Secure Hash Algorithm 2) is a set of cryptographic hash functions designed by the United States National Security Agency (NSA) and first published in 2001. They are built using the Merkle–Damgård construction, from a one-way compression ...

, MD5, RSA-2048, ECC,

CRC32 A cyclic redundancy check (CRC) is an error-detecting code commonly used in digital networks and storage devices to detect accidental changes to digital data. Blocks of data entering these systems get a short ''check value'' attached, based on t ...

* Hardware random number generator * Four dual-channel

FBDIMM Fully Buffered DIMM (or FB-DIMM) is a memory technology that can be used to increase reliability and density of memory systems. Unlike the parallel bus architecture of traditional DRAMs, an FB-DIMM has a serial interface between the memory contro ...

memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...

Core pipeline

There are 8 stages for integer operations, instead of 6 in the T1.

Systems

The T2 processor can be found in the following products from Sun and Fujitsu Computer Systems: * Sun/Fujitsu/

Fujitsu Siemens Fujitsu Siemens Computers GmbH was a Japanese and Germany, German vendor of information technology. The company was founded in 1999 as a 50/50 joint venture between Fujitsu, Fujitsu Limited of Japan and Siemens of Germany. On April 1, 2009, the c ...

SPARC Enterprise The SPARC Enterprise series is a range of UNIX server computers based on the SPARC V9 architecture. It was co-developed by Sun Microsystems and Fujitsu, announced on June 1st, 2004 and introduced in 2007. They were marketed and sold by Sun Microsyst ...

T5120 and T5220 servers * Sun Blade T6320 Server Module * Sun Netra CP3260 Blade * Sun Netra T5220 Rackmount Server Sun also licensed the T2 processor to

Themis Computer In Greek mythology and religion, Themis (; grc, Θέμις, Themis, justice, law, custom) is one of the twelve Titan children of Gaia and Uranus, and the second wife of Zeus. She is the goddess and personification of justice, divine order, fa ...

, which introduced the first non-Sun T2-based servers in 2008: * Themis T2BC Blade Server, which supports the entire family

IBM BladeCenter The IBM BladeCenter was IBM's blade server architecture, until it was replaced by Flex System in 2012. The x86 division was later sold to Lenovo in 2014. History Introduced in 2002, based on engineering work started in 1999, the IBM eServe ...

chassis

UltraSPARC T2 Plus

In April 2008, Sun released servers based on the UltraSPARC T2 Plus processor, an SMP capable version of UltraSPARC T2. Sun released the UltraSPARC T2 Plus processor with the following changes: * Ability to be used in 2 or 4 processor configurations (first CoolThreads processor capable of multi-processor capability) * Loss of on-chip embedded 10 Gigabit Ethernet controller

T2 Plus systems

UltraSPARC T2 Plus processors can be found in the following products from Sun and Fujitsu Computer Systems: Two-way SMP servers: * Sun/Fujitsu/Fujitsu Siemens SPARC Enterprise T5140 * Sun/Fujitsu/Fujitsu Siemens SPARC Enterprise T5240 Four-way SMP server: * Sun/Fujitsu/Fujitsu Siemens SPARC Enterprise T5440

Compute cluster

The

High Performance Computing Virtual Laboratory HPCVL is the High Performance Computing Virtual Laboratory, a consortium of 5 universities and 3 colleges providing high performance computing to researchers at these institutions and across Canada. They include Queen's University, Royal Military ...

in Canada built a compute cluster using 78 Sun SPARC Enterprise T5140 servers. With two 1.2 GHz T2 Plus chips in each T5140 server, the cluster has close to 10,000 compute threads, making it ideal for high-throughput workloads.

Virtualization

Like the T1, the T2 supports the Hyper-Privileged execution mode. The SPARC Hypervisor runs in this mode and can partition a T2 system into 64

Logical Domains Logic is the study of correct reasoning. It includes both formal and informal logic. Formal logic is the science of deductively valid inferences or of logical truths. It is a formal science investigating how conclusions follow from premise ...

, and a two-way SMP T2 Plus system into 128 Logical Domains, each of which can run an independent operating system instance.

Performance improvement versus T1

The UltraSPARC T2 offers a variety of performance improvements over the former UltraSPARC T1 processor * Integer throughput and throughput/watt (>2x improvement) * Integer single-thread performance (>1.4x improvement) * Better floating-point throughput (>10x improvement) * Better floating-point single-thread performance (>5x improvement) * Increased performance of cryptography through additional cyphers included in the embedded crypto cores * Two world-record single-chip

SPEC Spec may refer to: *Specification (technical standard), an explicit set of requirements to be satisfied by a material, product, or service **datasheet, or "spec sheet" People * Spec Harkness (1887-1952), American professional baseball pitcher ...

CPU results, based on tests that delivered 78.5 SPECint_rate2006 and 62.3 SPECfp_rate2006 Other UltraSPARC T2 performance related tunings are documented on Oracle engineers' blogs.

Power consumption

Peak power consumption can go as high as 123

watt The watt (symbol: W) is the unit of power or radiant flux in the International System of Units (SI), equal to 1 joule per second or 1 kg⋅m2⋅s−3. It is used to quantify the rate of energy transfer. The watt is named after James Wa ...

s, but the T2 typically consumes 95 watts during nominal system operation. This is up from 72 watts from the T1. Sun explains that this is due to a higher degree of system integration onto the chip.

Release history

On April 12, 2006, Sun announced the

tape-out In electronics and photonics design, tape-out or tapeout is the final result of the design process for integrated circuits or printed circuit boards before they are sent for manufacturing. The tapeout is specifically the point at which the graphic ...

of the UltraSPARC T2. Sun announced the T2's release on 7 August 2007, billing it as "the world's fastest microprocessor". On April 9, 2008, Sun announced the UltraSPARC T2 Plus.

Open design

On December 11, 2007, Sun made the UltraSPARC T2 processor design publicly available under the

GNU General Public License The GNU General Public License (GNU GPL or simply GPL) is a series of widely used free software licenses that guarantee end users the Four Freedoms (Free software), four freedoms to run, study, share, and modify the software. The license was th ...

via the

OpenSPARC OpenSPARC is an open-source hardware project started in December 2005. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32- thread microprocessor, the UltraSPARC T1 processor ...

project. The release includes: *

Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is also ...

RTL source code of the design * Verification environment * Diagnostics tests * Open source tools, scripts and Sun internal tools needed to simulate the design * ISA specification (UltraSPARC Architecture 2007) *

Solaris Solaris may refer to: Arts and entertainment Literature, television and film * ''Solaris'' (novel), a 1961 science fiction novel by Stanisław Lem ** ''Solaris'' (1968 film), directed by Boris Nirenburg ** ''Solaris'' (1972 film), directed by ...

10 OS simulation images

References

External links

OpenSPARC T2 and Specifications

OpenSPARC Overview

CMT Comes Of Age: Sun engineers give the inside scoop on the new UltraSPARC T2 systems

Niagara II: The Hydra Returns
{{DEFAULTSORT:Ultrasparc T2 Sun microprocessors Open microprocessors SPARC microprocessors 64-bit microprocessors