Sunway, or Shenwei, (

Chinese Chinese can refer to: * Something related to China * Chinese people, people of Chinese nationality, citizenship, and/or ethnicity **''Zhonghua minzu'', the supra-ethnic concept of the Chinese nation ** List of ethnic groups in China, people of va ...

: ), is a series of computer

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...

s, developed by Jiangnan Computing Lab () in

Wuxi Wuxi (, ) is a city in southern Jiangsu province, eastern China, by car to the northwest of downtown Shanghai, between Changzhou and Suzhou. In 2017 it had a population of 3,542,319, with 6,553,000 living in the entire prefecture-level city ar ...

China China, officially the People's Republic of China (PRC), is a country in East Asia. It is the world's most populous country, with a population exceeding 1.4 billion, slightly ahead of India. China spans the equivalent of five time zones and ...

. It uses a

reduced instruction set computer In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set comput ...

(RISC) architecture, but details are still sparse.

History

The Sunway series microprocessors were developed mainly for the use of the military of the People's Republic of

. It is expressed on online forums that the original

microarchitecture In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor. A given ISA may be impl ...

is believed to be inspired by the

DEC Alpha Alpha (original name Alpha AXP) is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). Alpha was designed to replace 32-bit VAX complex instruction set computers ...

. The SW-3 is thought especially to be based on the

Alpha 21164 The Alpha 21164, also known by its code name, EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture (ISA). It was introduced in January 1995, succeeding the Alp ...

Jack Dongarra Jack Joseph Dongarra (born July 18, 1950) is an American computer scientist and mathematician. He is the American University Distinguished Professor of Computer Science in the Electrical Engineering and Computer Science Department at the Unive ...

states about the follow-on

SW26010 The SW26010 is a 260-core manycore processor designed by the Shanghai Integrated Circuit Technology and Industry Promotion Center (ICC for short)(Chinese_language, Chinese: 上海集成电路技术与产业促进中心 (简称ICC)). It implements th ...

, the "Shenwei-64 Instruction Set (this is NOT related to the DEC Alpha

instruction set In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ' ...

)", and doesn't say it's a new instruction set from the three prior generations he names; although precise details of the instruction set are unknown.

Sunway SW-1

* First generation, 2006 * Single-core * 900 MHz

Sunway SW-2

* Second generation, 2008 * Dual-core * 1400 MHz * SMIC 130 nm process * 70–100 W

Sunway SW-3, SW1600

* Third generation, 2010 * 16-core, 64-bit RISC * 975–1200 MHz * 65 nm process * 140.8 GFLOPS @ 1.1 GHz * Max memory capacity: 16 GB * Peak memory bandwidth: 68 GB/s * Quad-channel 128-bit DDR3 * Four-issue

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

* Two integer and two floating-point execution units * 7-stage integer pipeline and 10-stage floating-point pipeline * 43-bit virtual address and 40-bit physical address * Up to 8 TB virtual memory and 1 TB of physical memory supported * L1 cache: 8 KB instruction cache and 8 KB data cache * L2 cache: 96 KB * 128-bit system bus

Sunway SW26010

* Fourth generation, 2016 * 64-bit RISC processor *

Manycore Manycore processors are special kinds of multi-core processors designed for a high degree of parallel processing, containing numerous simpler, independent processor cores (from a few tens of cores to thousands or more). Manycore processors are use ...

architecture, with 4 CPU clusters on a chip, each comprising 64 lightweight compute CPUs with an additional management CPU, linked by a

network-on-a-chip A network on a chip or network-on-chip (NoC or )This article uses the convention that "NoC" is pronounced . Therefore, it uses the convention "a" for the indefinite article corresponding to NoC ("a NoC"). Other sources may pronounce it as an ...

References