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The R4200 is a
microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
designed by MIPS Technologies, Inc. (MTI) that implemented the MIPS III
instruction set architecture In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ' ...
(ISA). It was also known as the VRX during development. The microprocessor was licensed to
NEC is a Japanese multinational corporation, multinational information technology and electronics corporation, headquartered in Minato, Tokyo. The company was known as the Nippon Electric Company, Limited, before rebranding in 1983 as NEC. It prov ...
, and the company fabricated and marketed it as the VR4200. The first VR4200, an 80 
MHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...
part, was introduced in 1993. A faster 100 MHz part became available in 1994. The R4200 was at least in part intended for use in low-power
Windows NT Windows NT is a proprietary graphical operating system An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs. Time-sharing operating systems sc ...
computers such as personal computers and laptops, reportedly offering "Pentium processor performance at a tenth of the price", having initially aimed to deliver twice the performance of a 66 MHz Intel
486DX2 The Intel i486DX2, rumored as 80486DX2 (later renamed IntelDX2) is a CPU produced by Intel that was first introduced in 1992. The i486DX2 was nearly identical to the i486DX, but it had additional clock multiplier circuitry. It was the first ch ...
processor. Reported SPECint benchmark results put the microprocessor's integer performance at around 85% of a P5-variant Pentium microprocessor, with floating-point performance being about half that of the Pentium. Expected to be used in Nintendo's "new machine due in 1995", the R4300i variant was used in the widely popular Nintendo 64
video game console A video game console is an electronic device that Input/output, outputs a video signal or image to display a video game that can be played with a game controller. These may be home video game console, home consoles, which are generally placed i ...
. The R4200 ultimately did not see any use in personal computers and was repositioned as an embedded microprocessor that competed with the
R4600 The R4600, code-named "Orion", is a microprocessor developed by Quantum Effect Design (QED) that implemented the MIPS III instruction set architecture (ISA). As QED was a design firm that did not fabricate or sell their designs, the R4600 was fir ...
.


Description

The R4200 is a
scalar Scalar may refer to: *Scalar (mathematics), an element of a field, which is used to define a vector space, usually the field of real numbers * Scalar (physics), a physical quantity that can be described by a single element of a number field such ...
design with a five-stage classic RISC pipeline. A notable feature is the use of the integer datapath for performing arithmetic operations on the mantissa portion of a
floating point In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can be ...
number. A separate datapath was used for the exponent. This scheme reduced cost by reducing the number of
transistors upright=1.4, gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (pink). A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch e ...
, the size of the chip, and power consumption. It also impacted
floating point In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can be ...
performance negatively, but the R4200's intended applications did not require high floating point performance. The R4200 has a 16  KB instruction cache and an 8 KB data cache. Both caches are direct-mapped. The instruction cache has a 32-byte line size, whereas the data cache has 16-byte line size. The data cache uses the write-back write protocol. The R4200 has a 32-entry
translation lookaside buffer A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory to physical memory. It is used to reduce the time taken to access a user memory location. It can be called an address-translation cache. ...
(TLB) for data, and a 4-entry TLB for instructions. A 33-bit
physical address In computing, a physical address (also real address, or binary address), is a memory address that is represented in the form of a binary number on the address bus circuitry in order to enable the data bus to access a ''particular'' storage cell o ...
is supported. The
system bus A system bus is a single computer bus that connects the major components of a computer system, combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to dete ...
is 64 bits wide and operates at half the internal clock frequency. The R4200 contained 1.3 million transistors and had an area of 81 mm2. NEC fabricated the R4200 in a 600 nm
CMOS Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", ) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFE ...
process with three levels of interconnect. It was packaged in a 179-pin
ceramic pin grid array A pin grid array (PGA) is a type of integrated circuit packaging. In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package. The pins are commonly spaced 2.54 mm (0.1") a ...
that was compatible with the R4x00PC and
R4600 The R4600, code-named "Orion", is a microprocessor developed by Quantum Effect Design (QED) that implemented the MIPS III instruction set architecture (ISA). As QED was a design firm that did not fabricate or sell their designs, the R4600 was fir ...
, or a 208-pin plastic quad flat pack (PQFP). It used a 3.3 V power supply, dissipating 1.8 W typically and a maximum of 2 W at 80 MHz. In comparison to the Pentium, SPECint ratings had the Pentium at 64.5 and the R4200 at 55.
SPECfp SPECfp is a computer benchmark designed to test the floating-point performance of a computer. It is managed by the Standard Performance Evaluation Corporation. SPECfp is the floating-point performance testing component of the SPEC CPU testing ...
ratings had the Pentium at 56 versus the R4200 at 30.


R4300i

The R4300i is a derivative of the R4200 designed by MTI for embedded applications announced on 17 April 1995. It differs from the R4200 by featuring an improved integer multiplier with a lower latency and a cut-down 32-bit system bus for reduced cost. The chip had an area of 45 mm2 and was fabricated in a
350 nm 35 or XXXV may refer to: * 35 (number), the natural number following 34 and preceding 36 * one of the years 35 BC, AD 35, 1935, 2035 * ''XXXV'' (album), a 2002 album by Fairport Convention * ''35xxxv'', a 2015 album by One Ok Rock * "35" (song), ...
process. By employing multiplexed address and data lines, it could be packaged in a low-cost 120-pin PQFP. It uses a 3.3 V power supply and dissipates 1.5 W running at 40 MHz (80 MHz internally), 1.8 W at 100 MHz and 2.2 W at 133 MHz. The R4300i was licensed to NEC and
Toshiba , commonly known as Toshiba and stylized as TOSHIBA, is a Japanese multinational conglomerate corporation headquartered in Minato, Tokyo, Japan. Its diversified products and services include power, industrial and social infrastructure system ...
, and was marketed by those companies as the VR4300 or TX4300, respectively. Both companies offered 100 and 133 MHz versions. A derivative of the VR4300 was developed by NEC for the Nintendo 64 game console, clocked at 93.75 MHz and labeled NUS-CPU. Although development boards for the Nintendo 64 used stock NEC VR4300 CPUs, the final CPU has been found to be not pin-compatible. This singular use of a MIPS implementation produced significant royalties for MTI, sales for NEC, and made MIPS the highest volume mixed 32/64-bit RISC ISA in 1997. NEC produced two other derivatives of the R4300 for the general embedded market, the VR4305 and VR4310, announced on 20 January 1998. The VR4310 was available at 100, 133 or 167 MHz. It was manufactured in a 250 nm process and packaged in a 120-pin PQFP.


References

* "MIPS, NEC will launch 64-bit device". (17 April 1995). ''
Electronic News ''Electronic News'' was a publication that covered the electronics industry, from semiconductor equipment and materials to military/aerospace electronics to supercomputers. It was originally a weekly trade newspaper, which covered all aspects of ...
''. * "NEC Unveils New MIPS Chip for Nintendo". (8 May 1995). '' Microprocessor Report''. * Gwennap, Linley (31 May 1993). "MIPS Reaches New Lows With R4200 Design". '' Microprocessor Report'', pp. 6–9. * Levy, Marcus (15 September 1994). "EDN's 21st Annual Microprocessor Directory". '' EDN''. * Ryan, Bob; Thompson, Tom (January 1994). "RISC Grows Up". ''
Byte The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit ...
''. * Yeung, N.K. et al. (1994). "The design of a 55SPECint92 RISC processor under 2W". ''ISSCC Digest of Technical Papers''. pp. 206–207. * Zivkov, B.; Ferguson, B.; Gupta, M. (1994). ''Compcon Spring '94, Digest of Papers''. pp. 18–25. {{NEC Corporation MIPS implementations MIPS microprocessors NEC microprocessors 64-bit microprocessors