POWER9 is a family of
superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...
,
multithreading,
multi-core
A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such a ...
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
s produced by
IBM, based on the
Power ISA
Power ISA is a reduced instruction set computer (RISC) instruction set architecture (ISA) currently developed by the OpenPOWER Foundation, led by IBM. It was originally developed by IBM and the now-defunct Power.org industry group. Power IS ...
. It was announced in August 2016.
The POWER9-based processors are being manufactured using a
14 nm
The 14 nm process refers to the MOSFET technology node that is the successor to the 22nm (or 20nm) node. The 14nm was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following 22nm was expe ...
FinFET
A fin field-effect transistor (FinFET) is a multigate device, a MOSFET (metal-oxide-semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, f ...
process,
in 12- and 24-core versions, for
scale out
Scalability is the property of a system to handle a growing amount of work by adding resources to the system.
In an economics, economic context, a scalable business model implies that a company can increase sales given increased resources. For ...
and
scale up applications,
and possibly other variations, since the POWER9 architecture is open for licensing and modification by the
OpenPOWER Foundation
The OpenPOWER Foundation is a collaboration around Power ISA-based products initiated by IBM and announced as the "OpenPOWER Consortium" on August 6, 2013. IBM is opening up technology surrounding their Power Architecture offerings, such as pro ...
members.
Summit
A summit is a point on a surface that is higher in elevation than all points immediately adjacent to it. The topography, topographic terms acme, apex, peak (mountain peak), and zenith are synonymous.
The term (mountain top) is generally used ...
, the fourth fastest supercomputer in the world (based on the Top500 list as of June 2022), is based on POWER9, while also using
Nvidia Tesla
Nvidia Tesla was the name of Nvidia's line of products targeted at stream processing or general-purpose graphics processing units (GPGPU), named after pioneering electrical engineer Nikola Tesla. Its products began using GPUs from the G80 ser ...
GPU
A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...
s as accelerators.
Design
Core
The POWER9 core comes in two variants, a four-way
multithreaded one called ''SMT4'' and an eight-way one called ''SMT8''.
[Big Blue Aims For The Sky With Power9](_blank)
/ref> The SMT4- and SMT8-cores are similar, in that they consist of a number of so-called ''slices'' fed by common schedulers. A slice is a rudimentary 64-bit single-threaded processing core with load store unit (LSU), integer unit (ALU) and a vector scalar unit (VSU, doing SIMD and floating point). A ''super-slice'' is the combination of two slices. An SMT4-core consists of a 32 KiB
The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit ...
L1 cache (1 KiB = 1024 bytes), a 32 KiB L1 data cache, an instruction fetch unit (IFU) and an instruction sequencing unit (ISU) which feeds two super-slices. An SMT8-core has two sets of L1 caches and, IFUs and ISUs to feed four super-slices. The result is that the 12-core and 24-core versions of POWER9 each consist of the same number of slices (96 each) and the same amount of L1 cache.
A POWER9 core, whether SMT4 or SMT8, has a 12-stage pipeline (five stages shorter than its predecessor, the POWER8
POWER8 is a family of superscalar multi-core microprocessors based on the Power ISA, announced in August 2013 at the Hot Chips conference. The designs are available for licensing under the OpenPOWER Foundation, which is the first time for s ...
), but aims to retain the clock frequency of around 4 GHz. It will be the first to incorporate elements of the Power ISA v.3.0 that was released in December 2015, including the VSX-3 instructions. The POWER9 design is made to be modular and used in more processor variants and used for licensing, on a different fabrication process than IBM's.[The Prospects For A Power9 Revolution](_blank)
/ref> On chip are co-processors for compression and cryptography, as well as a large low-latency eDRAM L3 cache.
The POWER9 comes with a new interrupt controller architecture called ''"eXternal Interrupt Virtualization Engine"'' (XIVE) which replaces a much simpler architecture that was used in POWER4 through POWER8. XIVE will also be used in Power10
Power10 is a superscalar, multithreading, multi-core microprocessor family, based on the open source Power ISA, and announced in August 2020 at the Hot Chips conference; systems with Power10 CPUs. Generally available from September 2021 ...
.
Scale out / scale up
* IBM POWER9 ''SO'' scale-out
Scalability is the property of a system to handle a growing amount of work by adding resources to the system.
In an economic context, a scalable business model implies that a company can increase sales given increased resources. For example, a ...
variant, optimized for dual socket computers with up to 120 GB/s bandwidth (1 GB = 1 billion bytes) to directly attached DDR4 memory (targeted for release in 2017)
* IBM POWER9 ''SU'' scale-up
SCALE-UP, Student-Centered Active Learning Environment with Upside-Down Pedagogies, is a classroom specifically created to facilitate active, collaborative learning in a classroom. The spaces are carefully designed to facilitate interactions betwe ...
variant, optimized for four sockets or more, for large NUMA
Nuclear mitotic apparatus protein 1 is a protein that in humans is encoded by the ''NUMA1'' gene.
Interactions
Nuclear mitotic apparatus protein 1 has been shown to interact with PIM1, Band 4.1, GPSM2
G-protein-signaling modulator 2, also call ...
machines with up to 230 GB/s bandwidth to buffered memory (uses "25.6 GHz" signaling with the PowerAXON 25 GT/sec Link interface)
Both POWER9 variants can ship in versions with some cores disabled due to yield reasons, as such Raptor Computing Systems first sold 4-core chips, and even IBM initially sold its AC922 systems with no more than 22-core chips, even though both types of chips have 24 cores on their dies.
I/O
A lot of facilities are on-chip for helping with massive off-chip I/O performance:
* The ''SO'' variant has integrated DDR4 controllers for directly attached RAM, while the ''SU'' variant will use the off-chip Centaur
A centaur ( ; grc, κένταυρος, kéntauros; ), or occasionally hippocentaur, is a creature from Greek mythology with the upper body of a human and the lower body and legs of a horse.
Centaurs are thought of in many Greek myths as being ...
architecture introduced with POWER8 to include high performance eDRAM
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalen ...
L4 cache and memory controllers for DDR4 RAM.
* The ''Bluelink'' interconnects for close attachment of graphics co-processors from Nvidia
Nvidia CorporationOfficially written as NVIDIA and stylized in its logo as VIDIA with the lowercase "n" the same height as the uppercase "VIDIA"; formerly stylized as VIDIA with a large italicized lowercase "n" on products from the mid 1990s to ...
(over NVLink v.2) and OpenCAPI
Coherent Accelerator Processor Interface (CAPI), is a high-speed processor expansion bus standard for use in large data center computers, initially designed to be layered on top of PCI Express, for directly connecting central processing units (CPU ...
accelerators.[Nvidia's NVLink 2.0 will first appear in Power9 servers next year](_blank)
/ref>
* General purpose PCIe v.4 connections for attaching regular ASIC
An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficien ...
s, FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence the term '' field-programmable''. The FPGA configuration is generally specified using a hardware de ...
s and other peripherals as well as CAPI 2.0 and CAPI 1.0 devices designed for POWER8.
* Multiprocessor (symmetric multiprocessor system
Symmetric multiprocessing or shared-memory multiprocessing (SMP) involves a multiprocessor computer hardware and software architecture where two or more identical processors are connected to a single, shared main memory, have full access to all ...
) links to connect other POWER9 processors on the same motherboard, or in other closely attached enclosures.
Chip types
POWER9 chips can be made with two types of cores, and in a Scale Out or Scale Up configuration. POWER9 cores are either SMT4 or SMT8, with SMT8 cores intended for PowerVM
PowerVM, formerly known as Advanced Power Virtualization (APV), is a chargeable feature of IBM POWER5, POWER6, POWER7, POWER8, POWER9 and Power10 servers and is required for support of micro-partitions and other advanced features. Support is pr ...
systems, while the SMT4 cores are intended for PowerNV systems, which do not use PowerVM, and predominantly run Linux. With POWER9, chips made for Scale Out can support directly-attached memory, while Scale Up chips are intended for use with machines with more than two CPU sockets, and use buffered memory.[ ]
Slides
(PDF)
AIX VUG page
has links to slides and video
Modules
The IBM Portal for OpenPOWER lists the three available modules for the Nimbus chip, although the Scale-Out SMT8 variant for PowerVM also uses the LaGrange module/socket:
* ''Sforza'' – 50 mm × 50 mm, 4 DDR4, 48 PCIe lanes, 1 XBus 4B[IBM Portal for OpenPOWER - POWER9 - Sforza Module](_blank)
/ref>
* ''Monza'' – 68.5 mm × 68.5 mm, 8 DDR4, 34 PCIe lanes, 1 XBus 4B, 48 OpenCAPI lanes[IBM Portal for OpenPOWER - POWER9 - Monza Module](_blank)
/ref>
* ''LaGrange'' – 68.5 mm × 68.5 mm, 8 DDR4, 42 PCIe lanes, 2 XBus 4B, 16 OpenCAPI lanes[IBM Portal for OpenPOWER - POWER9 - LaGrange Module](_blank)
/ref>
Sforza modules use a land grid array
The land grid array (LGA) is a type of surface-mount packaging for integrated circuits (ICs) that is notable for having the pins on the socket (when a socket is used) rather than the integrated circuit. An LGA can be electrically connected to a ...
(LGA) 2601-pin socket.
Systems
Raptor Computing Systems / Raptor Engineering
''Talos II'' – two-socket workstation/server platform using POWER9 SMT4 Sforza processors;[Raptor Computing Systems Wiki - OpenPOWER](_blank)
/ref> available as 2U server, 4U server, tower, or EATX mainboard. Marketed as secure and owner-controllable with free and open-source
Open source is source code that is made freely available for possible modification and redistribution. Products include permission to use the source code, design documents, or content of the product. The open-source model is a decentralized sof ...
software and firmware. Initially shipping with 4-core, 8-core, 18-core, and 22-core chip options until chips with more cores are available.
''Talos II Lite'' – single-socket version of the Talos II mainboard, made using the same PCB.
''Blackbird'' – single-socket microATX
In computer design, microATX (sometimes referred to as μATX, uATX or mATX) is a standard motherboard form factor introduced in December 1997. The maximum size of a microATX motherboard is . However, there are examples of motherboards using micr ...
platform using SMT4 Sforza processors (up to 8-core 160 W variant), 4–8 cores, 2 RAM slots (supporting up to 256 GiB
The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit ...
total)
Google–Rackspace partnership
''Barreleye G2 / Zaius'' – two-socket server platform using LaGrange processors; both the Barreleye G2 and Zaius chassis use the Zaius POWER9 motherboard
IBM
''Power Systems AC922'' – 2U, 2× POWER9 SMT4 Monza, with up to 6× Nvidia Volta GPUs, 2× CAPI 2.0 attached accelerators and 1 TiB DDR4 RAM. AC here is an abbreviation for Accelerated Computing; this system is also known as "Witherspoon" or "Newell".[How you can Boost Acceleration with OpenCAPI, Today!](_blank)
/ref>
''Power Systems L922'' – 2U, 1–2× POWER9 SMT8, 8–12 cores per processor, up to 4 TiB DDR4 RAM (1 TiB = 1024 GiB), PowerVM running Linux
Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, which ...
.[https://www.theregister.co.uk/2018/02/14/ibm_power9_servers/ Big Blue levels up server sextet with POWER9 for IBM i, AIX, HANA, Linux][https://www.nextplatform.com/2018/02/15/ins-outs-ibms-power9-zz-systems/ The Ins And Outs Of IBM’s Power9 ZZ Systems]
''Power Systems S914'' – 4U, 1× POWER9 SMT8, 4–8 cores, up to 1 TiB DDR4 RAM, PowerVM running AIX
Aix or AIX may refer to:
Computing
* AIX, a line of IBM computer operating systems
*An Alternate Index, for a Virtual Storage Access Method Key Sequenced Data Set
* Athens Internet Exchange, a European Internet exchange point
Places Belgi ...
/IBM i
IBM i (the ''i'' standing for ''integrated'') is an operating system developed by IBM for IBM Power Systems. It was originally released in 1988 as OS/400, as the sole operating system of the IBM AS/400 line of systems. It was renamed to i5/OS in ...
/Linux.
''Power Systems S922'' – 2U, 1–2× POWER9 SMT8, 4–11 cores per processor, up to 4 TiB DDR4 RAM, PowerVM running AIX/IBM i/Linux.
''Power Systems S924'' – 4U, 2× POWER9 SMT8, 8–12 cores per processor, up to 4 TiB DDR4 RAM, PowerVM running AIX/IBM i/Linux.
''Power Systems H922'' – 2U, 1–2× POWER9 SMT8, 4–10 cores per processor, up to 4 TiB DDR4 RAM, PowerVM running SAP HANA
SAP HANA (HochleistungsANalyseAnwendung or High-performance ANalytic Application) is an in-memory, column-oriented, relational database management system developed and marketed by SAP SE. Its primary function as the software running a databas ...
(on Linux) with AIX/IBM i on up to 25% of the system.
''Power Systems H924'' – 4U, 2× POWER9 SMT8, 8–12 cores per processor, up to 4 TiB DDR4 RAM, PowerVM running SAP HANA (on Linux) with AIX/IBM i on up to 25% of the system.
''Power Systems E950'' – 4U, 2–4× POWER9 SMT8, 8–12 cores per processor, up to 16 TiB buffered DDR4 RAM
''Power Systems E980'' – 1–4× 4U, 4–16× POWER9 SMT8, 8–12 cores per processor, up to 64 TiB buffered DDR4 RAM
''Hardware Management Console 7063-CR2'' – 1U, 1× POWER9 SMT8, 6 cores, 64-128 GB DDR4 RAM.
Penguin Computing
''Magna PE2112GTX'' – 2U, two-socket server for high performance computing using LaGrange processors. Manufactured by Wistron.
IBM supercomputers
''Summit'' and ''Sierra'' The United States Department of Energy
The United States Department of Energy (DOE) is an executive department of the U.S. federal government that oversees U.S. national energy policy and manages the research and development of nuclear power and nuclear weapons in the United Stat ...
together with Oak Ridge National Laboratory
Oak Ridge National Laboratory (ORNL) is a U.S. multiprogram science and technology national laboratory sponsored by the U.S. Department of Energy (DOE) and administered, managed, and operated by UT–Battelle as a federally funded research and ...
and Lawrence Livermore National Laboratory
Lawrence Livermore National Laboratory (LLNL) is a federal research facility in Livermore, California, United States. The lab was originally established as the University of California Radiation Laboratory, Livermore Branch in 1952 in response ...
contracted IBM and Nvidia
Nvidia CorporationOfficially written as NVIDIA and stylized in its logo as VIDIA with the lowercase "n" the same height as the uppercase "VIDIA"; formerly stylized as VIDIA with a large italicized lowercase "n" on products from the mid 1990s to ...
to build two supercomputers, the ''Summit'' and the ''Sierra'', are based on POWER9 processors coupled with Nvidia's Volta GPUs. These systems are slated to go online in 2017.[NVIDIA Volta, IBM POWER9 Land Contracts For New US Government Supercomputers](_blank)
/ref> Sierra is based on IBM's Power Systems AC922 compute node.
The first racks
Rack or racks may refer to:
Storage and installation
* Amp rack, short for amplifier rack, a piece of furniture in which amplifiers are mounted
* Bicycle rack, a frame for storing bicycles when not in use
* Bustle rack, a type of storage bin m ...
of Summit were delivered to Oak Ridge National Laboratory on 31 July 2017.
''MareNostrum 4'' – One of the three clusters in the emerging technologies block of the fourth MareNostrum
MareNostrum (, ) is the main supercomputer in the Barcelona Supercomputing Center. It is the most powerful supercomputer in Spain, one of thirteen supercomputers in the Spanish Supercomputing Network and one of the seven supercomputers of the ...
supercomputer is a POWER9 cluster with Nvidia Volta GPUs. This cluster is expected to provide more than 1.5 petaflops of computing capacity when installed. The emerging technologies block of the MareNostrum 4 exists to test if new developments might be "suitable for future versions of MareNostrum".
Operating system support
As with its predecessor, POWER9 is supported by FreeBSD
FreeBSD is a free and open-source Unix-like operating system descended from the Berkeley Software Distribution (BSD), which was based on Research Unix. The first version of FreeBSD was released in 1993. In 2005, FreeBSD was the most popular ...
, IBM AIX
AIX (Advanced Interactive eXecutive, pronounced , "ay-eye-ex") is a series of Proprietary software, proprietary Unix operating systems developed and sold by IBM for several of its computer platforms.
Background
Originally released for the ...
, IBM i
IBM i (the ''i'' standing for ''integrated'') is an operating system developed by IBM for IBM Power Systems. It was originally released in 1988 as OS/400, as the sole operating system of the IBM AS/400 line of systems. It was renamed to i5/OS in ...
, Linux
Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, which ...
(both running with and without PowerVM), and OpenBSD
OpenBSD is a security-focused, free and open-source, Unix-like operating system based on the Berkeley Software Distribution (BSD). Theo de Raadt created OpenBSD in 1995 by forking NetBSD 1.0. According to the website, the OpenBSD project em ...
.
Implementation of POWER9 support in the Linux kernel
The Linux kernel is a free and open-source, monolithic, modular, multitasking, Unix-like operating system kernel. It was originally authored in 1991 by Linus Torvalds for his i386-based PC, and it was soon adopted as the kernel for the GNU ope ...
began with version 4.6 in March 2016.
Red Hat Enterprise Linux
Red Hat Enterprise Linux (RHEL) is a commercial open-source Linux distribution developed by Red Hat for the commercial market. Red Hat Enterprise Linux is released in server versions for x86-64, Power ISA, ARM64, and IBM Z and a desktop version ...
(RHEL), SUSE Linux Enterprise
SUSE Linux Enterprise (often abbreviated to SLE) is a Linux-based operating system developed by SUSE. It is available in two editions, suffixed with Server (SLES) for servers and mainframes, and Desktop (SLED) for workstations and desktop comp ...
(SLES), Debian
Debian (), also known as Debian GNU/Linux, is a Linux distribution composed of free and open-source software, developed by the community-supported Debian Project, which was established by Ian Murdock on August 16, 1993. The first version of D ...
Linux
Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, which ...
, and CentOS
CentOS (, from Community Enterprise Operating System; also known as CentOS Linux) is a Linux distribution that provides a free and open-source community-supported computing platform, functionally compatible with its upstream source, Red Hat En ...
are supported .
See also
* IBM Power microprocessors
IBM Power microprocessors (originally POWER prior to Power10) are designed and sold by IBM for servers and supercomputers. The name "POWER" was originally presented as an acronym for "Performance Optimization With Enhanced RISC". The Power l ...
* OpenBMC
The OpenBMC project is a Linux Foundation collaborative open-source project whose goal is to produce an open source implementation of the Baseboard Management Controllers (BMC) Firmware Stack. OpenBMC is a Linux distribution for BMCs meant to w ...
References
{{Reflist
External links
IBM Power9
IBM Portal for OpenPOWER
Computer-related introductions in 2017
IBM microprocessors
OpenPower IP cores
Parallel computing
Power microprocessors
Transactional memory
64-bit microprocessors