Negative-bias Temperature Instability
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Negative-bias temperature instability (NBTI) is a key reliability issue in
MOSFET The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, the voltage of which d ...
s, a type of
transistor aging Transistor aging (sometimes called silicon aging) is the process of silicon transistors developing flaws over time as they are used, degrading performance and reliability, and eventually failing altogether. Despite the name, similar mechanisms ma ...
. NBTI manifests as an increase in the
threshold voltage The threshold voltage, commonly abbreviated as Vth or VGS(th), of a field-effect transistor (FET) is the minimum gate-to-source voltage (VGS) that is needed to create a conducting path between the source and drain terminals. It is an important s ...
and consequent decrease in drain current and
transconductance Transconductance (for transfer conductance), also infrequently called mutual conductance, is the electrical characteristic relating the current through the output of a device to the voltage across the input of a device. Conductance is the reciproca ...
of a MOSFET. The degradation is often approximated by a
power-law In statistics, a power law is a functional relationship between two quantities, where a relative change in one quantity results in a proportional relative change in the other quantity, independent of the initial size of those quantities: one qua ...
dependence on time. It is of immediate concern in p-channel
MOS MOS or Mos may refer to: Technology * MOSFET (metal–oxide–semiconductor field-effect transistor), also known as the MOS transistor * Mathematical Optimization Society * Model output statistics, a weather-forecasting technique * MOS (filmm ...
devices (pMOS), since they almost always operate with negative gate-to-source voltage; however, the very same mechanism also affects nMOS transistors when biased in the accumulation regime, i.e. with a negative bias applied to the gate. More specifically, over time positive charges become trapped at the oxide-semiconductor boundary underneath the gate of a MOSFET. These positive charges partially cancel the negative gate voltage ''without'' contributing to conduction through the channel as
electron hole In physics, chemistry, and electronic engineering, an electron hole (often simply called a hole) is a quasiparticle which is the lack of an electron at a position where one could exist in an atom or atomic lattice. Since in a normal atom or ...
s in the semiconductor are supposed to. When the gate voltage is removed, the trapped charges dissipate over a time scale of milliseconds to hours. The problem has become more acute as transistors have shrunk, as there is less averaging of the effect over a large gate area. Thus, different transistors experience different amounts of NBTI, defeating standard circuit design techniques for tolerating manufacturing variability which depend on the close matching of adjacent transistors. NBTI has become significant for portable electronics because it interacts badly with two common power-saving techniques: reduced operating voltages and
clock gating Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation, by removing the clock signal when the circuit is not in use or ignores clock signal. Clock gating saves power by pruning the clock tree, ...
. With lower operating voltages, the NBTI-induced threshold voltage change is a larger fraction of the logic voltage and disrupts operations. When a clock is gated off, transistors stop switching and NBTI effects accumulate much more rapidly. When the clock is re-enabled, the transistor thresholds have changed and the circuit may not operate. Some low-power designs switch to a low-frequency clock rather than stopping completely in order to mitigate NBTI effects.


Physics

The details of the mechanisms of NBTI have been debated, but two effects are believed to contribute: trapping of positively charged
holes A hole is an opening in or through a particular medium, usually a solid body. Holes occur through natural and artificial processes, and may be useful for various purposes, or may represent a problem needing to be addressed in many fields of en ...
, and generation of interface states. * preexisting traps located in the bulk of the dielectric are filled with holes coming from the channel of pMOS. Those traps can be emptied when the stress voltage is removed, so that the Vth degradation can be recovered over time. * interface traps are generated, and these interface states become positively charged when the pMOS device is biased in the "on" state, i.e. with negative gate voltage. Some interface states may become deactivated when the stress is removed, so that the Vth degradation can be recovered over time. The existence of two coexisting mechanisms has resulted in scientific controversy over the relative importance of each component, and over the mechanism of generation and recovery of interface states. In sub-micrometer devices
nitrogen Nitrogen is the chemical element with the symbol N and atomic number 7. Nitrogen is a nonmetal and the lightest member of group 15 of the periodic table, often called the pnictogens. It is a common element in the universe, estimated at se ...
is incorporated into the silicon
gate oxide The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET (metal-oxide-semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects source and drain ...
to reduce the gate leakage current density and prevent
boron Boron is a chemical element with the symbol B and atomic number 5. In its crystalline form it is a brittle, dark, lustrous metalloid; in its amorphous form it is a brown powder. As the lightest element of the ''boron group'' it has th ...
penetration. It is known that incorporating nitrogen enhances NBTI. For new technologies (45 nm and shorter nominal channel lengths), high-κ metal gate stacks are used as an alternative to improve the gate current density for a given equivalent oxide thickness (EOT). Even with the introduction of new materials like
hafnium Hafnium is a chemical element with the symbol Hf and atomic number 72. A lustrous, silvery gray, tetravalent transition metal, hafnium chemically resembles zirconium and is found in many zirconium minerals. Its existence was predicted by Dmitri M ...
oxide in the gate stack, NBTI remains and is often exacerbated by additional charge trapping in the high-κ layer. With the introduction of high κ metal gates, a new degradation mechanism has become more important, referred to as PBTI (for positive bias temperature instabilities), which affects nMOS transistor when positively biased. In this case, no interface states are generated and 100% of the Vth degradation may be recovered.


See also

*
Hot carrier injection Hot carrier injection (HCI) is a phenomenon in solid-state electronic devices where an electron or a “hole” gains sufficient kinetic energy to overcome a potential barrier necessary to break an interface state. The term "hot" refers to the e ...
*
Electromigration Electromigration is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms. The effect is important in applications where high direc ...


References

*J.H. Stathis, S. Mahapatra, and T. Grasser, “
Controversial issues in negative bias temperature instability
'”, Microelectronics Reliability, vol 81, pp. 244-251, Feb. 2018. *T. Grasser et al., “''The paradigm shift in understanding the bias temperature instability: From reaction–diffusion to switching oxide traps''”, IEEE Transactions on Electron Devices 58 (11), pp. 3652-3666, Nov. 2011. *D.K. Schroder, “''Negative bias temperature instability: What do we understand?''”, Microelectronics Reliability, vol. 47, no. 6, pp. 841–852, June 2007. * *JH Stathis and S Zafar, “''The negative bias temperature instability in MOS devices: A review''”, Microelectronics Reliability, vol 46, no. 2, pp. 278-286, Feb. 2006. *M. Alam and S. Mahapatra, “
A comprehensive model of PMOS NBTI degradation
'”, Microelectronics Reliability, vol. 45, no. 1, pp. 71–81, Jan. 2005. {{DEFAULTSORT:Negative Bias Temperature Instability Semiconductor device defects Semiconductor device fabrication Electronic engineering Hardware testing