List Of AMD FX Processors
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AMD FX is a series of
AMD microprocessors The following is a list of Advanced Micro Devices, AMD Central processing unit, CPU microarchitectures. Nomenclature Historically, AMD's CPU families were given a "K-number" (which originally stood for AMD#K5, Kryptonite, an allusion to the Supe ...
for
personal computer A personal computer (PC) is a multi-purpose microcomputer whose size, capabilities, and price make it feasible for individual use. Personal computers are intended to be operated directly by an end user, rather than by a computer expert or tec ...
s. The following is a list of
AMD FX AMD FX was a series of high-end AMD microprocessors for personal computers which debuted in 2011, claimed as AMD's first native 8-core desktop processor. The line was introduced with the Bulldozer microarchitecture at launch (codename Zambezi), ...
brand microprocessors. Some
APUs Apus is a small constellation in the Southern Celestial Hemisphere, southern sky. It represents a bird-of-paradise, and its name means "without feet" in Greek language, Greek because the bird-of-paradise was once wrongly believed to lack feet. ...
also carry an FX model name, but the term "FX" normally only refers to
CPUs A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, and ...
which are not just APUs with the
iGPU A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory (computing), memory to accelerate the creation of Digital image, images in a frame buffer intended for output to a display device. GPUs ...
disabled.


Features overview


"Pure" CPUs

CPU features table


APUs

APU features table


Desktop "pure" CPUs


Athlon 64 Family (90–130 nm)

These processors were the first AMD CPUs to use the "FX" designation and identified the chip as being higher-performance. The frequency multiplier was unlocked in these chips. See the comprehensive
List of AMD Athlon 64 processors The Athlon 64 microprocessor from Advanced Micro Devices (AMD) is an eighth-generation central processing unit (CPU). Athlon 64 is targeted at the consumer market. Features overview CPU features table Single-core desktop processors Athlon 6 ...


SledgeHammer Core (130 nm)

*
Socket 940 Socket 940 is a 940-pin socket for 64-bit AMD Opteron server processors and AMD Athlon 64 FX consumer processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the process ...
* L1 cache: 64 kb + 64 kb (data + instruction) * L2 cache: 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
FX-51 (2.2 GHz) and FX-53 (2.4 GHz)


ClawHammer Core (130 nm)

*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Avai ...
* L1 cache: 64 kb + 64 kb (data + instruction) * L2 cache: 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
FX-53 (2.4 GHz) and FX-55 (2.6 GHz)


SanDiego Core (90 nm)

*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Avai ...
* L1 cache: 64 kb + 64 kb (data + instruction) * L2 cache: 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technolo ...
FX-55 (2.6 GHz) and FX-57 (2.8 GHz)


Toledo Core (90 nm, dual-core)

*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Avai ...
* L1 cache (per core): 64 kb + 64 kb (data + instruction) * L2 cache (per core): 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technolo ...
FX-60 (2.6 GHz)


Windsor Core (90 nm, dual-core)

*
Socket AM2 The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. It was released on May 23, 2006, as ...
* L1 cache (per core): 64 kb + 64 kb (data + instruction) * L2 cache (per core): 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technolo ...
,
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
FX-62 (2.8 GHz)


Windsor Core (90 nm, dual-core, dual-processor)

*
Socket F Socket F is a CPU socket designed by Advanced Micro Devices, AMD for its Opteron line of Central processing unit, CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end ser ...
* L1 cache (per core): 64 kb + 64 kb (data + instruction) * L2 cache (per core): 1024 kb (full speed) * Instruction sets: MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier Streamin ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
, Enhanced 3DNow!,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technolo ...
,
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
FX-70 (2.6 GHz), FX-72 (2.8 GHz), FX-74 (3.0 GHz)


Bulldozer Family (32 nm)

* All models binned from 8 logical cores with simple OROCHI die production, in 938 pins µPGA package
AM3+ AM3+ is a modification of the AM3 Socket, released in mid-2011, designed for CPUs which use the AMD Bulldozer microarchitecture and retains compatibility with AM3 processors. The Vishera line of AMD CPUs also all use Socket AM3+. It is the last A ...
socket Socket may refer to: Mechanics * Socket wrench, a type of wrench that uses separate, removable sockets to fit different sizes of nuts and bolts * Socket head screw, a screw (or bolt) with a cylindrical head containing a socket into which the hexag ...
. * All AMD FX microprocessors are unlocked and overclockable. * Two Integers-Clusters (seen as logical cores from OS) in each Bulldozer Module. * 4 Bulldozer modules within FX-8 series, 3 in FX-6 series, and 2 in FX-4 series. * All models support up to 4
DIMM A DIMM () (Dual In-line Memory Module), commonly called a RAM stick, comprises a series of dynamic random-access memory integrated circuits. These memory modules are mounted on a printed circuit board and designed for use in personal compute ...
s of DDR3-1866 memory.


Bulldozer Core (Zambezi, 32 nm)

* Codenamed: ''Zambezi'' * Transistors: ~1.6 billion (real node count) *
Die Die, as a verb, refers to death, the cessation of life. Die may also refer to: Games * Die, singular of dice, small throwable objects used for producing random numbers Manufacturing * Die (integrated circuit), a rectangular piece of a semicondu ...
size: 319 mm2 (real measured up size) * L1 data cache (per core): 16 kb * L1 instruction cache (per module): 64 kb * L2 cache (per module): 2048 kb * All models support: MMX(+), SSE1 - 2 - 3 - 3s - 4.1 - 4.2 - 4a,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
, IOMMU, AES,
CLMUL Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010. Mathema ...
,
AVX AVX may refer to: Technology * Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture ** AVX2, an expansion of the AVX instruction set ** AVX-512, 512-bit extensions to the 256-bit AVX * AVX Corporation, a m ...
, XOP, FMA4,
F16C The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats. History T ...
, ABM,
Turbo Core AMD Turbo Core a.k.a. AMD Core Performance Boost (CPB) is a dynamic frequency scaling technology implemented by AMD that allows the processor to dynamically adjust and control the processor operating frequency in certain versions of its processors ...
2.0,
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduce ...
, ECC


Piledriver Core (Vishera, 32 nm)

* Codenamed: ''Vishera'' * L1 data cache (per core): 16 kb * L1 instruction cache (per module): 64 kb * L2 cache (per module): 2048 kb * All models support: MMX(+), SSE1 - 2 - 3 - 3s - 4.1 - 4.2 - 4a,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mod ...
,
AMD-V x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...
, IOMMU, AES,
CLMUL Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010. Mathema ...
,
AVX AVX may refer to: Technology * Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture ** AVX2, an expansion of the AVX instruction set ** AVX-512, 512-bit extensions to the 256-bit AVX * AVX Corporation, a m ...
, AVX 1.1, XOP,
FMA3 The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are i ...
, FMA4,
F16C The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats. History T ...
, ABM,
BMI1 Polycomb complex protein BMI-1 also known as polycomb group RING finger protein 4 (PCGF4) or RING finger protein 51 (RNF51) is a protein that in humans is encoded by the ''BMI1'' gene (B cell-specific Moloney murine leukemia virus integration ...
, TBM,
Turbo Core AMD Turbo Core a.k.a. AMD Core Performance Boost (CPB) is a dynamic frequency scaling technology implemented by AMD that allows the processor to dynamically adjust and control the processor operating frequency in certain versions of its processors ...
3.0,
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduce ...
, EVP (Enhanced Virus Protection), ECC


Notes

* AMD later re-used the FX designation for some processors in its socket FM2/FM2+ APU lineup. * The FX-9590 and FX-9370 originally launched as OEM exclusive parts which retailers listed for $920 and $576 respectively. By October they were released to retail channels in a kit with a liquid cooler at $390 and $290. # ^ All models support AMD Turbo Core, v2.0 for BULLDOZER and v3.0 for PILEDRIVER. # ^ The clock multiplier is applied to the 200 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low- latency point-to-point link that was introduced on April 2 ...
base clock. # ^ A line of Socket F and Socket AM2 processors launched in 2006 were named Athlon 64 FX, the first being the AMD FX-60. # ^ A Line of Phenom FX processors was revealed May 2007 and was branded the "FASN8" platform. # ^ Sold with a liquid cooling kit.


See also

*
AMD FX AMD FX was a series of high-end AMD microprocessors for personal computers which debuted in 2011, claimed as AMD's first native 8-core desktop processor. The line was introduced with the Bulldozer microarchitecture at launch (codename Zambezi), ...
*
List of AMD chipsets This is an overview of chipsets sold under the AMD brand, manufactured before May 2004 by the company itself, before the adoption of open platform approach as well as chipsets manufactured by ATI Technologies after October 2006 as the completi ...
*
List of AMD accelerated processing units This is a list of microprocessors designed by AMD, under the AMD Accelerated Processing Unit product series. Features overview Graphics API overview Desktop APUs Lynx: "Llano" (2011) * Socket FM1 * CPU: K10 (or ''Husky'' or K10.5) with ...
– desktop, mobile and ultra-low-power *
List of AMD Opteron processors Opteron is the name of a central processing unit (CPU) family within the AMD64 line. Designed by Advanced Micro Devices (AMD) for the server market, Opteron competed with Intel's Xeon. The Opteron family is succeeded by the Zen-based Epyc, and Ry ...
– server *
Table of AMD processors References See also * List of AMD microprocessors * List of AMD CPU microarchitectures * List of AMD mobile microprocessors * List of AMD Athlon microprocessors * List of AMD Athlon XP microprocessors * List of AMD Athlon 64 microprocesso ...


References


External links


AMD FX Processors
{{DEFAULTSORT:AMD FX microprocessors * Lists of microprocessors