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Ivy Bridge is the codename for Intel's
22 nm The 22 nm node is the process step following 32 nm in CMOS MOSFET semiconductor device fabrication. The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is around 22  nm. ...
microarchitecture In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor. A given ISA may be impl ...
used in the third generation of the Intel Core processors ( Core i7, i5, i3). Ivy Bridge is a die shrink to
22 nm The 22 nm node is the process step following 32 nm in CMOS MOSFET semiconductor device fabrication. The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is around 22  nm. ...
process based on FinFET ("3D") Tri-Gate transistors, from the former generation's
32 nm The 32 nm node is the step following the 45 nm process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell (computing), memory cel ...
Sandy Bridge microarchitecture—also known as
tick–tock model Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick). It was replaced by the process–architecture–o ...
. The name is also applied more broadly to the Xeon and Core i7
Ivy Bridge-E ''Hedera'', commonly called ivy (plural ivies), is a genus of 12–15 species of evergreen climbing or ground-creeping woody plants in the family Araliaceae, native to western, central and southern Europe, Macaronesia, northwestern Africa and ...
series of processors released in 2013. Ivy Bridge processors are backward compatible with the Sandy Bridge platform, but such systems might require a firmware update (vendor specific). In 2011, Intel released the 7-series
Panther Point The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chips - a northbridge and southbridge, and first appeared in the Intel 5 ...
chipsets with integrated USB 3.0 and
SATA 3.0 SATA (Serial AT Attachment) is a computer bus interface that connects host bus adapters to mass storage devices such as hard disk drives, optical drives, and solid-state drives. Serial ATA succeeded the earlier Parallel ATA (PATA) standard to ...
to complement Ivy Bridge. Volume production of Ivy Bridge chips began in the third quarter of 2011. Quad-core and dual-core-mobile models launched on April 29, 2012 and May 31, 2012 respectively. Core i3 desktop processors, as well as the first 22 nm Pentium, were announced and available the first week of September 2012. Ivy Bridge is the last Intel platform to fully support Windows XP and the earliest Intel microarchitecture to officially support Windows 10 64-bit.


Overview

The Ivy Bridge CPU microarchitecture is a shrink from Sandy Bridge and remains largely unchanged. Like its predecessor, Sandy Bridge, Ivy Bridge was also primarily developed by Intel's Israel branch, located in Haifa, Israel. Notable improvements include: * New 22 nm Tri-gate transistor ("3-D") technology offer as much as a 50% reduction to power consumption at the same performance level as compared to 2-D planar transistors on Intel's 32 nm process. * A new pseudorandom number generator and the RDRAND instruction, codenamed Bull Mountain.


Ivy Bridge features and performance

The mobile and desktop Ivy Bridge chips also include some minor yet notable changes over Sandy Bridge:


CPU

* F16C (16-bit floating-point conversion instructions) * RDRAND instruction (Intel Secure Key) * Max CPU multiplier of 63 (versus 57 for Sandy Bridge) * Configurable TDP (cTDP) for mobile processors * A 14- to 19-stage instruction pipeline, depending on the micro-operation cache hit or miss :


GPU

* The built-in GPU has 6 or 16
execution units In computer engineering, an execution unit (E-unit or EU) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program. It may have its own internal control sequence unit (not ...
(EUs), compared to Sandy Bridge's 6 or 12. * Intel HD Graphics with DirectX 11, OpenGL 4.0, and
OpenCL 1.2 OpenCL (Open Computing Language) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), field-progra ...
support on Windows. On Linux, OpenGL 4.2 is supported since Mesa 17.1. * Support for up to three displays (with some limitations: with chipset of 7-series and using two of them with DisplayPort or eDP) * Multiple 4K displays video playback * Intel Quick Sync Video version 2


IO

* RAM support up to 2800 MT/s in 200 MHz increments * DDR3L for mobile CPUs *
PCI Express 3.0 PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial communication, serial computer expansion bus standard, designed to replace the older Conventional PCI, PCI, PCI-X and A ...
support (omitted on Core i3, Pentium, and ultra-low-voltage LVprocessors)


Benchmark comparisons

Compared to its predecessor, Sandy Bridge: * 3% to 6% increase in CPU performance when compared clock for clock * 25% to 68% increase in integrated GPU performance


Thermal performance issues

Ivy Bridge's temperatures are reportedly 10°C higher compared to Sandy Bridge when a CPU is overclocked, even at default voltage setting. Impress PC Watch, a Japanese website, performed experiments that confirmed earlier speculations that this is because Intel used a poor quality (and perhaps lower cost) thermal interface material (thermal paste, or "TIM") between the chip and the heat spreader, instead of the fluxless solder of previous generations. The mobile Ivy Bridge processors are not affected by this issue because they do not use a heat spreader between the chip and cooling system. Socket 2011 Ivy Bridge processors continue to use the solder. Enthusiast reports describe the TIM used by Intel as low-quality, and not up to par for a "premium" CPU, with some speculation that this is by design to encourage sales of prior processors. Further analyses caution that the processor can be damaged or void its warranty if home users attempt to remedy the matter. The TIM has much lower thermal conductivity, causing heat to trap on the die. Experiments with replacing this TIM with a higher-quality one or other heat removal methods showed a substantial temperature drop, and improvements to the increased voltages and overclocking sustainable by Ivy Bridge chips. Intel claims that the smaller die of Ivy Bridge and the related increase in thermal density is expected to result in higher temperatures when the CPU is overclocked; Intel also stated that this is as expected and will likely not improve in future revisions.


Models and steppings

All Ivy Bridge processors with one, two, or four cores report the same CPUID model 0x000306A9, and are built in four different configurations differing in the number of cores, L3 cache and GPU execution units.


Ivy Bridge–based Xeon processors

Intel Ivy Bridge–based Xeon microprocessors (also known as Ivy Bridge-E) is the follow-up to Sandy Bridge-E, using the same CPU core as the Ivy Bridge processor, but in LGA 2011, LGA 1356 and
LGA 2011-1 LGA 2011, also called ''Socket R'', is a CPU socket by Intel released on November 14, 2011. It launched along with LGA 1356 to replace its predecessor, LGA 1366 (Socket B) and LGA 1567. While LGA 1356 was designed for dual-processor o ...
packages for workstations and servers. Additional high-end server processors based on the Ivy Bridge architecture, code named Ivytown, were announced September 10, 2013 at the
Intel Developer Forum The Intel Developer Forum (IDF) was a biannual gathering of technologists to discuss Intel products and products based on Intel products. The first IDF was held in 1997. To emphasize the importance of China, the Spring 2007 IDF was held in Beiji ...
, after the usual one year interval between consumer and server product releases. The Ivy Bridge-EP processor line announced in September 2013 has up to 12 cores and 30 MB third level cache, with rumors of Ivy Bridge-EX up to 15 cores and an increased third level cache of up to 37.5 MB, (citin
an original post by Hassan Mujtaba on the same website
although an early leaked lineup of Ivy Bridge-E included processors with a maximum of 6 cores. Both Core-i7 and Xeon versions are produced: the Xeon versions marketed as Xeon E5-1400 V2 act as drop-in replacements for the existing Sandy Bridge-EN based Xeon E5, Xeon E5-2600 V2 versions act as drop-in replacements for the existing Sandy Bridge-EP based Xeon E5, while Core-i7 versions designated i7-4820K, i7-4930K and i7-4960X were released on September 10, 2013, remaining compatible with the
X79 The Intel X79 ( codenamed ''Patsburg'') is a Platform Controller Hub (PCH) designed and manufactured by Intel for their LGA 2011 (Socket R) and LGA 2011-1 (Socket R2). Socket and chipset support CPUs targeted at the high-end desktop (HEDT) and e ...
and LGA 2011 hardware. For the intermediate LGA 1356 socket, Intel launched the Xeon E5-2400 V2 (codenamed Ivy Bridge-EN) series in January 2014. These have up to 10 cores. A new Ivy Bridge-EX line marketed as Xeon E7 V2 had no corresponding predecessor using the Sandy Bridge microarchitecture but instead followed the older Westmere-EX processors.


List of Ivy Bridge processors

Processors featuring Intel's HD 4000 graphics (or HD P4000 for Xeon) are set in bold. Other processors feature HD 2500 graphics or HD Graphics unless indicated by N/A.


Desktop processors

List of announced desktop processors, as follows:
  1. Requires a compatible motherboard.
Suffixes to denote: * K Unlocked (adjustable CPU multiplier up to 63 times) * S Performance-optimized lifestyle (low power with 65 W TDP) * T Power-optimized lifestyle (ultra-low power consumption with 35–45 W TDP) * P No on-die video chipset * X Extreme performance (adjustable CPU ratio with no ratio limit)


Server processors


Mobile processors

Suffixes to denote: * M Mobile processor * Q Quad-core * U Ultra-low power * X Extreme performance (adjustable CPU ratio with no ratio limit) * Y Extreme ultra-low power


Roadmap

Intel demonstrated the Haswell architecture in September 2011, which began release in 2013 as the successor to Sandy Bridge and Ivy Bridge.


Fixes

Microsoft has released a microcode update for selected Sandy Bridge and Ivy Bridge CPUs for Windows 7 and up that addresses stability issues. The update, however, negatively impacts Intel G3258 and 4010U CPU models.


See also

* List of Intel CPU microarchitectures


Notes


References


External links

* * * * * * {{DEFAULTSORT:Ivy Bridge Intel x86 microprocessors Computer-related introductions in 2012 Intel microarchitectures fr:Ivy Bridge