The z13 is a

microprocessor A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...

made by

IBM International Business Machines Corporation (using the trademark IBM), nicknamed Big Blue, is an American Multinational corporation, multinational technology company headquartered in Armonk, New York, and present in over 175 countries. It is ...

for their z13

mainframe computer A mainframe computer, informally called a mainframe or big iron, is a computer used primarily by large organizations for critical applications like bulk data processing for tasks such as censuses, industry and consumer statistics, enterprise ...

s, announced on January 14, 2015. Manufactured at GlobalFoundries' East Fishkill, New York fabrication plant (formerly IBM's own plant). IBM stated that it is the world's fastest microprocessor and is about 10% faster than its predecessor the zEC12 in general single-threaded computing, but significantly more when doing specialized tasks. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture are unaffected by this change.

Description

The Processor Unit chip (PU chip) has an area of 678 mm² and contains 3.99 billion

transistor A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch electrical signals and electric power, power. It is one of the basic building blocks of modern electronics. It is composed of semicondu ...

s. It is fabricated using IBM's 22 nm

CMOS Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss ", , ) is a type of MOSFET, metal–oxide–semiconductor field-effect transistor (MOSFET) semiconductor device fabrication, fabrication process that uses complementary an ...

silicon on insulator In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perf ...

fabrication process Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as Random-access memory, RAM and flash memory). It is a ...

, using 17 metal layers and supporting speeds of 5.0

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), often described as being equivalent to one event (or Cycle per second, cycle) per second. The hertz is an SI derived unit whose formal expression in ter ...

, which is less than its predecessor, the zEC12. The PU chip can have six, seven or eight cores (or "processor units" in IBM's parlance) enabled depending on configuration. The PU chip is packaged in a single-chip module, a departure from IBM's previous mainframe processors, which were mounted on large

multi-chip module A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or Lead (electronics), "pins") where multiple integrated circuits (ICs or "chips"), semiconductor Die (integrated circuit), d ...

s. A computer drawer consists of six PU chips and two Storage Controller (SC) chips. The cores implement the CISC z/Architecture with a

superscalar A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single in ...

, out-of-order

pipeline A pipeline is a system of Pipe (fluid conveyance), pipes for long-distance transportation of a liquid or gas, typically to a market area for consumption. The latest data from 2014 gives a total of slightly less than of pipeline in 120 countries ...

. It has facilities related to

transactional memory In computer science and computer engineering, engineering, transactional memory attempts to simplify concurrent programming by allowing a group of load and store instructions to execute in an linearizability, atomic way. It is a concurrency control ...

, and new features such as two-way

simultaneous multithreading Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better use the resources provided by modern proces ...

(SMT), 139 new

SIMD Single instruction, multiple data (SIMD) is a type of parallel computer, parallel processing in Flynn's taxonomy. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneousl ...

instructions,

data compression In information theory, data compression, source coding, or bit-rate reduction is the process of encoding information using fewer bits than the original representation. Any particular compression is either lossy or lossless. Lossless compressi ...

, improved

cryptography Cryptography, or cryptology (from "hidden, secret"; and ''graphein'', "to write", or ''-logy, -logia'', "study", respectively), is the practice and study of techniques for secure communication in the presence of Adversary (cryptography), ...

and logical partitioning. The cores have numerous other enhancements such as a new superscalar pipeline, on-chip cache design and error correction. The instruction pipeline has an instruction queue that can fetch 6 instructions per cycle; and issue up to 10 instructions per cycle. Each core has a private 96 KB L1 instruction cache, a private 128 KB L1 data cache, a private 2 MB L2 cache instruction cache, and a private 2 MB L2 data cache. In addition, there is a 64 MB shared L3 cache implemented in eDRAM. The z13 chip has on board multi-channel DDR3 RAM

memory controller A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data going to and from a computer's main memory. When a memory controller is integrated into anothe ...

supporting a

RAID RAID (; redundant array of inexpensive disks or redundant array of independent disks) is a data storage virtualization technology that combines multiple physical Computer data storage, data storage components into one or more logical units for th ...

-like configuration to recover from memory faults. The z13 also includes two GX bus as well as two new Gen 3 PCIe controllers for accessing host channel adapters and peripherals.

Vector Facility

The z13 processor supports a new vector facility architecture. It adds 32 vector registers, each 128 bits wide; the existing 16 floating-point registers are overlaid on the new vector registers. The new architecture adds over 150 new instructions to operate on data in vector registers, including integer, floating-point, and string data types. The z13 implementation includes two independent

units to operate on vector data.

Storage Controller

A compute drawer consists of two clusters. Each cluster comprises three PU chips and one Storage Controller chip (SC chip). Even though each PU chip has 64 MB L3 cache shared by the 8 cores and other on-die facilities the SC chip adds 480 MB off-die L4 cache shared by three PU chips. The two SC chips add a total of 960 MB L4 cache per drawer. The SC chips also handle the communications between the sets of three PU chips and to other drawers. The SC chip is manufactured on the same 22 nm process as the z13 PU chips, has 15 metal layers, measures 28.4 × 23.9 mm (678 mm²), consists of 7.1 billion transistors and runs at half the clock frequency of the CP chip.

References

{{DEFAULTSORT:Ibm z13 (Microprocessor) z13 z13 Computer-related introductions in 2015