Emerald Rapids
   HOME

TheInfoList



OR:

Emerald Rapids is a
codename A code name, call sign or cryptonym is a Code word (figure of speech), code word or name used, sometimes clandestinely, to refer to another name, word, project, or person. Code names are often used for military purposes, or in espionage. They may ...
for
Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...
's fifth generation
Xeon Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same arc ...
server processors based on the Intel 7 node. Emerald Rapids CPUs are designed for data centers; the roughly contemporary
Raptor Lake Raptor Lake is Intel's codename for the 13th-generation of Intel Core processors based on a hybrid architecture, utilizing Raptor Cove performance cores and Gracemont efficient cores. Raptor Lake launched on October 20, 2022. Mobile versions ...
is intended for the wider public. Nevine Nassif is a chief engineer for this generation.Crafting and Testing the Do-Anything Server Chip
/ref>


Features


CPU

* Up to 64
Raptor Cove Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process no ...
CPU cores per package
Trust Domain Extensions (TDX)
a collection of technologies to help deploy hardware-isolated virtual machines (VMs) called trust domains (TDs)


I/O

*
DDR5 Double Data Rate 5 Synchronous Dynamic Random-Access Memory (DDR5 SDRAM) is a type of synchronous dynamic random-access memory. Compared to its predecessor DDR4 SDRAM Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) ...
memory support up to DDR5-5600 * Up to 80 PCI Express 5.0 lanes


See also

* Intel's
process–architecture–optimization model Process–architecture–optimization is a development model for central processing units (CPUs) that Intel adopted in 2016. Under this three-phase (three-year) model, every microprocessor die shrink is followed by a microarchitecture change and t ...
* Intel's
tick–tock model Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick). It was replaced by the process–architecture–o ...
*
List of Intel CPU microarchitectures The following is a ''partial'' list of Intel CPU microarchitectures. The list is ''incomplete''. Additional details can be found in Intel's Tick–tock model and Process–architecture–optimization model. x86 microarchitectures 16-bit ; ...


References

{{Intel processor roadmap Intel products Intel microprocessors