The Athlon 64 X2 is the first native
dual-core
A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such ...
desktop central processing unit
A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, an ...
(CPU) designed by
Advanced Micro Devices
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufa ...
(AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled
Athlon 64
The Athlon 64 is a ninth-generation, AMD64-architecture microprocessor produced by Advanced Micro Devices (AMD), released on September 23, 2003. It is the third processor to bear the name '' Athlon'', and the immediate successor to the Athlon ...
, joining it with another functional core on one
die, and connecting both via a shared dual-channel memory controller/north bridge and additional control logic. The initial versions are based on the E
stepping model of the Athlon 64 and, depending on the model, have either 512 or 1024 KB of
L2 cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
per core. The Athlon 64 X2 can decode instructions for Streaming SIMD Extensions 3 (
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
), except those few specific to Intel's architecture. The first Athlon 64 X2 CPUs were released in May 2005, in the same month as Intel's first dual-core processor, the
Pentium D
Pentium D is a range of desktop 64-bit x86-64 processors based on the NetBurst microarchitecture, which is the dual-core variant of the Pentium 4 manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to ...
.
In June 2007, AMD released low-voltage variants of their low-end 65 nm
Athlon 64 X2, named "
Athlon X2
The Athlon 64 X2 is the first native Multi-core processor, dual-core desktop computer, desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU ...
". The
Athlon X2
The Athlon 64 X2 is the first native Multi-core processor, dual-core desktop computer, desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU ...
processors feature reduced
thermal design power
The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipa ...
(TDP) of 45
Watt
The watt (symbol: W) is the unit of power or radiant flux in the International System of Units (SI), equal to 1 joule per second or 1 kg⋅m2⋅s−3. It is used to quantify the rate of energy transfer. The watt is named after James Wa ...
(W). The name was also used for
K10 based budget CPUs with two cores deactivated.
Multithreading
The primary benefit of dual-core processors (like the Athlon 64 X2) over single-core processors is their ability to process more
software
Software is a set of computer programs and associated software documentation, documentation and data (computing), data. This is in contrast to Computer hardware, hardware, from which the system is built and which actually performs the work.
...
threads
Thread may refer to:
Objects
* Thread (yarn), a kind of thin yarn used for sewing
** Thread (unit of measurement), a cotton yarn measure
* Screw thread, a helical ridge on a cylindrical fastener
Arts and entertainment
* ''Thread'' (film), 2016 ...
at the same time. The ability of processors to execute multiple threads simultaneously is called
thread-level parallelism
Task parallelism (also known as function parallelism and control parallelism) is a form of parallelization of computer code across multiple processors in parallel computing environments. Task parallelism focuses on distributing tasks—concurrent ...
(TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed. The need for TLP processing ability depends on the situation to a great degree, and some situations benefit from it far more than others. Some programs are currently written for only one thread, and thus cannot use the processing power of a second core.
Programs often written with multiple threads and able to use dual-cores include many music and video encoding applications, and especially professional rendering programs. High TLP applications currently correspond to
server and
workstation
A workstation is a special computer designed for technical or scientific applications. Intended primarily to be used by a single user, they are commonly connected to a local area network and run multi-user operating systems. The term ''worksta ...
situations more than the typical desktop. These applications can reach almost twice the performance of a single-core Athlon 64 of the same specifications.
Multitasking also runs a sizable number of threads. Intense multitasking processes have sped up by considerably more than twice. This is mostly due to the high overhead caused by constantly switching threads, and could potentially be improved by adjustments to
operating system
An operating system (OS) is system software that manages computer hardware, software resources, and provides common daemon (computing), services for computer programs.
Time-sharing operating systems scheduler (computing), schedule tasks for ef ...
scheduling
A schedule or a timetable, as a basic time-management tool, consists of a list of times at which possible tasks, events, or actions are intended to take place, or of a sequence of events in the chronological order in which such things are i ...
code.
In the consumer segment of the market, the X2 improves on the performance of the original Athlon 64, especially for multi-threaded software.
Manufacturing costs
Having two cores, the Athlon 64 X2 has an increased number of
transistor
upright=1.4, gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (pink).
A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch ...
s. The 1 MB L2 cache 90 nm Athlon 64 X2 processor is 219 mm² in size with 243 million
transistor
upright=1.4, gate (G), body (B), source (S) and drain (D) terminals. The gate is separated from the body by an insulating layer (pink).
A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch ...
s whereas its 1 MB L2 cache 90 nm
Athlon 64
The Athlon 64 is a ninth-generation, AMD64-architecture microprocessor produced by Advanced Micro Devices (AMD), released on September 23, 2003. It is the third processor to bear the name '' Athlon'', and the immediate successor to the Athlon ...
counterpart is 103.1 mm² and has 164 million transistors. The 65 nm Athlon 64 X2 with only 512 KB L2 per Core reduced this to 118 mm² with 221 million transistors compared to the 65 nm Athlon 64 with 77.2 mm² and 122 million transistors. As a result, a larger area of
silicon
Silicon is a chemical element with the symbol Si and atomic number 14. It is a hard, brittle crystalline solid with a blue-grey metallic luster, and is a tetravalent metalloid and semiconductor. It is a member of group 14 in the periodic ...
must be
defect free. These size requirements necessitate a more complex
fabrication process, which further adds to the production of fewer functional processors per single silicon wafer. This lower
yield makes the X2 more expensive to produce than the single-core processor.
In the middle of June 2006 AMD stated that they would no longer make any non-FX Athlon 64 or Athlon 64 X2 models with 1 MB L2 caches.
This led to only a small production number of the Socket-AM2 Athlon 64 X2 with 1 MB L2 cache per core, known as 4000+, 4400+, 4800+, and 5200+. The Athlon 64 X2 with 512 KB per core, known as 3800+, 4200+, 4600+, and 5000+, were produced in far greater numbers. The introduction of the F3 stepping then saw several models with 1 MB L2 cache per core as production refinements resulted in an increased yield.
Features
CPU features table
CPU cores
Athlon 64 X2
Manchester (90 nm SOI)
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
* CPU
stepping: E4
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 256, 512 KB full speed, per core
*
MMX, Extended
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
AMD64,
Cool'n'Quiet,
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
*
Socket 939,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1000 MHz, HT1000)
* VCore: 1.35–1.4 V
* Power use (
TDP): 89 Watt
* First release: 1 August 2005
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 2000–2400 MHz
** 256 KB L2 cache:
*** 3600+: 2000 MHz
** 512 KB L2 cache:
*** 3800+: 2000 MHz
*** 4200+: 2200 MHz
*** 4600+: 2400 MHz (110 Watt TDP)
Toledo (90 nm SOI)
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
* CPU
stepping: E6
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 512 or 1024 KB full speed, per core
*
MMX, Extended
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
AMD64,
Cool'n'Quiet,
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
*
Socket 939,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1000 MHz, HT1000)
* VCore: 1.35–1.4 V
* Power use (
TDP):
** 89 Watt: 3800+, 4200+ and 4400+
** 110 Watt: 4400+, 4600+ and 4800+
* First release: 21 April 2005
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 2000–2400 MHz
** 512 KB L2 cache:
*** 3800+: 2000 MHz
*** 4200+: 2200 MHz
*** 4600+: 2400 MHz
** 1024 KB L2 cache:
*** 4400+: 2200 MHz
*** 4800+: 2400 MHz
Windsor (90 nm SOI)
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
* CPU
stepping: F2, F3
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 256, 512 or 1024 KB full speed, per core
*
MMX, Extended
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
AMD64,
Cool'n'Quiet,
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
*
Socket AM2
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. It was released on May 23, 2006, ...
,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1000 MHz, HT1000)
* VCore: 1.25–1.35 V
* Power use (
TDP):
** 35 Watt (3800+ EE SFF)
** 65 Watt (3600+ to 5200+ EE)
** 89 Watt (3800+ to 6000+)
** 125 Watt (6000+ to 6400+)
* First release: May 23, 2006
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 2000 MHz–3200 MHz
** 256 KB L2 cache:
*** 3600+: 2000 MHz
** 512 KB L2 cache: (often mislabeled as ''Brisbane'' core)
*** 3800+: 2000 MHz
*** 4200+: 2200 MHz
*** 4600+: 2400 MHz (F2&F3)
*** 5000+: 2600 MHz (F2&F3)
*** 5400+: 2800 MHz (F3)
** 1024 KB L2 cache:
*** 4000+: 2000 MHz
*** 4400+: 2200 MHz
*** 4800+: 2400 MHz
*** 5200+: 2600 MHz (F2&F3)
*** 5600+: 2800 MHz (F3)
*** 6000+: 3000 MHz (F3)
*** 6400+: 3200 MHz (F3)
Brisbane (65 nm SOI)
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
* CPU
stepping: G1, G2
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 512 KB full speed, per core
*
MMX, Extended
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
AMD64,
Cool'n'Quiet,
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
*
Socket AM2
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. It was released on May 23, 2006, ...
,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1000 MHz, HT1000)
* VCore: 1.25–1.35 V
* Die size: 126 mm²
* Power use (
TDP): 65 or 89 Watt
* First release: Dec 5, 2006
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 1900 MHz–3100 MHz
** 3600+: 1900 MHz (G1)
** 3800+: 2000 MHz
** 4000+: 2100 MHz
** 4200+: 2200 MHz (G1&G2)
** 4400+: 2300 MHz (G1&G2)
** 4600+: 2400 MHz (G2)
** 4800+: 2500 MHz (G1&G2)
** 5000+: 2600 MHz (G1&G2)
** 5200+: 2700 MHz (G1&G2)
** 5400+: 2800 MHz (G2)
** 5600+: 2900 MHz (G2)
** 5800+: 3000 MHz (G2)
** 6000+: 3100 MHz (G2)
Athlon X2
'64' was omitted from the name of the Brisbane 'BE' series; the 64-bit marketing campaign initiated by AMD became insignificant once essentially all consumer CPUs became
64-bit
In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A comp ...
processors.
Brisbane (65 nm SOI)
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
* CPU
stepping: G2
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 512 KB full speed, per core
*
MMX, Extended
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
AMD64,
Cool'n'Quiet,
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
*
Socket AM2
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. It was released on May 23, 2006, ...
,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1000 MHz, HT1000)
* VCore: 1.15–1.20 V
* Die size: 118 mm²
* Power use (
TDP): 45 Watt
* First release: October, 2007
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 1900 MHz–2600 MHz
** BE-2300: 1900 MHz (G2)
** BE-2350: 2100 MHz (G2)
** BE-2400: 2300 MHz (G2)
** BE-2450: 2500 MHz (G2)
** 4050e: 2100 MHz (G2)
** 4450e: 2300 MHz (G2)
** 4850e: 2500 MHz (G2)
** 5050e: 2600 MHz (G2)
Kuma (65 nm SOI)
* Chip harvests from Agena with two cores disabled
*
Silicon on insulator
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...
(SOI)
*
AMD K10
The AMD Family 10h, or K10, is a microprocessor microarchitecture by AMD based on the K8 microarchitecture. Though there were once reports that the K10 had been canceled, microarchitecture
In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor. A given ISA may be imp ...
* CPU
stepping: B3
* L1 cache: 64 + 64 KB (data + instructions), per core
* L2 cache: 512 KB full speed, per core
* L3 cache: 2 MB (shared)
*
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revi ...
,
SSE4a, Enhanced
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of flo ...
,
NX bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
,
AMD64,
Cool'n'Quiet,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
*
Socket AM2+,
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...
(1800 MHz, HT3.0)
* VCore: 1.05–1.25 V
* Die size: 288 mm²
* Power use: (
TDP): 95 Watt
* First release: December 15, 2008
*
Clock rate
In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the ...
: 2300–2800 MHz
** 6500BE: 2300 MHz
** 7450: 2400 MHz
** 7550: 2500 MHz
** 7750BE: 2700 MHz
** 7850BE: 2800 MHz
See also
*
List of AMD Athlon X2 processors
*
List of AMD Athlon 64 processors
*
List of AMD Athlon II processors
*
List of AMD processors
*
Parallel computing
References
External links
Athlon64 X2 product siteComparisonwith the
Intel Core
Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time ...
Duo
AMD Athlon 64 Power and Thermal Data Sheet site (PDF)
{{AMD processors
Advanced Micro Devices x86 microprocessors