|
Structured ASIC Platform
{{no footnotes, date=July 2013 Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. In a FPGA, interconnects and logic blocks are programmable after fabrication, offering high flexibility of design and ease of debugging in prototyping. However, the capability of FPGAs to implement large circuits is limited, in both size and speed, due to complexity in programmable routing, and significant space occupied by programming elements, e.g. SRAMs, MUXes. On the other hand, ASIC design flow is expensive. Every different design needs a complete different set of masks. The Structured ASIC is a solution between these two. It has basically the same structure as a FPGA, but being mask-programmable instead of field-programmable, by configuring one or several vi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Application-specific Integrated Circuit
An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficiency video codec. Application-specific standard product (ASSP) chips are intermediate between ASICs and industry standard integrated circuits like the 7400 series or the 4000 series. ASIC chips are typically fabricated using metal-oxide-semiconductor (MOS) technology, as MOS integrated circuit chips. As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 logic gates to over 100 million. Modern ASICs often include entire microprocessors, memory blocks including ROM, RAM, EEPROM, flash memory and other large building blocks. Such an ASIC is often termed a SoC (system-on-chip). Designers of digital ASICs often use a hardware descrip ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence the term '' field-programmable''. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together. Logic blocks can be configured to perform complex combinational functions, or act as simple logic gates like AND and XOR. In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. Many FPGAs can be reprogrammed to implement different logic functions, allowing flexible reconfigurabl ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Non-recurring Engineering
Non-recurring engineering (NRE) cost refers to the one-time cost to research, design, develop and test a new product or product enhancement. When budgeting for a new product, NRE must be considered to analyze if a new product will be profitable. Even though a company will pay for NRE on a project only once, NRE costs can be prohibitively high and the product will need to sell well enough to produce a return on the initial investment. NRE is unlike production costs, which must be paid constantly to maintain production of a product. It is a form of fixed cost in economics terms. Once a system is designed any number of units can be manufactured without increasing NRE cost. NRE can be also formulated and paid via another commercial term called Royalty Fee. The Royalty Fee could be a percentage of sales revenue or profit or combination of these two, which have to be incorporated in a mid to long term agreement between technology supplier and the OEM. In a project-type (manufacturing) com ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Fabrication (semiconductor)
Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuit (IC) chips such as modern computer processors, microcontrollers, and memory chips such as NAND flash and DRAM that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photolithographic and chemical processing steps (such as surface passivation, thermal oxidation, planar diffusion and junction isolation) during which electronic circuits are gradually created on a wafer made of pure semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications. The entire manufacturing process takes time, from start to packaged chips ready for shipment, at least six to eight weeks (tape-out only, not including the circuit design) and is performed in highly specialized semiconductor fabrication plants, also called foundries or fabs. All fabrication takes place inside a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Static Random-access Memory
Static random-access memory (static RAM or SRAM) is a type of random-access memory (RAM) that uses latching circuitry (flip-flop) to store each bit. SRAM is volatile memory; data is lost when power is removed. The term ''static'' differentiates SRAM from DRAM (''dynamic'' random-access memory) — SRAM will hold its data permanently in the presence of power, while data in DRAM decays in seconds and thus must be periodically refreshed. SRAM is faster than DRAM but it is more expensive in terms of silicon area and cost; it is typically used for the cache and internal registers of a CPU while DRAM is used for a computer's main memory. History Semiconductor bipolar SRAM was invented in 1963 by Robert Norman at Fairchild Semiconductor. MOS SRAM was invented in 1964 by John Schmidt at Fairchild Semiconductor. It was a 64-bit MOS p-channel SRAM. The SRAM was the main driver behind any new CMOS-based technology fabrication process since 1959 when CMOS was invented. In 1965 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Multiplexer
In electronics, a multiplexer (or mux; spelled sometimes as multiplexor), also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line. The selection is directed by a separate set of digital inputs known as select lines. A multiplexer of 2^n inputs has n select lines, which are used to select which input line to send to the output. A multiplexer makes it possible for several input signals to share one device or resource, for example, one analog-to-digital converter or one communications transmission medium, instead of having one device per input signal. Multiplexers can also be used to implement Boolean functions of multiple variables. Conversely, a demultiplexer (or demux) is a device taking a single input and selecting signals of the output of the compatible mux, which is connected to the single input, and a shared selection line. A multiplexer is often used with a complement ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Via (electronics)
A via (Latin for ''path'' or ''way'') is an electrical connection between copper layers in a printed circuit board. Essentially a via is a small drilled hole that goes through two or more adjacent layers; the hole is plated with copper that forms electrical connection through the insulation that separates the copper layers. Vias are important for PCB manufacturing. This is because the vias are drilled with certain tolerances and may be fabricated off their designated locations, so some allowance for errors in drill position must be made prior to manufacturing or else the manufacturing yield can decrease due to non-conforming boards (according to some reference standard) or even due to failing boards. In addition, regular through hole vias are considered fragile structures as they are long and narrow; the manufacturer must ensure that the vias are plated properly throughout the barrel and this in turn causes several processing steps. In printed circuit boards In printed c ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Altera
Altera Corporation was a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015. The main product lines from Altera were the flagship Stratix series, mid-range Arria series, and lower-cost Cyclone series system on a chip field-programmable gate arrays (FPGAs); the MAX series complex programmable logic device and non-volatile FPGAs; Quartus design software; and Enpirion PowerSoC DC-DC power solutions. The company was founded in 1983 by semiconductor veterans Rodney Smith, Robert Hartmann, James Sansbury, and Paul Newhagen with $500,000 in seed money. The name of the company was a play on "alterable", the type of chips the company created. In 1984, the company formed a long-running design partnership with Intel, and 1988, became a public company via an initial public offering. In 1994, Altera acquired the PLD business of Intel for $50 million. On December 28, 2015, the company was acquired by ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Gate Array
A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according to a custom order by adding metal interconnect layers in the factory. It was popular during upheaval in semiconductor industry in 80s and its usage declined by end of 90s. Similar technologies have also been employed to design and manufacture analog, analog-digital, and structured arrays, but, in general, these are not called gate arrays. Gate arrays have also been known as ''uncommitted logic arrays'' (''ULAs''), which also offered linear circuit functions, and ''semi-custom chips''. History Development Gate arrays had several concurrent development paths. Ferranti in the UK pioneered commercializing bipolar ULA technology, offering circuits of "100 to 10,000 gates and above" by 1983. The company's early lead in semi-custom chips, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
EASIC
eASIC is a fabless semiconductor company offering new ASIC devices used in the production of customized silicon devices. eASIC specializes in offering new ASIC devices that are customized for specific applications and offer improved performance and lower costs compared to traditional ASICs. The company's products are used in a variety of markets, including communications, data center, and military. One of the key features of eASIC's ASIC devices is their use of a novel architecture known as Structured ASIC. This architecture allows the company to offer customized ASICs with shorter design cycles and lower non-recurring engineering (NRE) costs compared to traditional ASICs. In addition to its ASIC products, eASIC also offers a range of design tools and services to help customers design and implement their ASIC solutions. The company works closely with its customers to understand their specific requirements and develop customized solutions that meet their needs. History eASIC ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Malgorzata Marek-Sadowska
Malgorzata Marek-Sadowska is a Polish-American electronics engineer known for her research in VLSI circuit design. She is a professor emeritus of electrical and computer engineering at the University of California, Santa Barbara, a member of the university's Institute for Energy Efficiency, and the director of the VLSI CAD Lab at the university. Marek-Sadowska was an assistant professor at the Warsaw University of Technology from 1976 until 1982. In 1979, she began a visiting position at the University of California, Berkeley, continued at Berkeley as a researcher, and moved to Santa Barbara in 1990. She was editor-in-chief of ''IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems'' from 1993 to 1997, and in 1997, she was elected as a Fellow of the IEEE The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Application-specific Integrated Circuits
An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficiency video codec. Application-specific standard product (ASSP) chips are intermediate between ASICs and industry standard integrated circuits like the 7400 series or the 4000 series. ASIC chips are typically fabricated using metal-oxide-semiconductor (MOS) technology, as MOS integrated circuit chips. As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 logic gates to over 100 million. Modern ASICs often include entire microprocessors, memory blocks including ROM, RAM, EEPROM, flash memory and other large building blocks. Such an ASIC is often termed a SoC (system-on-chip). Designers of digital ASICs often use a hardware descrip ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
_Cyclone_III_(cropped).jpg "Click for more on -> Altera")
