Socket FT3b
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Socket FT3b
AMD's Socket FT3 or BGA-769 targets mobile devices and was designed for APUs codenamed ''Kabini'' and ''Temash'', ''Beema'' and ''Mullins'' (Socket FT3b). ''"Kabini"''- and ''"Temash"''-branded products combine Jaguar with Islands (GCN), UVD 3 and VCE 2.0 video acceleration and AMD Eyefinity-based multi-monitor support of maximum two monitors. ''"Beema"''- and ''"Mullins"''-branded products combine Puma Puma or PUMA may refer to: Animals * ''Puma'' (genus), a genus in the family Felidae ** Puma (species) or cougar, a large cat Businesses and organisations * Puma (brand), a multinational shoe and sportswear company * Puma Energy, a mid- and d ... with AMD Radeon Rx 200 Series (GCN), UVD 3 and VCE 2.0 video acceleration and AMD Eyefinity-based multi-monitor support of maximum two monitors. Its desktop counterpart is Socket AM1. Feature overview for AMD APUs See also * List of AMD Accelerated Processing Unit microprocessors External links Socket FS1 Design ...
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Ball Grid Array
A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds. BGAs were introduced in the 1990s and became popular by 2001. Soldering of BGA devices requires precise control and is usually done by automated processes such as in computer-controlled automatic reflow ovens. Description The BGA is descended from the pin grid array (PGA), which is a package with one face covered (or partly covered) with pins in a grid pattern which, in operation, conduct electrical signals betwe ...
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AMD Accelerated Processing Unit
AMD Accelerated Processing Unit (APU), formerly known as Fusion, is a series of 64-bit microprocessors from Advanced Micro Devices (AMD), combining a general-purpose AMD64 central processing unit ( CPU) and integrated graphics processing unit (IGPU) on a single die. AMD announced the first generation APUs, ''Llano'' for high-performance and ''Brazos'' for low-power devices, in January 2011. The second generation ''Trinity'' for high-performance and ''Brazos-2'' for low-power devices were announced in June 2012. The third generation ''Kaveri'' for high performance devices were launched in January 2014, while ''Kabini'' and ''Temash'' for low-power devices were announced in the summer of 2013. Since the launch of the Zen microarchitecture, Ryzen and Athlon APUs have released to the global market as Raven Ridge on the DDR4 platform, after Bristol Ridge a year prior. AMD has also supplied semi-custom APUs for consoles starting with the release of Sony PlayStation 4 and Microsoft ...
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Advanced Micro Devices
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactured its own processors, the company later outsourced its manufacturing, a practice known as going fabless, after GlobalFoundries was spun off in 2009. AMD's main products include microprocessors, motherboard chipsets, embedded processors, graphics processors, and FPGAs for servers, workstations, personal computers, and embedded system applications. History First twelve years Advanced Micro Devices was formally incorporated by Jerry Sanders, along with seven of his colleagues from Fairchild Semiconductor, on May 1, 1969. Sanders, an electrical engineer who was the director of marketing at Fairchild, had, like many Fairchild executives, grown frustrated with the increasing lack of support, opportunity, and flexibility within th ...
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Jaguar (microarchitecture)
The AMD Jaguar Family 16h is a low-power microarchitecture designed by AMD. It is used in APUs succeeding the Bobcat Family microarchitecture in 2013 and being succeeded by AMD's Puma architecture in 2014. It is two-way superscalar and capable of out-of-order execution. It is used in AMD's Semi-Custom Business Unit as a design for custom processors and is used by AMD in four product families: ''Kabini'' aimed at notebooks and mini PCs, ''Temash'' aimed at tablets, ''Kyoto'' aimed at micro-servers, and the ''G-Series'' aimed at embedded applications. Both the PlayStation 4 and the Xbox One use chips based on the Jaguar microarchitecture, with more powerful GPUs than AMD sells in its own commercially available Jaguar APUs. Design * 32 KiB instruction + 32 KiB data L1 cache per core, L1 cache includes parity error detection * 16-way, 1–2 MiB unified L2 cache shared by two or four cores, L2 cache is protected from errors by the use of error correcting code * Out ...
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Radeon HD 8000 Series
The Radeon HD 8000 series is a family of computer Graphics processing unit, GPUs developed by Advanced Micro Devices, AMD. AMD was initially rumored to release the family in the second quarter of 2013, with the cards manufactured on a 28 nm process and making use of the improved Graphics Core Next architecture. However the 8000 series turned out to be an OEM rebadge of the Radeon HD 7000 series, 7000 series (although Bonaire is a GCN 2.0 based chip, thus being of newer development). Architecture The Radeon HD 7000 series was launched in 2011 and it marked AMD's shift from VLIW (TeraScale (microarchitecture), TeraScale) to RISC/SIMD architecture (Graphics Core Next). The highend-mainstream cards were equipped with GCN-based chips while some of the mid-low end ones were just rebranded TeraScale-based cards. All of the GCN-based chips were made using the 28 nm process, becoming the first chips ever to be based on that technology. The GCN-based chips for desktop cards wer ...
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Unified Video Decoder
Unified Video Decoder (UVD, previously called Universal Video Decoder) is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1. UVD was introduced with the Radeon HD 2000 Series and is integrated into some of AMD's GPUs and APUs. UVD occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Video Coding Engine (VCE). As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN). Overview The UVD is based on an ATI Xilleon video processor, which is incorporated onto the same die as the GPU and is part of the ATI Avivo HD for hardware video decoding, along with the Advanced Video Processor (AVP). UVD, as stated by AMD, handles decoding of H.264/AVC, and VC-1 video codecs entirely in hardware. The UVD technology is based on the Cadence Tensilica Xtensa processor, which was originally licens ...
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Video Coding Engine
Video Code Engine (VCE, was earlier referred to as Video Coding Engine, Video Compression Engine or Video Codec Engine in official AMD documentation) is AMD's video encoding application-specific integrated circuit implementing the video codec H.264/MPEG-4 AVC. Since 2012 it was integrated into all of their GPUs and APUs except Oland. VCE was introduced with the Radeon HD 7000 Series on 22 December 2011. VCE occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Unified Video Decoder (UVD). As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN). Overview The handling of video data involves computation of data compression algorithms and possibly of video processing algorithms. As the template compression methods shows, lossy video compression algorithms involve the steps: motion estimation (ME), discrete cosine transform (DCT), and entropy encoding (EC). AMD Video Cod ...
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AMD Eyefinity
AMD Eyefinity is a brand name for AMD video card products that support multi-monitor setups by integrating multiple (up to six) display controllers on one GPU. AMD Eyefinity was introduced with the Radeon HD 5000 Series "Evergreen" in September 2009 and has been available on APUs and professional-grade graphics cards branded AMD FirePro as well. AMD Eyefinity supports a maximum of 2 non-DisplayPort displays (e.g., HDMI, DVI, VGA, DMS-59, VHDCI) (which AMD calls "legacy output") and up to 6 DisplayPort displays simultaneously using a single graphics card or APU. To feed more than two displays, the additional panels must have native DisplayPort support. Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed. The setup of large video walls by connecting multiple computers over Gigabit Ethernet or Ethernet is also supported. The version of AMD Eyefinity (aka DCE, display controller engine) introduced with Excavator-based Carrizo APUs features a Video underlay pi ...
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Multi-monitor
Multi-monitor, also called multi-display and multi-head, is the use of multiple physical display devices, such as monitors, televisions, and projectors, in order to increase the area available for computer programs running on a single computer system. Research studies show that, depending on the type of work, multi-head may increase the productivity by 50–70%. Measurements of the Institute for Occupational Safety and Health of the German Social Accident Insurance showed that the quality and quantity of worker performance varies according to the screen setup and type of task. Overall, the results of physiological studies and the preferences of the test persons favour a dual-monitor rather than single-monitor setup. Physiologically limiting factors observed during work on dual monitors were minor and not generally significant. There is no evidence that office work with dual-monitor setups presents a possible hazard to workers. Implementation Multiple computers can be connected ...
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Puma (microarchitecture)
The Puma Family 16h is a low-power microarchitecture by AMD for its APUs. It succeeds the Jaguar as a second-generation version, targets the same market, and belongs to the same AMD architecture Family 16h. The ''Beema'' line of processors are aimed at low-power notebooks, and ''Mullins'' are targeting the tablet sector. Design The Puma cores use the same microarchitecture as Jaguar, and inherits the design: * Out-of-order execution and Speculative execution, up to 4 CPU cores * Two-way integer execution * Two-way 128-bit wide floating-point and packed integer execution * Integer hardware divider * Puma does not feature clustered multi-thread (CMT), meaning that there are no "modules" * Puma does not feature Heterogeneous System Architecture or zero-copy * 32 KiB instruction + 32 KiB data L1 cache per core * 1–2 MiB unified L2 cache shared by two or four cores * Integrated single channel memory controller supporting 64bit DDR3L * 3.1 mm2 area per core ...
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AMD Radeon Rx 200 Series
The Radeon 200 series is a series of graphics processors developed by AMD. These GPUs are manufactured on a 28 nm Gate-Last process through TSMC or Common Platform Alliance. Release The Rx 200 series was announced on September 25, 2013, at the AMD GPU14 Tech Day event. Non-disclosure agreements were lifted on October 15, except for the R9 290X, and pre-orders opened on October 3. Architecture * Graphics Core Next 3 (Volcanic Islands) is found on the R9 285 (Tonga Pro) branded products. * Graphics Core Next 2 (Sea Islands) is found on R7 260 (Bonaire), R7 260X (Bonaire XTX), R9 290 (Hawaii Pro), R9 290X (Hawaii XT), and R9 295X2 (Vesuvius) branded products. * Graphics Core Next 1 (Southern Islands) is found on R9 270, 270X, 280, 280X, R7 240, 250, 250X, 265, and R5 240 branded products. * TeraScale 2 (VLIW5) (Northern Islands or Evergreen) is found on R5 235X and below branded products. * OpenGL 4.x compliance requires supporting FP64 shaders. These are implemented by emu ...
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Socket AM1
Socket FS1b (rebranded as Socket AM1 ) is a socket designed by AMD, launched in April 2014 for desktop SoCs in the value segment. Socket AM1 is intended for a class of CPUs that contain both an integrated GPU and a chipset, essentially forming a complete SoC implementation, and as such has pins for display, PCI Express, SATA, and other I/O interfaces directly in the socket. AMD's first compatible CPUs, designated as APUs, are 4 socketable chips in the ''Kabini'' family of the Jaguar microarchitecture, marketed under the Athlon and Sempron names and announced on April 9, 2014. The brand names are Athlon and Sempron. The underlying microarchitectures are Jaguar and Puma. All products are SoCs, this means the Chipset is on the die of the APU and not on the motherboard. While the AMD mobile CPUs are available in a 722-pin package Socket FS1, it is not clear whether these notebook CPUs are compatible with Socket AM1 or vice versa. Its mobile counterpart is Socket FT3 (BGA-769). ...
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