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Socket FM1
Socket FM1 is a CPU socket for desktop computers used by AMD Accelerated Processing Unit#K10 architecture (2011): Llano, AMD early A-series APUs ("Llano") processors and Llano-derived Athlon II processors. It was released in July 2011. Its direct successors are Socket FM2 (September 2012) and Socket FM2+ (January 2014), while Socket AM1 (January 2014) is targeting low-power SoCs. Chipsets For available chipsets consult List of AMD chipsets#Fusion controller hubs (FCH), Fusion controller hubs (FCH). Available APUs APU's using Socket FM1 are AMD's List_of_AMD_accelerated_processing_units#Lynx:_"Llano"_(2011), Lynx platform. Please consult List of AMD accelerated processing units for concrete product denominations. Feature overview for AMD APUs See also * List of AMD CPU microarchitectures#x86 microarchitectures, Family 12h microarchitecture * Comparison of AMD chipsets#Fusion controller hubs (FCH) * List of AMD accelerated processing units#Lynx: "Llano" (2011), List of F ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pin Grid Array
A pin grid array (PGA) is a type of integrated circuit packaging. In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package. The pins are commonly spaced 2.54 mm (0.1") apart, and may or may not cover the entire underside of the package. PGAs are often mounted on printed circuit boards using the through hole method or inserted into a socket. PGAs allow for more pins per integrated circuit than older packages, such as dual in-line package (DIP). PGA variants Plastic Plastic pin grid array (PPGA) packaging was used by Intel for late-model Mendocino core Celeron processors based on Socket 370. Some pre-Socket 8 processors also used a similar form factor, although they were not officially referred to as PPGA. Flip chip A flip-chip pin grid array (FC-PGA or FCPGA) is a form of pin grid array in which the die faces downwards on the top of the substrate with the back of the die exposed. This allows ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Zero Insertion Force
Zero insertion force (ZIF) is a type of IC socket or electrical connector that requires very little (but not literally zero) force for insertion. With a ZIF socket, before the IC is inserted, a lever or slider on the side of the socket is moved, pushing all the sprung contacts apart so that the IC can be inserted with very little force - generally the weight of the IC itself is sufficient and no external downward force is required. The lever is then moved back, allowing the contacts to close and grip the pins of the IC. ZIF sockets are much more expensive than standard IC sockets and also tend to take up a larger board area due to the space taken up by the lever mechanism. Typically, they are only used when there is a good reason to do so. Design A normal integrated circuit (IC) socket requires the IC to be pushed into sprung contacts which then grip by friction. For an IC with hundreds of pins, the total insertion force can be very large (hundreds of newtons), leading ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
UMI AMD
The UMI (Unified Media Interface) interconnect is the link between an AMD Accelerated Processing Unit (APU) and the FCH (Fusion Controller Hub).. It is similar to Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...'s DMI. The Fusion Controller Hub is similar to the Southbridge of earlier chipsets. References AMD technologies Computer buses {{computer-stub ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Unified Media Interface
The UMI (Unified Media Interface) interconnect is the link between an AMD Accelerated Processing Unit (APU) and the FCH (Fusion Controller Hub).. It is similar to Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...'s DMI. The Fusion Controller Hub is similar to the Southbridge of earlier chipsets. References AMD technologies Computer buses {{computer-stub ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Socket FM2
Socket FM2 is a CPU socket used by AMD's desktop ''Trinity'' and ''Richland'' APUs to connect to the motherboard as well as Athlon X2 and Athlon X4 processors based on them. FM2 was launched on September 27, 2012. Motherboards which feature the at the time new FM2 CPU socket also utilize AMD's at the time new A85X chipset. The socket is very similar to FM1, based on a 31×31 grid of pins with a 5×7 central void, 3 pins missing from each corner, and a few additional key pins missing. Compared to Socket FM1, two key pins were moved, and one more is removed, leaving 904 pins. For available chipsets consult Fusion controller hubs (FCH). Steamroller-based "Kaveri" APUs are ''not'' supported, see Socket FM2+ (FM2r2) and Socket FP3 (BGA-???). Heatsink The 4 holes for fastening the heatsink to the motherboard are placed in a rectangle with lateral lengths of 48 mm and 96 mm for AMD's sockets Socket AM2, Socket AM2+, Socket AM3, Socket AM3+ AM3+ is a modifica ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Llano
''Llano'' is the Spanish word for plain. It may refer to: * Llano, California * Llano Estacado, a region in northwest Texas and eastern New Mexico * Llano, Texas, a small city in Llano County, Texas * Llano County, Texas * Llano River, a Texas river * Llano Uplift, a geologic dome exposing Precambrian rocks in Central Texas. * Gonzalo Queipo de Llano, a Spanish army-officer serving during the Spanish Civil War * The Llanos, a plain in north-western South America ** ''Llanero'', a person from the Llanos * The Llano, a magical song from Piers Anthony's ''Incarnations of Immortality'' series * The codename for the first AMD Accelerated Processing Unit microprocessor See also * ''Llanito'', the local language of Gibraltar. * Llanite, a variety of rhyolite Rhyolite ( ) is the most silica-rich of volcanic rocks. It is generally glassy or fine-grained (aphanitic) in texture, but may be porphyritic, containing larger mineral crystals (phenocrysts) in an otherwise fine-grained ground ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Socket
In computer hardware, a CPU socket or CPU slot contains one or more mechanical components providing mechanical and electrical connections between a microprocessor and a printed circuit board (PCB). This allows for placing and replacing the central processing unit (CPU) without soldering. Common sockets have retention clips that apply a constant force, which must be overcome when a device is inserted. For chips with many pins, zero insertion force (ZIF) sockets are preferred. Common sockets include Pin Grid Array (PGA) or Land Grid Array (LGA). These designs apply a compression force once either a handle (PGA type) or a surface plate (LGA type) is put into place. This provides superior mechanical retention while avoiding the risk of bending pins when inserting the chip into the socket. Certain devices use Ball Grid Array (BGA) sockets, although these require soldering and are generally not considered user replaceable. CPU sockets are used on the motherboard in desktop and serv ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Athlon II
Athlon II is a family of AMD multi-core 45 nm central processing units, which is aimed at the budget to mid-range market and is a complementary product lineup to the Phenom II. Features The Athlon II series is based on the AMD K10 architecture and derived from the Phenom II series. However, unlike its Phenom siblings, it does not contain any L3 Cache. There are two principal Athlon II dies: the dual-core Regor die with 1 MB L2 Cache per core and the four-core Propus with 512 KB per core. Regor is a native dual-core design with lower TDP and additional L2 to offset the removal of L3 cache. The Athlon II x2 200e-220 chips have less L2 cache than the rest of the Regor line. The triple-core ''Rana'' is derived from the Propus quad-core design, with one core disabled. In some cases, the Phenom II Deneb die is used with disabled L3 cache and cores in the case. Includes: AMD Direct Connect Architecture AMD Wide Floating Point Accelerator AMD Digital Media XPress 2.0 Technolog ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Socket FM2+
Socket FM2+ (FM2b, FM2r2) is a zero insertion force CPU socket designed by AMD for their desktop "Kaveri" APUs (Steamroller-based) and Godavari APUs (Steamroller-based) to connect to the motherboard. The FM2+ has a slightly different pin configuration to Socket FM2 with two additional pin sockets. Socket FM2+ APUs are not compatible with Socket FM2 motherboards due to the aforementioned additional pins. However, socket FM2 APUs such as "Richland" and "Trinity" are compatible with the FM2+ socket. * ECC DIMMs are supported on Socket FP3 but ''not'' supported on the Socket FM2+ package. * There are 3 PCI Express cores: one 2 ×16 core and two 5 ×8 cores. There are 8 configurable ports, which can be divided into 2 groups: ** Gfx-group: contains 2 ×8 ports. Each port can be limited to lower link widths for applications that require fewer lanes. Additionally, the two ports can be combined to create a single ×16 link. ** GPP-group: contains 1 ×4 UMI and 5 General Purpose Ports (GPP ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Socket AM1
Socket FS1b (rebranded as Socket AM1 ) is a socket designed by AMD, launched in April 2014 for desktop SoCs in the value segment. Socket AM1 is intended for a class of CPUs that contain both an integrated GPU and a chipset, essentially forming a complete SoC implementation, and as such has pins for display, PCI Express, SATA, and other I/O interfaces directly in the socket. AMD's first compatible CPUs, designated as APUs, are 4 socketable chips in the ''Kabini'' family of the Jaguar microarchitecture, marketed under the Athlon and Sempron names and announced on April 9, 2014. The brand names are Athlon and Sempron. The underlying microarchitectures are Jaguar and Puma. All products are SoCs, this means the Chipset is on the die of the APU and not on the motherboard. While the AMD mobile CPUs are available in a 722-pin package Socket FS1, it is not clear whether these notebook CPUs are compatible with Socket AM1 or vice versa. Its mobile counterpart is Socket FT3 (BGA-769). ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
List Of AMD Chipsets
This is an overview of chipsets sold under the AMD brand, manufactured before May 2004 by the company itself, before the adoption of open platform approach as well as chipsets manufactured by ATI Technologies after October 2006 as the completion of the ATI acquisition. North- and Southbridges Northbridges AMD-xxx A-Link Express II A-Link Express and A-Link Express II are essentially PCIe 1.1 x4 lanes. See Comparison of ATI Chipsets for the comparison of chipsets sold under the ATI brand for AMD processors, before AMD's acquisition of ATI. A-Link Express III A-Link Express III is essentially PCIe 2.0 x4 lanes. Southbridges AMD-xxx 1 Parallel ATA, also known as Enhanced IDE supports up to 2 devices per channel. A-Link Express * All models support eSATA implementations of available SATA channels. 1 Parallel ATA, also known as Enhanced IDE supports up to 2 devices per channel. Fusion controller hubs (FCH) For AMD APU models from 2011 until 2016. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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