SM4 (cipher)
ShāngMì 4 (SM4, 商密4) (formerly SMS4) is a block cipher, standardised for commercial cryptography in China. It is used in the Chinese National Standard for Wireless LAN WAPI (WLAN Authentication and Privacy Infrastructure), and with Transport Layer Security. SM4 was a cipher proposed for the IEEE 802.11i standard, but it has so far been rejected. One of the reasons for the rejection has been opposition to the WAPI fast-track proposal by the IEEE. SM4 was published as in 2021. The SM4 algorithm was drafted by Data Assurance & Communication Security Center, Chinese Academy of Sciences (CAS), and Commercial Cryptography Testing Center, National Cryptography Administration. It is mainly developed by Lü Shuwang ( zh, 吕述望). The algorithm was declassified in January, 2006, and it became a national standard (GB/T 32907-2016) in August 2016.Lu Shuwang. Journal of Information Security Research, 2016, 2(11): 995-1007. Cipher detail The SM4 cipher has a key size and a blo ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Chinese Academy Of Sciences
The Chinese Academy of Sciences (CAS; ) is the national academy for natural sciences and the highest consultancy for science and technology of the People's Republic of China. It is the world's largest research organization, with 106 research institutes, 2 universities, 71,300 full-time employees, and 79 thousand graduate students. The Chinese Academy of Sciences has historical origins in the Academia Sinica during the Republic of China (1912–49), Republican era and was formerly also known by that name until the 1980s. The academy functions as the national scientific think tank and academic governing body, providing advisory and appraisal services on issues stemming from the national economy, Social change, social development, and science and technology progress. It is headquartered in Beijing, with affiliate institutes throughout China. It has also created hundreds of commercial enterprises, Lenovo being one of the most famous. The academy also runs the University of Scienc ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Multiplicative Inverse
In mathematics, a multiplicative inverse or reciprocal for a number ''x'', denoted by 1/''x'' or ''x''−1, is a number which when Multiplication, multiplied by ''x'' yields the multiplicative identity, 1. The multiplicative inverse of a rational number, fraction ''a''/''b'' is ''b''/''a''. For the multiplicative inverse of a real number, divide 1 by the number. For example, the reciprocal of 5 is one fifth (1/5 or 0.2), and the reciprocal of 0.25 is 1 divided by 0.25, or 4. The reciprocal function, the Function (mathematics), function ''f''(''x'') that maps ''x'' to 1/''x'', is one of the simplest examples of a function which is its own inverse (an Involution (mathematics), involution). Multiplying by a number is the same as Division (mathematics), dividing by its reciprocal and vice versa. For example, multiplication by 4/5 (or 0.8) will give the same result as division by 5/4 (or 1.25). Therefore, multiplication by a number followed by multiplication by its reciprocal yie ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Lunar Lake
Lunar Lake is the codename for Core Ultra 200V Series mobile processors designed by Intel, released in September 2024. It is a successor to Meteor Lake which saw Intel move from monolithic silicon to a disaggregated MCM design. Background On May 24, 2024, details on the Lunar Lake architecture were unveiled during Intel's Computex presentation in Taiwan. SKU names of Lunar Lake processors or details such as clock speeds were not announced. Architecture Lunar Lake is an ultra-low power mobile SoC design. It is a successor to 15 W Meteor Lake-U processors while Arrow Lake replaces the midrange 28 W Meteor Lake-H processors. Lunar Lake's focus on increased power efficiency targets premium ultra-thin laptops and compact mobile designs. Intel said that with Lunar Lake, it aimed to "bust the myth that x86">x86.html" ;"title="/nowiki>x86">/nowiki>x86/nowiki> can't be as efficient" as ARM architecture family">ARM. Analysis of tests performed on Lunar Lake CPUs availab ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Arrow Lake (microprocessor)
Arrow Lake is the codename for Core Ultra Series 2 processors designed by Intel, released on October 24, 2024. It follows on from Meteor Lake which saw Intel move from monolithic silicon to a disaggregated MCM design. Meteor Lake was limited to a mobile release while Arrow Lake includes both socketable desktop processors and mainstream and enthusiast mobile processors. Core Ultra 200H and 200HX series mobile processors will follow in early 2025. Arrow Lake desktop CPUs integrated Thunderbolt 4 and USB4 support in the CPU, which allowed it to not be limited by PCIe 3.0 speeds and use simple re-timers instead. The chipset has the same maximum five integrated USB 3.2 2x2, and is Thunderbolt 5 ready if a discrete board is used. The integrated GPU added HDMI 2.1 FRL 48 Gbit/s (also in Meteor Lake) and variable refresh rate (VRR) support. CU-DIMM DDR5 memory support was added and is needed for optimal performance. Background The first official mention of Arrow Lake came on February ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
RISC-V Architecture
RISC-V (pronounced "risk-five") is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. The project commenced in 2010 at the University of California, Berkeley. It transferred to the RISC-V Foundation in 2015, and from there to RISC-V International, a Swiss non-profit entity, in November 2019. Similar to several other RISC ISAs, e.g. Amber (ARMv2)(2001), J-Core(2015), OpenRISC(2000), or OpenSPARC(2005), RISC-V is offered under royalty-free open-source licenses. The documents defining the RISC-V instruction set architecture (ISA) are offered under a Creative Commons license or a BSD License. Mainline support for RISC-V was added to the Linux 5.17 kernel in 2022, along with its toolchain. In July 2023, RISC-V, in its 64-bit variant called riscv64, was included as an official architecture of Linux distribution Debian, in its unstable version. The goal of this project was "to have Debian ready to install and r ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
ARMv8
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of RISC instruction set architectures (ISAs) for computer processors. Arm Holdings develops the ISAs and licenses them to other companies, who build the physical devices that use the instruction set. It also designs and licenses cores that implement these ISAs. Due to their low costs, low power consumption, and low heat generation, ARM processors are useful for light, portable, battery-powered devices, including smartphones, laptops, and tablet computers, as well as embedded systems. However, ARM processors are also used for desktops and servers, including Fugaku, the world's fastest supercomputer from 2020 to 2022. With over 230 billion ARM chips produced, , ARM is the most widely used family of instruction set architectures. There have been several generations of the ARM design. The original ARM1 used a 32-bit internal structure but had ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
ANSI C
ANSI C, ISO C, and Standard C are successive standards for the C programming language published by the American National Standards Institute (ANSI) and ISO/IEC JTC 1/SC 22/WG 14 of the International Organization for Standardization (ISO) and the International Electrotechnical Commission (IEC). Historically, the names referred specifically to the original and best-supported version of the standard (known as C89 or C90). Software developers writing in C are encouraged to conform to the standards, as doing so helps portability between compilers. History and outlook The first standard for C was published by ANSI. Although this document was subsequently adopted by ISO/IEC and subsequent revisions published by ISO/IEC have been adopted by ANSI, "ANSI C" is still used to refer to the standard. While some software developers use the term ISO C, others are standards-body neutral and use Standard C. Informal specification: K&R C (''C78'') Informal specification in 1978 (Brian Kernig ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Reference Implementation
In the software development process, a reference implementation (or, less frequently, sample implementation or model implementation) is a program that implements all requirements from a corresponding specification. The reference implementation often accompanies a technical standard, and demonstrates what should be considered the "correct" behavior of any other implementation of it. Characteristics and examples Reference implementations of algorithms, for instance cryptographic algorithms, are often the result or the input of standardization processes. In this function they are often dedicated to the public domain with their source code as public domain software. Examples are the first CERN's httpd, Serpent cipher, base64 variants, and SHA-3. The Openwall Project maintains a list of several algorithms with their reference source code In computing, source code, or simply code or source, is a plain text computer program written in a programming language. A programmer ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Internet Draft
An Internet Draft (I-D) is a document published by the Internet Engineering Task Force (IETF) containing preliminary technical specifications, results of networking-related research, or other technical information. Often, Internet Drafts are intended to be work-in-progress documents for work that is eventually to be published as a Request for Comments (RFC) and potentially leading to an Internet Standard. It is considered inappropriate to rely on Internet Drafts for reference purposes. I-D citations should indicate the I-D is a ''work in progress''. An Internet Draft is expected to adhere to the basic requirements imposed on any RFC. An Internet Draft is only valid for six months unless it is replaced by an updated version. An otherwise expired draft remains valid while it is under official review by the Internet Engineering Steering Group The Internet Engineering Task Force (IETF) is a standards organization for the Internet and is responsible for the technical sta ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Rijndael S-box
The Rijndael S-box is a substitution box (lookup table) used in the Rijndael cipher, on which the Advanced Encryption Standard (AES) cryptographic algorithm is based. Forward S-box The S-box maps an 8-bit input, , to an 8-bit output, . Both the input and output are interpreted as polynomials over GF(2). First, the input is mapped to its multiplicative inverse in , Rijndael's finite field. Zero, as the identity, is mapped to itself. This transformation is known as the ''Nyberg S-box'' after its inventor Kaisa Nyberg. The multiplicative inverse is then transformed using the following affine transformation: : \begins_0\\s_1\\s_2\\s_3\\s_4\\s_5\\s_6\\s_7\end = \begin 1 & 0 & 0 & 0 & 1 & 1 & 1 & 1 \\ 1 & 1 & 0 & 0 & 0 & 1 & 1 & 1 \\ 1 & 1 & 1 & 0 & 0 & 0 & 1 & 1 \\ 1 & 1 & 1 & 1 & 0 & 0 & 0 & 1 \\ 1 & 1 & 1 & 1 & 1 & 0 & 0 & 0 \\ 0 & 1 & 1 & 1 & 1 & 1 & 0 & 0 \\ 0 & 0 & 1 & 1 & 1 & 1 & 1 & 0 \\ 0 & 0 & 0 & 1 & 1 & 1 & 1 & 1 \end\begin b_0 ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Affine Space
In mathematics, an affine space is a geometric structure that generalizes some of the properties of Euclidean spaces in such a way that these are independent of the concepts of distance and measure of angles, keeping only the properties related to parallelism and ratio of lengths for parallel line segments. Affine space is the setting for affine geometry. As in Euclidean space, the fundamental objects in an affine space are called '' points'', which can be thought of as locations in the space without any size or shape: zero-dimensional. Through any pair of points an infinite straight line can be drawn, a one-dimensional set of points; through any three points that are not collinear, a two-dimensional plane can be drawn; and, in general, through points in general position, a -dimensional flat or affine subspace can be drawn. Affine space is characterized by a notion of pairs of parallel lines that lie within the same plane but never meet each-other (non-parallel lines wi ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
|
Finite Field
In mathematics, a finite field or Galois field (so-named in honor of Évariste Galois) is a field (mathematics), field that contains a finite number of Element (mathematics), elements. As with any field, a finite field is a Set (mathematics), set on which the operations of multiplication, addition, subtraction and division are defined and satisfy certain basic rules. The most common examples of finite fields are the integers mod n, integers mod p when p is a prime number. The ''order'' of a finite field is its number of elements, which is either a prime number or a prime power. For every prime number p and every positive integer k there are fields of order p^k. All finite fields of a given order are isomorphism, isomorphic. Finite fields are fundamental in a number of areas of mathematics and computer science, including number theory, algebraic geometry, Galois theory, finite geometry, cryptography and coding theory. Properties A finite field is a finite set that is a fiel ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |