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Motorola CPU32
The Freescale 683xx (formerly Motorola 683xx) is a family of compatible microcontrollers by Freescale that use a Motorola 68000-based CPU core. The family was designed using a hardware description language, making the parts synthesizable, and amenable to improved fabrication processes, such as die shrinks. There are two CPU cores used in the 683xx family: the 68EC000 and the CPU32. The instruction set of the CPU32 core is similar to the 68020 without bitfield instructions, and with a few instructions unique to the CPU32 core, such as table lookup and interpolate instructions, and a low-power stop mode. The modules of the microcontroller were designed independently and released as new CPUs could be tested. This process let the architects perform "design-ahead" so that when silicon technologies were available, Motorola had designs ready to implement and go to market. Many of these submodules have been carried forward into the Coldfire line of processors. The microcontrollers ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Glue Logic
In electronics, glue logic is the custom logic circuitry used to interface a number of off-the-shelf integrated circuits. This is often achieved using common, inexpensive 7400- or 4000-series components. In more complex cases, a programmable logic device like a CPLD or FPGA might be used. The falling price of programmable logic devices, combined with their reduced size and power consumption compared to discrete components, is making them common even for simple systems. In addition, programmable logic can be used to hide the exact function of a circuit, in order to prevent a product from being cloned or counterfeited. The software equivalent of glue logic is called glue code. Usage Typical functions of glue logic may include: * Simple logic functions. * Address decoding circuitry used with older processors like the MOS Technology 6502 or Zilog Z80 to divide up the processor's address space into RAM, ROM and I/O. Newer versions of these processors, such as the WDC 65816 or the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Freescale Semiconductor Microcontrollers
Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embedded and communications markets. It was bought by a private investor group in 2006, and subsequently merged into NXP Semiconductors in 2015. History As of 2003, Motorola Semiconductor Products Sector earned US$5.0 billion in semiconductor sales in 2002 (out of US$27 billion sales for all of Motorola). Motorola announced that their semiconductor division would be divested on October 6, 2003, to create Freescale. Freescale completed its Initial public offering (IPO) on July 16, 2004, at a price of US$13. In its announcement, it estimated the stock price to be US$17.50- 19.50 but following a cooling of the market towards tech stocks, it lowered its price to US$13. Existing shareholders of Motorola stock received 0.110415 shares of Freescale ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
UART
A universal asynchronous receiver-transmitter (UART ) is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least significant to the most significant, framed by start and stop bits so that precise timing is handled by the communication channel. The electric signaling levels are handled by a driver circuit external to the UART. Two common signal levels are RS-232, a 12-volt system, and RS-485, a 5-volt system. Early teletypewriters used current loops. It was one of the earliest computer communication devices, used to attach teletypewriters for an operator console. It was also an early hardware system for the Internet. A UART is usually an individual (or part of an) integrated circuit (IC) used for serial communications over a computer or peripheral device serial port. One or more UART peripherals are commonly integrated in microcontroller chips. Specialised UA ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
RS-232
In telecommunications, RS-232 or Recommended Standard 232 is a standard originally introduced in 1960 for serial communication transmission of data. It formally defines signals connecting between a ''DTE'' (''data terminal equipment'') such as a computer terminal, and a ''DCE'' (''data circuit-terminating equipment'' or ''data communication equipment''), such as a modem. The standard defines the electrical characteristics and timing of signals, the meaning of signals, and the physical size and pinout of connectors. The current version of the standard is ''TIA-232-F Interface Between Data Terminal Equipment and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange'', issued in 1997. The RS-232 standard had been commonly used in computer serial ports and is still widely used in industrial communication devices. A serial port complying with the RS-232 standard was once a standard feature of many types of computers. Personal computers used them for connection ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Serial Peripheral Interface
The Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification used for short-distance communication, primarily in embedded systems. The interface was developed by Motorola in the mid-1980s and has become a ''de facto'' standard. Typical applications include Secure Digital cards and liquid crystal displays. SPI devices communicate in full duplex mode using a master-slave architecture usually with a single master (though some Atmel and Silabs devices support changing roles on the fly depending on an external (SS) pin). The master (controller) device originates the frame for reading and writing. Multiple slave-devices may be supported through selection with individual chip select (CS), sometimes called slave select (SS) lines. Sometimes SPI is called a ''four-wire'' serial bus, contrasting with three-, two-, and one-wire serial buses. The SPI may be accurately described as a synchronous serial interface, but it is different from the Sync ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
HDLC
High-Level Data Link Control (HDLC) is a bit-oriented code-transparent synchronous data link layer protocol developed by the International Organization for Standardization (ISO). The standard for HDLC is ISO/IEC 13239:2002. HDLC provides both connection-oriented and connectionless service. HDLC can be used for point-to-multipoint connections via the original master-slave modes Normal Response Mode (NRM) and Asynchronous Response Mode (ARM), but they are now rarely used; it is now used almost exclusively to connect one device to another, using ''Asynchronous Balanced Mode'' (ABM). History HDLC is based on IBM's SDLC protocol, which is the layer 2 protocol for IBM's Systems Network Architecture (SNA). It was extended and standardized by the ITU as LAP (Link Access Procedure), while ANSI named their essentially identical version ADCCP. The HDLC specification does not specify the full semantics of the frame fields. This allows other fully compliant standards to be derived fr ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Ethernet
Ethernet () is a family of wired computer networking technologies commonly used in local area networks (LAN), metropolitan area networks (MAN) and wide area networks (WAN). It was commercially introduced in 1980 and first standardized in 1983 as IEEE 802.3. Ethernet has since been refined to support higher bit rates, a greater number of nodes, and longer link distances, but retains much backward compatibility. Over time, Ethernet has largely replaced competing wired LAN technologies such as Token Ring, FDDI and ARCNET. The original 10BASE5 Ethernet uses coaxial cable as a shared medium, while the newer Ethernet variants use twisted pair and fiber optic links in conjunction with switches. Over the course of its history, Ethernet data transfer rates have been increased from the original to the latest , with rates up to under development. The Ethernet standards include several wiring and signaling variants of the OSI physical layer. Systems communicating over Ethernet ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Communication Processor Module
Communications Processor Module (CPM) is a component of Motorola 68000 family ( QUICC) or Motorola/Freescale Semiconductor PowerPC/Power ISA (PowerQUICC) microprocessors designed to provide features related to imaging and communications. A microprocessor can delegate most of the input/output processing (for example sending and receiving data via the serial interface) to the Communications Processor Module and the microprocessor does not have to perform those functions itself. Some input/output functions require quick response from the processor, for example due to precise timing requirements during data transmission. With CPM performing those operations, the main microprocessor is free to perform other tasks. The CPM features its own RISC microcontroller (Communication Processor), separate from the actual Central Processing Unit IP core. The RISC microcontroller communicates with the core using dual-ported RAM, special command, configuration and event registers as well as via inte ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Network Interface Processor
A network processor is an integrated circuit which has a feature set specifically targeted at the networking application domain. Network processors are typically software programmable devices and would have generic characteristics similar to general purpose central processing units that are commonly used in many different types of equipment and products. History of development In modern telecommunications networks, information (voice, video, data) is transferred as packet data (termed packet switching) which is in contrast to older telecommunications networks that carried information as analog signals such as in the public switched telephone network (PSTN) or analog TV/Radio networks. The processing of these packets has resulted in the creation of integrated circuits (IC) that are optimised to deal with this form of packet data. Network processors have specific features or architectures that are provided to enhance and optimise packet processing within these networks. Network pr ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pulse-width Modulation
Pulse-width modulation (PWM), or pulse-duration modulation (PDM), is a method of reducing the average power delivered by an electrical signal, by effectively chopping it up into discrete parts. The average value of voltage (and current) fed to the load is controlled by turning the switch between supply and load on and off at a fast rate. The longer the switch is on compared to the off periods, the higher the total power supplied to the load. Along with maximum power point tracking (MPPT), it is one of the primary methods of reducing the output of solar panels to that which can be utilized by a battery. PWM is particularly suited for running inertial loads such as motors, which are not as easily affected by this discrete switching, because their inertia causes them to react slowly. The PWM switching frequency has to be high enough not to affect the load, which is to say that the resultant waveform perceived by the load must be as smooth as possible. The rate (or frequency) a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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