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Asus Tinker Board
The ASUS Tinker Board is a single-board computer launched by ASUS in early 2017. Its physical size and GPIO pinout are designed to be compatible with the second and third-generation Raspberry Pi models. The first released board features 4K video, 2GB of onboard RAM, gigabit Ethernet and a Rockchip RK3288 processor running at 1.8 GHz. Specifications History ASUS's intent to release a single-board computer was leaked shortly after CES 2017 on SlideShare SlideShare is an American hosting service, now owned by Scribd, for professional content including presentations, infographics, documents, and videos. Users can upload files privately or publicly in PowerPoint, Word, PDF, or OpenDocument format. .... ASUS originally planned for a late February 2017 release, but a UK vendor broke the embargo and began advertising and selling boards starting on 13 February 2017, before ASUS's marketing department was ready. ASUS subsequently pulled the release; the Amazon sales page was ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Armbian
Armbian is a computing build framework that allows users to create ready-to-use images with working kernels in variable user space configurations for various single board computers (SBCs). It provides various pre-build images for some supported boards. These are usually Debian or Ubuntu flavored. Supported hardware * Banana Pi * Banana Pi M2 * Banana Pi M2+ * Banana Pi Pro * Beelink X2 * Clearfog base * Clearfog pro * Cubieboard * Cubieboard2 * Cubietruck * Outernet Dreamcatcher * Cubox-i * Lemaker Guitar * Libre Computer Project AML-S905X-CC (Le Potato) * Libre Computer Project ALL-H3-CC (Tritium) H2+/H3/H5 * Lamobo R1 * Olimex Lime * Olimex Lime 2 * Olimex Lime A10 * Olimex Lime A33 * Olimex Micro * Xunlong Orange Pi 2 * Xunlong Orange Pi 3 * Xunlong Orange Pi 3 LTS * Xunlong Orange Pi Lite * Xunlong Orange Pi One * Xunlong Orange Pi PC * Xunlong Orange Pi PC+ * Xunlong Orange Pi PC2 * Xunlong Orange Pi R1 * Xunlong Orange Pi Win * Xunlong Orange Pi Zero * Xunlong ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Rockchip RK3288
The Rockchip RK3288 is an ARM architecture System on Chip (SoC) from Rockchip. It is the first SoC, in August 2014, that uses the 32-bit ARM Cortex-A17 processor. It is a quad-core processor with a NEON coprocessor and hardware acceleration for video and 3D graphics. It is used in a number of Chromebooks and other low-power, low-performance devices. Specifications * 28 nm HKMG process. * Quad-core ARM Cortex-A17, up to 1.8 GHz * Quad-core ARM Mali-T760 MP4 GPU clocked at 650 MHz supporting OpenGL ES 1.1/2.0/3.0/3.1, OpenCL 1.1, Renderscript and Direct3D 11.1 * High performance dedicated 2D processor * 1080P video encoding for H.264 and VP8, MVC * 4K H.264 and 10bits H.265 video decode, 1080P multi video decode * Supports 4Kx2K H.265 resolution * Dual-channel 64-bit DRAM controller supporting DDR3, DDR3L, LPDDR2 and LPDDR3 * Up to 3840x2160 display output, HDMI 2.0 * Support dual-channel LVDS/dual-channel MIPI-DSI/eDP1.1 * HW Security system, support HDCP 2.X * Emb ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ARM Cortex-A53
The ARM Cortex-A53 is one of the first two central processing units implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre. The Cortex-A53 is a 2-wide decode superscalar processor, capable of dual-issuing some instructions. It was announced October 30, 2012 and is marketed by ARM as either a stand-alone, more energy-efficient alternative to the more powerful Cortex-A57 microarchitecture, or to be used alongside a more powerful microarchitecture in a big.LITTLE configuration. It is available as an IP core to licensees, like other ARM intellectual property and processor designs. Overview * 8-stage pipelined processor with 2-way superscalar, in-order execution pipeline * DSP and NEON SIMD extensions are mandatory per core * VFPv4 Floating Point Unit onboard (per core) * Hardware virtualization support * TrustZone security extensions * 64-byte cache lines * 10-entry L1 TLB, and 512-entry L2 TLB * 4KiB conditional branch predictor, 25 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
HDMI
High-Definition Multimedia Interface (HDMI) is a proprietary audio/video interface for transmitting uncompressed video data and compressed or uncompressed digital audio data from an HDMI-compliant source device, such as a display controller, to a compatible computer monitor, video projector, digital television, or digital audio device. HDMI is a digital replacement for analog video standards. HDMI implements the EIA/CEA-861 standards, which define video formats and waveforms, transport of compressed and uncompressed LPCM audio, auxiliary data, and implementations of the VESA EDID. CEA-861 signals carried by HDMI are electrically compatible with the CEA-861 signals used by the Digital Visual Interface (DVI). No signal conversion is necessary, nor is there a loss of video quality when a DVI-to-HDMI adapter is used. The Consumer Electronics Control (CEC) capability allows HDMI devices to control each other when necessary and allows the user to operate multiple devices with on ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
EMMC
The MultiMediaCard, officially abbreviated as MMC, is a memory card standard used for solid-state storage. Unveiled in 1997 by SanDisk and Siemens, MMC is based on a surface-contact low pin-count serial interface using a single memory stack substrate assembly, and is therefore much smaller than earlier systems based on high pin-count parallel interfaces using traditional surface-mount assembly such as CompactFlash. Both products were initially introduced using SanDisk NOR-based flash technology. MMC is about the size of a postage stamp: 32 mm × 24 mm × 1.4 mm. MMC originally used a 1-bit serial interface, but newer versions of the specification allow transfers of 4 or 8 bits at a time. MMC can be used in many devices that can use Secure Digital (SD) cards. Typically, an MMC operates as a storage medium for devices, in a form that can easily be removed for access by a PC via a connected MMC reader. Modern computers, both laptops and desktops, often have SD slo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Secure Digital
Secure Digital, officially abbreviated as SD, is a proprietary format, proprietary non-volatile memory, non-volatile Flash memory, flash memory card format developed by the SD Association, SD Association (SDA) for use in portable devices. The standard was introduced in August 1999 by joint efforts between SanDisk, Panasonic (Matsushita) and Toshiba as an improvement over MultiMediaCard, MultiMediaCards (MMCs), and has become the industry standard. The three companies formed SD-3C, LLC, a company that licenses and enforces intellectual property rights associated with SD memory cards and SD host and ancillary products. The companies also formed the SD Association (SDA), a non-profit organization, in January 2000 to promote and create SD Card standards. SDA today has about 1,000 member companies. The SDA uses several trademarked logos owned and licensed by SD-3C to enforce compliance with its specifications and assure users of compatibility. History 1999–2003: Creation In 1 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
LPDDR
Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory that consumes less power and is targeted for mobile computers and devices such as mobile phones. Older variants are also known as Mobile DDR, and abbreviated as mDDR. Modern LPDDR SDRAM is distinct from DDR SDRAM, with various differences that make the technology more appropriate for the mobile application. LPDDR technology standards are developed independently of DDR standards, with LPDDR4X and even LPDDR5 for example being implemented prior to DDR5 SDRAM and offering far higher data rates than DDR4 SDRAM. Bus width In contrast with standard SDRAM, used in stationary devices and laptops and usually connected over a 64-bit wide memory bus, LPDDR also permits 16- or 32-bit wide channels. The "E" versions mark enhanced versions of the specifications. They formalize overclocking the memory array up to 266 MHz for a 33% performance boost. Memory modules impleme ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Multi-channel Memory Architecture
In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically, this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in IBM System/360 Model 91 and in CDC 6600. Modern high-end desktop and workstation processors such as the AMD Ryzen Threadripper series and the Intel Core i9 Extreme Edition lineup support quad-channel memory. Server processors from the AMD Epyc series and the Intel Xeon platforms give support to memory bandwidth starting from quad-channel module layout to up to octa-channel layout. In March 2010, AMD released Socket G34 and Magny-Cours Opteron 6100 series processors with support for quad-channel memory. In 2006, Intel released chipsets that s ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Neural Processing Unit
An AI accelerator is a class of specialized hardware accelerator or computer system designed to accelerate artificial intelligence and machine learning applications, including artificial neural networks and machine vision. Typical applications include algorithms for robotics, internet of things, and other data-intensive or sensor-driven tasks. They are often manycore designs and generally focus on low-precision arithmetic, novel dataflow architectures or in-memory computing capability. , a typical AI integrated circuit chip contains billions of MOSFET transistors. A number of vendor-specific terms exist for devices in this category, and it is an emerging technology without a dominant design. History Computer systems have frequently complemented the CPU with special-purpose accelerators for specialized tasks, known as coprocessors. Notable application-specific hardware units include video cards for graphics, sound cards, graphics processing units and digital signal processor ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Tensor Processing Unit
Tensor Processing Unit (TPU) is an AI accelerator application-specific integrated circuit (ASIC) developed by Google for Artificial neural network, neural network machine learning, using Google's own TensorFlow software. Google began using TPUs internally in 2015, and in 2018 made them available for third party use, both as part of its cloud infrastructure and by offering a smaller version of the chip for sale. Overview The tensor processing unit was announced in May 2016 at Google I/O, when the company said that the TPU had already been used inside Google Data Centers, their data centers for over a year. The chip has been specifically designed for Google's TensorFlow framework, a symbolic math library which is used for machine learning applications such as neural networks."TensorFlow: Open source machine learning" [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Google
Google LLC () is an American multinational technology company focusing on search engine technology, online advertising, cloud computing, computer software, quantum computing, e-commerce, artificial intelligence, and consumer electronics. It has been referred to as "the most powerful company in the world" and one of the world's most valuable brands due to its market dominance, data collection, and technological advantages in the area of artificial intelligence. Its parent company Alphabet is considered one of the Big Five American information technology companies, alongside Amazon, Apple, Meta, and Microsoft. Google was founded on September 4, 1998, by Larry Page and Sergey Brin while they were PhD students at Stanford University in California. Together they own about 14% of its publicly listed shares and control 56% of its stockholder voting power through super-voting stock. The company went public via an initial public offering (IPO) in 2004. In 2015, Google was reor ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Coprocessor
A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Operations performed by the coprocessor may be floating-point arithmetic, graphics, signal processing, string processing, cryptography or I/O interfacing with peripheral devices. By offloading processor-intensive tasks from the main processor, coprocessors can accelerate system performance. Coprocessors allow a line of computers to be customized, so that customers who do not need the extra performance do not need to pay for it. Functionality Coprocessors vary in their degree of autonomy. Some (such as FPUs) rely on direct control via coprocessor instructions, embedded in the CPU's instruction stream. Others are independent processors in their own right, capable of working asynchronously; they are still not optimized for general-purpose code, or they are incapable of it due to a limited instruction set focused on accelerating specific tasks. It is common for these t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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