P/polyIn computational complexity theory, P/poly is a complexity class that can be defined in both circuit complexity and non-uniform complexity. Since the two definitions are equivalent, this concept bridges the two areas. In the perspective of circuit complexity, P/poly is the class of problems that can be solved by small circuits. More precisely, it is the set of formal languages that have polynomial-size circuit families.
AC (complexity)In circuit complexity, AC is a complexity class hierarchy. Each class, AC, consists of the languages recognized by Boolean circuits with depth O(login){\displaystyle O(\log ^{i}n)} and a polynomial number of unlimited fan-inAND and OR gates. The name "AC" was chosen by analogy to NC, with the "A" in the name standing for "alternating" and referring both to the alternation between the AND and OR gates in the circuits and to alternating Turing machines.
Circuit complexityIn theoretical computer science, circuit complexity is a branch of computational complexity theory in which Boolean functions are classified according to the size or depth of the Boolean circuits that compute them. A related notion is the circuit complexity of a recursive language that is decided by a uniform family of circuits C1,C2,…{\displaystyle C_{1},C_{2},\ldots } (see below).
Unary languageIn computational complexity theory, a unary language or tally language is a formal language (a set of strings) where all strings have the form 1, where "1" can be any fixed symbol. For example, the language {1, 111, 1111} is unary, as is the language {1 | k is prime}. The complexity class of all such languages is sometimes called TALLY. The name "unary" comes from the fact that a unary language is the encoding of a set of natural numbers in the unary numeral system.DLOGTIMEIn computational complexity theory, DLOGTIME is the complexity class of all computational problems solvable in a logarithmic amount of computation time on a deterministic Turing machine. It must be defined on a random-access Turing machine, since otherwise the input tape is longer than the range of cells that can be accessed by the machine.
Complexity classSet of problems in computational complexity theoryA representation of the relationships between several important complexity classesIn computational complexity theory, a complexity class is a set of computational problems "of related resource-based complexity". The two most commonly analyzed resources are time and memory. In general, a complexity class is defined in terms of a type of computational problem, a model of computation, and a bounded resource like time or memory.NC (complexity)In computational complexity theory, the class NC (for Nick's class) is the set of decision problems decidable in polylogarithmic time on a parallel computer with a polynomial number of processors. In other words, a problem with input size n is NC if there exist constants c and k such that it can be solved in time O((log n)c) using O(nk) parallel processors.
Descriptive complexity theoryDescriptive complexity is a branch of computational complexity theory and of finite model theory that characterizes complexity classes by the type of logic needed to express the languages in them. For example, PH, the union of all complexity classes in the polynomial hierarchy, is precisely the class of languages expressible by statements of second-order logic.
OR gateThe OR gate is a digital logic gate that implements logical disjunction. The OR gate outputs "true" if any of its inputs is "true"; otherwise it outputs "false". The input and output states are normally represented by different voltage levels. DescriptionAny OR gate can be constructed with two or more inputs. It outputs a 1 if any of these inputs are 1, or outputs a 0 only if all inputs are 0.
AND gateThe AND gate is a basic digital logic gate that implements the logical conjunction (∧) from mathematical logic – AND gates behave according to their truth table. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1). If any of the inputs to the AND gate are not HIGH, a LOW (0) is outputted. The function can be extended to any number of inputs by multiple gates up in a chain.
Inverter (logic gate)In digital logic, an inverter or NOT gate is a logic gate which implements logical negation. It outputs a bit whose value is opposite of the input bit's value. The bit values are typically represented using two different voltage levels, which may be called 0 and 1, or true and false, or high and low. DescriptionThe NOT gate outputs 0 when given 1, and outputs 1 when given 0. Hence, it inverts its inputs. Colloquially, this inversion of bits is called "flipping" bits.
Fan-inFan-in is the number of inputs a logic gate can handle. For instance the fan-in for the AND gate shown in the figure is 3. Physical logic gates with a large fan-in tend to be slower than those with a small fan-in. This is because the complexity of the input circuitry increases the input capacitance of the device.*As an Amazon Associate I earn from qualifying purchases.