The RHPPC is a

radiation hardened Radiation hardening is the process of making electronic components and circuits resistant to damage or malfunction caused by high levels of ionizing radiation (particle radiation and high-energy electromagnetic radiation), especially for environ ...

processor based on

PowerPC 603e The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened ...

technology licensed from

Motorola Motorola, Inc. () was an American multinational telecommunications company based in Schaumburg, Illinois, United States. After having lost $4.3 billion from 2007 to 2009, the company split into two independent public companies, Motorola ...

(now

Freescale Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embe ...

) and manufactured by

Honeywell Honeywell International Inc. is an American publicly traded, multinational conglomerate corporation headquartered in Charlotte, North Carolina. It primarily operates in four areas of business: aerospace, building technologies, performance ma ...

. The RHPPC is equivalent to the commercial PowerPC 603e processor with the minor exceptions of the

phase locked loop A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. There are several different types; the simplest is an electronic circuit consisting of a ...

(PLL) and the processor version register (PVR). The RHPPC processor is compatible with the

PowerPC PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple– IBM ...

architecture (Book I-III), the PowerPC 603e programmers interface and is also supported by common PowerPC software tools and embedded operating systems, like

VxWorks VxWorks is a real-time operating system (or RTOS) developed as proprietary software by Wind River Systems, a wholly-owned subsidiary of Aptiv. First released in 1987, VxWorks is designed for use in embedded systems requiring real-time, dete ...

Technical details

The RHPPC processor generates 190 MIPS with the

Dhrystone Dhrystone is a synthetic computing benchmark program developed in 1984 by Reinhold P. Weicker intended to be representative of system (integer) programming. The Dhrystone grew to become representative of general processor (CPU) performance. The ...

mix with its core clock at 100 MHz (i.e. the RHPPC processor completes 1.9 instructions per cycle). The RHPPC runs with a 25, 33.3, 40, or 50 MHz 60x bus clock (SYSCLK) which is generated based on the PCI clock. The 60x bus clock is de-skewed on-chip by a PLL and can also be multiplied. The RHPPC processor is a

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

machine with five execution units: system register unit, integer unit, load/store unit,

floating point unit Floating may refer to: * a type of dental work performed on horse teeth * use of an isolation tank * the guitar-playing technique where chords are sustained rather than scratched * ''Floating'' (play), by Hugh Hughes * Floating (psychological ph ...

, and branch processing unit. The dispatch unit can issue two instructions per cycle. The floating point unit has a three level deep pipeline.

Out of order execution In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in most high-performance central processing units to make use of instruction cycles that would otherwise be wasted. In this paradigm, a proces ...

is supported through the use of shadow or rename registers. The completion unit can complete two instructions per cycle in order by copying results from the rename registers to the real registers. Independently, the branch processing unit can complete a branch each cycle. Thus, in theory, the RHPPC processor can complete three instructions per cycle. Within the RHPPC processor there is a 16 kB instruction and a 16 kB data L1 caches that are 4 way set associative, and support write through or copy-back protocol. A cache line is fixed at eight words.

Fabrication process and packaging

The RHPPC processor is fabricated with Honeywell’s

SOI ''Soi'' ( th, ซอย ) is the term used in Thailand for a side-street branching off a major street (''thanon'', th, ถนน). An alley is called a ''trok'' ( th, ตรอก). Overview Sois are usually numbered, and are referred to by th ...

-V 0.35 µm, four level metal process. Standard cells and custom drop-ins are used. It is packaged in a hermetic, aluminium oxide, 21 x 21 mm grid array package with 255 (16 x 16) leads. The leads are on 1.27 mm centers. The lead can have either solder balls, solder columns, or short pins attached. Standard die attach and wire bond die interconnect are used.

References

# # {{cite conference , first=J.P. , last=Lintz , title= Single event effects hardening and characterization of Honeywell's RHPPC integrated circuit, book-title=2003 IEEE Radiation Effects Data Workshop Record , pages=156–164 , publisher=IEEE , date=July 21–25, 2003 , location=Monterey, CA PowerPC microprocessors Avionics computers Radiation-hardened microprocessors