The back end of line (BEOL) is the second portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) get

interconnect In telecommunications, interconnection is the physical linking of a carrier's network with equipment or facilities not belonging to that network. The term may refer to a connection between a carrier's facilities and the equipment belonging to ...

ed with wiring on the wafer, the metalization layer. Common metals are

copper Copper is a chemical element with the symbol Cu (from la, cuprum) and atomic number 29. It is a soft, malleable, and ductile metal with very high thermal and electrical conductivity. A freshly exposed surface of pure copper has a pinkish ...

and

aluminum Aluminium (aluminum in American and Canadian English) is a chemical element with the symbol Al and atomic number 13. Aluminium has a density lower than those of other common metals, at approximately one third that of steel. It h ...

. BEOL generally begins when the first layer of metal is deposited on the wafer. BEOL includes contacts, insulating layers (

dielectric In electromagnetism, a dielectric (or dielectric medium) is an electrical insulator that can be polarised by an applied electric field. When a dielectric material is placed in an electric field, electric charges do not flow through the m ...

s), metal levels, and bonding sites for chip-to-package connections. After the last

FEOL The front-end-of-line (FEOL) is the first portion of IC fabrication where the individual components (transistors, capacitors, resistors, etc.) are patterned in the semiconductor. FEOL generally covers everything up to (but not including) the ...

step, there is a

wafer A wafer is a crisp, often sweet, very thin, flat, light and dry biscuit, often used to decorate ice cream, and also used as a garnish on some sweet dishes. Wafers can also be made into cookies with cream flavoring sandwiched between them. They ...

with isolated transistors (without any wires). In BEOL part of fabrication stage contacts (pads), interconnect wires, vias and dielectric structures are formed. For modern IC process, more than 10 metal layers can be added in the BEOL. Steps of the BEOL: # Silicidation of source and drain regions and the

polysilicon Polycrystalline silicon, or multicrystalline silicon, also called polysilicon, poly-Si, or mc-Si, is a high purity, polycrystalline form of silicon, used as a raw material by the solar photovoltaic and electronics industry. Polysilicon is produce ...

region. # Adding a dielectric (first, lower layer is pre-metal dielectric (PMD) – to isolate metal from silicon and polysilicon), CMP processing it # Make holes in PMD, make a contacts in them. # Add metal layer 1 # Add a second dielectric, called the inter-metal dielectric (IMD) # Make vias through dielectric to connect lower metal with higher metal. Vias filled by Metal CVD process. #:Repeat steps 4–6 to get all metal layers. # Add final passivation layer to protect the microchip Before 1998, practically all chips used aluminium for the metal interconnection layers. The four metals with the highest electrical conductivity are silver with the highest conductivity, then copper, then gold, then aluminium. After BEOL there is a "back-end process" (also called post-fab), which is done not in the cleanroom, often by a different company. It includes wafer test,

wafer backgrinding Wafer backgrinding is a semiconductor device fabrication step during which wafer thickness is reduced to allow stacking and high-density packaging of integrated circuits (IC). ICs are produced on semiconductor wafers that undergo a multitude of ...

, die separation, die tests,

IC packaging In electronics manufacturing, integrated circuit packaging is the final stage of semiconductor device fabrication, in which the block of semiconductor material is encapsulated in a supporting case that prevents physical damage and corrosion. ...

and final test.

See also

References

Further reading