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S1 Core
S1 Core (codename Sirocco) is an open source hardware microprocessor design developed by Simply RISC. Based on Sun Microsystems' UltraSPARC T1, the S1 Core is licensed under the GNU General Public License, which is the license Sun chose for the OpenSPARC project. The main goal of the project is to keep the S1 Core as simple as possible to encourage developers. The major differences between T1 and S1 include: * S1 Core only has one 64-bit SPARC Core (supporting one to four independent threads of execution) instead of eight cores; * S1 Core adds a Wishbone bridge, a reset controller and a basic interrupt controller; * the S1 Core environment can be run using only free tools on a common x86 Linux machine. See also *LEON *OpenRISC OpenRISC is a project to develop a series of open-source hardware based central processing units (CPUs) on established reduced instruction set computer (RISC) principles. It includes an instruction set architecture (ISA) using an open-source lic ... ...
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Open Source Hardware
Open-source hardware (OSH, OSHW) consists of physical artifacts of technology designed and offered by the open-design movement. Both free and open-source software (FOSS) and open-source hardware are created by this open-source culture movement and apply a like concept to a variety of components. It is sometimes, thus, referred to as free and open-source hardware (FOSH), meaning that the design is easily available ("open") and that it can be used, modified and shared freely ("free"). The term usually means that information about the hardware is easily discerned so that others can make it – coupling it closely to the maker movement. Hardware design (i.e. mechanical drawings, schematics, bills of material, PCB layout data, HDL source code and integrated circuit layout data), in addition to the software that drives the hardware, are all released under free/ libre terms. The original sharer gains feedback and potentially improvements on the design from the FOSH community. Th ...
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Microprocessor
A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, and control circuitry required to perform the functions of a computer's central processing unit (CPU). The IC is capable of interpreting and executing program instructions and performing arithmetic operations. The microprocessor is a multipurpose, Clock signal, clock-driven, Processor register, register-based, digital integrated circuit that accepts binary code, binary data as input, processes it according to instruction (computing), instructions stored in its computer memory, memory, and provides results (also in binary form) as output. Microprocessors contain both combinational logic and sequential logic, sequential digital logic, and operate on numbers and symbols represented in the binary number system. The integration of a whole CPU on ...
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Sun Microsystems
Sun Microsystems, Inc., often known as Sun for short, was an American technology company that existed from 1982 to 2010 which developed and sold computers, computer components, software, and information technology services. Sun contributed significantly to the evolution of several key computing technologies, among them Unix, Reduced instruction set computer, RISC processors, thin client computing, and virtualization, virtualized computing. At its height, the Sun headquarters were in Santa Clara, California (part of Silicon Valley), on the former west campus of the Agnews Developmental Center. Sun products included computer servers and workstations built on its own Reduced instruction set computer, RISC-based SPARC processor architecture, as well as on x86-based AMD Opteron and Intel Xeon processors. Sun also developed its own computer storage, storage systems and a suite of software products, including the Unix-based SunOS and later Solaris operating system, Solaris operating s ...
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UltraSPARC T1
The UltraSPARC T1 (codenamed "Niagara") is a Multithreading (computer architecture), multithreading, Multi-core processor, multicore central processing unit, CPU released by Sun Microsystems in 2005. Designed to lower the energy consumption of server (computing)#Hardware, server computers, the CPU typically uses 72 watt, W of power at 1.4 GHz. The T1 is a new-from-the-ground-up SPARC microprocessor implementation that conforms to the UltraSPARC Architecture 2005 specification and executes the full SPARC V9 instruction set. Sun has produced two previous multicore processors (UltraSPARC IV and IV+), but UltraSPARC T1 was its first microprocessor that is both multicore ''and'' multithreaded. Security was built-in from the very first release on silicon, with hardware cryptographic units in the T1, unlike general purpose processor from competing vendors of the time. The processor is available with four, six or eight CPU cores, each core able to handle four thread (computing), thr ...
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GNU General Public License
The GNU General Public Licenses (GNU GPL or simply GPL) are a series of widely used free software licenses, or ''copyleft'' licenses, that guarantee end users the freedom to run, study, share, or modify the software. The GPL was the first copyleft license available for general use. It was originally written by Richard Stallman, the founder of the Free Software Foundation (FSF), for the GNU Project. The license grants the recipients of a computer program the rights of the Free Software Definition. The licenses in the GPL series are all copyleft licenses, which means that any derivative work must be distributed under the same or equivalent license terms. The GPL is more restrictive than the GNU Lesser General Public License, and even more distinct from the more widely used permissive software licenses such as BSD, MIT, and Apache. Historically, the GPL license family has been one of the most popular software licenses in the free and open-source software (FOSS) domai ...
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OpenSPARC
OpenSPARC is an open-source hardware project, started in December 2005, for CPUs implementing the SPARC instruction architecture. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32- thread microprocessor, the UltraSPARC T1 processor. On March 21, 2006, Sun released the source code to the T1 IP core under the GNU General Public License v2. The full OpenSPARC T1 system consists of 8 cores, each one capable of executing four threads concurrently, for a total of 32 threads. Each core executes instruction in order and its logic is split among 6 pipeline stages. On December 11, 2007, Sun also made the UltraSPARC T2 processor's RTL available via the OpenSPARC project. It was also released under the GNU General public license v2. OpenSPARC T2 is 8 cores, 16 pipelines with 64 threads. See also * Amber (processor core) – ARM-Compatible OpenCores Project * J Core – SuperH-Compatible OpenCores Project *LEON *S ...
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Wishbone (computer Bus)
The Wishbone Bus is an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other. The aim is to allow the connection of differing cores to each other inside of a chip. The Wishbone Bus is used by many designs in the OpenCores project. Wishbone is intended as a "logic bus". It does not specify electrical information or the bus topology. Instead, the specification is written in terms of "signals", clock cycles, and high and low levels. This ambiguity is intentional. Wishbone is made to let designers combine several designs written in Verilog, VHDL or some other logic-description language for electronic design automation (EDA). Wishbone provides a standard way for designers to combine these hardware logic designs (called "cores"). Wishbone is defined to have 8, 16, 32, and 64-bit buses. All signals are synchronous to a single clock but some slave responses must be generated combinatorially for maximum performance. Wishbon ...
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Interrupt Controller
In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQs) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQs' relative priorities. Common modes of interrupt priority include hard priorities, rotating priorities, and cascading priorities. PICs often allow mapping input to outputs in a configurable way. On the PC architecture PIC are typically embedded into a southbridge chip whose internal architecture is defined by the chipset vendor's standards. Common features PICs typically have a common set of registers: interrupt request register (IRR), in-service register (ISR), and interrupt mask register (IMR). The IRR specifies which interrupts are pending acknowledgement, and is typically a symbolic regist ...
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LEON
Leon, Léon (French) or León (Spanish) may refer to: Places Europe * León, Spain, capital city of the Province of León * Province of León, Spain * Kingdom of León, an independent state in the Iberian Peninsula from 910 to 1230 and again from 1296 to 1301 * León (historical region), composed of the Spanish provinces León, Salamanca, and Zamora * Viscounty of Léon, a feudal state in France during the 11th to 13th centuries * Saint-Pol-de-Léon, a commune in Brittany, France * Léon, Landes, a commune in Aquitaine, France * Isla de León, a Spanish island * Leon (Souda Bay), an islet in Souda Bay, Chania, on the island of Crete North America * León, Guanajuato, Mexico, a large city * Leon, California, United States, a ghost town * Leon, Iowa, United States * Leon, Kansas, United States * Leon, New York, United States * Leon, Oklahoma, United States * Leon, Virginia, United States * Leon, West Virginia, United States * Leon, Wisconsin (other), United States ...
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OpenRISC
OpenRISC is a project to develop a series of open-source hardware based central processing units (CPUs) on established reduced instruction set computer (RISC) principles. It includes an instruction set architecture (ISA) using an open-source license. It is the original flagship project of the OpenCores community. The first (and only) architectural description is for the OpenRISC 1000 ("OR1k"), describing a family of 32-bit and 64-bit processors with optional floating-point arithmetic and vector processing support. The OpenRISC 1200 implementation of this specification was designed by Damjan Lampret in 2000, written in the Verilog hardware description language (HDL). The later mor1kx implementation, which has some advantages compared to the OR 1200, was designed by Julius Baxter and is also written in Verilog. Software simulators also exist which implement the OR1k specification. The hardware design was released under the GNU Lesser General Public License (LGPL), while the ...
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Open Microprocessors
Open or OPEN may refer to: Music * Open (band), Australian pop/rock band * The Open (band), English indie rock band * ''Open'' (Blues Image album), 1969 * ''Open'' (Gerd Dudek, Buschi Niebergall, and Edward Vesala album), 1979 * ''Open'' (Gotthard album), 1999 * ''Open'' (Cowboy Junkies album), 2001 * ''Open'' (YFriday album), 2001 * ''Open'' (Shaznay Lewis album), 2004 * ''Open'' (Jon Anderson EP), 2011 * ''Open'' (Stick Men album), 2012 * ''Open'' (The Necks album), 2013 * Open (Kwon Eun-bi EP), 2021 * ''Open'', a 1967 album by Julie Driscoll, Brian Auger and the Trinity * ''Open'', a 1979 album by Steve Hillage * "Open" (Queensrÿche song) * "Open" (Mýa song) * "Open", the first song on The Cure album '' Wish'' Literature * ''Open'' (Mexican magazine), a lifestyle Mexican publication * ''Open'' (Indian magazine), an Indian weekly English language magazine featuring current affairs * ''OPEN'' (North Dakota magazine), an out-of-print magazine that was printed i ...
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