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Platform Controller Hub
The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chips - a Northbridge (computing), northbridge and Southbridge (computing), southbridge, and first appeared in the Intel 5 Series. The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCI Express, PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. AMD has its equivalent for the PCH, known simply as a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel 5 Series Architecture
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 series of instruction sets, the instruction sets found in most personal computers (PCs). Delaware General Corporation Law, Incorporated in Delaware, Intel ranked No. 45 in the 2020 Fortune 500, ''Fortune'' 500 list of the largest United States corporations by total revenue for nearly a decade, from 2007 to 2016 fiscal years. Intel supplies microprocessors for List of computer system manufacturers, computer system manufacturers such as Acer Inc., Acer, Lenovo, HP Inc., HP, and Dell Technologies, Dell. Intel also manufactures motherboard chipsets, network interface controllers and integrated circuits, flash memory, Graphics processing unit, graphics chips, Embedded system, embedded processors and other devices related to com ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Northbridge (computing)
In computing, a northbridge (also host bridge, or memory controller hub) is one of two chips comprising the core logic chipset architecture on a PC motherboard. A northbridge is connected directly to a CPU via the front-side bus (FSB) to handle high-performance tasks, and is usually used in conjunction with a slower southbridge to manage communication between the CPU and other parts of the motherboard. Since the 2010s, die shrink and improved transistor density have allowed for increasing chipset integration, and the functions performed by northbridges are now often incorporated into other components (like southbridges or CPUs themselves). As of 2019, Intel and AMD had both released chipsets in which all northbridge functions had been integrated into the CPU. Modern Intel Core processors have the northbridge integrated on the CPU die, where it is known as the uncore or system agent. On older Intel based PCs, the northbridge was also named external memory controller hub ('' ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Fully Integrated Voltage Regulator
A voltage regulator module (VRM), sometimes called processor power module (PPM), is a buck converter that provides microprocessor and chipset the appropriate supply voltage, converting , or to lower voltages required by the devices, allowing devices with different supply voltages be mounted on the same motherboard. On personal computer (PC) systems, the VRM is typically made up of power MOSFET devices. Overview Most voltage regulator module implementations are soldered onto the motherboard. Some processors, such as Intel Haswell and Ice Lake CPUs, feature some voltage regulation components on the same CPU package, reduce the VRM design of the motherboard; such a design brings certain levels of simplification to complex voltage regulation involving numerous CPU supply voltages and dynamic powering up and down of various areas of a CPU. A voltage regulator integrated on-package or on-die is usually referred to as ''fully integrated voltage regulator'' (''FIVR'') or simply a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SMBus
The System Management Bus (abbreviated to SMBus or SMB) is a single-ended simple two-wire bus for the purpose of lightweight communication. Most commonly it is found in computer motherboards for communication with the power source for ON/OFF instructions. It is derived from I²C for communication with low-bandwidth devices on a motherboard, especially power related chips such as a laptop's rechargeable battery subsystem (see Smart Battery System). Other devices might include temperature, fan or voltage sensors, lid switches, clock generator, and RGB lighting. PCI add-in cards may connect to an SMBus segment. A device can provide manufacturer information, indicate its model/part number, save its state for a suspend event, report different types of errors, accept control parameters and return status. The SMBus is generally not user configurable or accessible. Although SMBus devices usually can't identify their functionality, a new PMBus coalition has extended SMBus to include conven ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
I²C
I2C (Inter-Integrated Circuit, ), alternatively known as I2C or IIC, is a synchronous, multi-controller/multi-target (master/slave), packet switched, single-ended, serial communication bus invented in 1982 by Philips Semiconductors. It is widely used for attaching lower-speed peripheral ICs to processors and microcontrollers in short-distance, intra-board communication. Several competitors, such as Siemens, NEC, Texas Instruments, STMicroelectronics, Motorola, Nordic Semiconductor and Intersil, have introduced compatible I2C products to the market since the mid-1990s. System Management Bus (SMBus), defined by Intel in 1995, is a subset of I2C, defining a stricter usage. One purpose of SMBus is to promote robustness and interoperability. Accordingly, modern I2C systems incorporate some policies and rules from SMBus, sometimes supporting both I2C and SMBus, requiring only minimal reconfiguration either by commanding or output pin use. Applications I2C is appropriate for peri ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel High Definition Audio
Intel High Definition Audio (IHDA) (also called HD Audio or development codename Azalia) is a specification for the audio sub-system of personal computers. It was released by Intel in 2004 as the successor to their AC'97 PC audio standard. Features The Intel High Definition Audio specification includes the following features: * Up to 15 input and 15 output streams * Up to 16 PCM audio channels per stream * Sample resolutions of 8–32 bits * Sample rates of 6–192 kHz * Support for audio codecs (e.g., ADC, DAC), modem codecs, and vendor-defined codecs * Discoverable codec architecture * Fine-grained codec power-control * Audio jack detection, sensing, and retasking Motherboards typically do not have any more than eight built-in output channels (7.1 surround sound) and four input channels (back and front panel microphone inputs, and a back-panel stereo line-in). Users requiring more audio I/Os will typically opt for a sound card or an external audio interface, as these ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System In Package
A system in a package (SiP) or system-in-package is a number of integrated circuits enclosed in one or more chip carrier packages that may be stacked using package on package. The SiP performs all or most of the functions of an electronic system, and is typically used inside a mobile phone, digital music player, etc. Dies containing integrated circuits may be stacked vertically on a substrate. They are internally connected by fine wires that are bonded to the package. Alternatively, with a flip chip technology, solder bumps are used to join stacked chips together. A SiP is like a system on a chip (SoC) but less tightly integrated and not on a single semiconductor die. SiP dies can be stacked vertically or tiled horizontally, unlike less dense multi-chip modules, which place dies horizontally on a carrier. SiP connects the dies with standard off-chip wire bonds or solder bumps, unlike slightly denser three-dimensional integrated circuits which connect stacked silicon dies with ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Skylake (microarchitecture)
Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture. Skylake is a microarchitecture redesign using the same 14 nm manufacturing process technology as its predecessor, serving as a tock in Intel's tick–tock manufacturing and design model. According to Intel, the redesign brings greater CPU and GPU performance and reduced power consumption. Skylake CPUs share their microarchitecture with Kaby Lake, Coffee Lake, Cannon Lake, Whiskey Lake, and Comet Lake CPUs. Skylake is the last Intel platform on which Windows earlier than Windows 10 will be officially supported by Microsoft, although enthusiast-created modifications exist that allow Windows 8.1 and earlier to continue to receive Windows Updates on later platforms. Some of the processors based on the Skylake microarchitecture are marketed as 6th-generation Core. Intel officially declared end of life and discontinued Sk ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Broadwell (microarchitecture)
Broadwell is the fifth generation of the Intel Core Processor. It is Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture. It is a "tick" in Intel's tick–tock principle as the next step in semiconductor fabrication. Like some of the previous tick-tock iterations, Broadwell did not completely replace the full range of CPUs from the previous microarchitecture ( Haswell), as there were no low-end desktop CPUs based on Broadwell. Some of the processors based on the Broadwell microarchitecture are marketed as "5th-generation Core" i3, i5 and i7 processors. This moniker is however not used for marketing of the Broadwell-based Celeron, Pentium or Xeon chips. This microarchitecture also introduced the Core M processor branding. Broadwell is the last Intel platform on which Windows 7 is supported by either Intel or Microsoft; however, third-party hardware vendors have offered limited Windows 7 support on more recent platforms. Broadwell's ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cannon Lake (microarchitecture)
Cannon Lake (formerly Skymont) is Intel's codename for the 10 nm die shrink of the Kaby Lake microarchitecture. As a die shrink, Cannon Lake is a new ''process'' in Intel's process-architecture-optimization execution plan as the next step in semiconductor fabrication. Cannon Lake CPUs are the first mainstream CPUs to include the AVX-512 instruction set. Prior to Cannon Lake's launch, Intel launched another 14 nm process refinement with the codename Coffee Lake. The successor of Cannon Lake is Ice Lake, powered by the Sunny Cove microarchitecture, which represents the ''architecture'' phase in the ''process-architecture-optimization'' model. Design history and features Cannon Lake was initially expected to be released in 2015/2016, but the release was pushed back to 2018. Intel demonstrated a laptop with an unknown Cannon Lake CPU at CES 2017 and announced that Cannon Lake based products would be available in 2018 at the earliest. At CES 2018 Intel announced that ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Nehalem (microarchitecture)
Nehalem is the codename for Intel's 45 nm microarchitecture released in November 2008. It was used in the first-generation of the Intel Core i5 and i7 processors, and succeeds the older Core microarchitecture used on Core 2 processors. The term "Nehalem" comes from the Nehalem River. Nehalem is built on the 45 nm process, is able to run at higher clock speeds, and is more energy-efficient than Penryn microprocessors. Hyper-threading is reintroduced, along with a reduction in L2 cache size, as well as an enlarged L3 cache that is shared among all cores. Nehalem is an architecture that differs radically from Netburst, while retaining some of the latter's minor features. Nehalem later received a die-shrink to 32 nm with Westmere, and was fully succeeded by "second-generation" Sandy Bridge in January 2011. Technology * Cache line block on L2/L3 cache was reduced from 128 bytes in Netburst & Conroe/Penryn to 64 bytes per line in this generation (same size as Yonah and Pe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Management Engine
The Intel Management Engine (ME), also known as the Intel Manageability Engine, is an autonomous subsystem that has been incorporated in virtually all of Intel's processor chipsets since 2008. It is located in the Platform Controller Hub of modern Intel motherboards. The Intel Management Engine always runs as long as the motherboard is receiving power, even when the computer is turned off. This issue can be mitigated with deployment of a hardware device, which is able to disconnect mains power. Intel's main competitor AMD has incorporated the equivalent AMD Secure Technology (formally called Platform Security Processor) in virtually all of its post-2013 CPUs. Difference from Intel AMT The Management Engine is often confused with Intel AMT (Intel Active Management Technology). AMT runs on the ME, but is only available on processors with vPro. AMT gives device owners remote administration of their computer, such as powering it on or off, and reinstalling the operating system. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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