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PIIX3
PCI IDE ISA Xcelerator (PIIX), also known as Intel 82371, is a family of Intel southbridge microchips employed in some Intel chipsets. x86 virtualization implementations often support emulations of various PIIX-based chipsets. Versions PIIX The PIIX integrated an IDE controller with two 8237 DMA controllers, the 8254 PIT, and two 8259 PICs and a PCI to ISA bus bridge. It was introduced with the 430FX Triton chipset in 1995. The mobile version was introduced with the 430MX mobile Triton chipset. The following variations existed: *82371FB (PIIX) *82371MX (MPIIX) Mobile PIIX3 The PIIX3 introduced a USB 1.0 controller and support for an external I/O APIC. It was used with the 430HX and 430VX Triton II and 440FX northbridges. The following variations existed: *82371SB (PIIX3) Gallery File:Intel sb82371sb su093.jpg, Intel SB82371SB (PIIX3) PIIX4 The PIIX4 introduced ACPI support, an improved IDE controller with Ultra DMA/33 support, and an integrated MC146818 style R ...
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Intel 440FX
The Intel 440FX (codenamed Natoma), is a chipset from Intel, supporting the Pentium Pro and Pentium II processors. It is the first chipset from Intel that supports Pentium II. It is also known as i440FX and was released in May 1996. Official part numbers include the 82441FX and the 82442FX. The 440FX chipset does not support UltraDMA, SDRAM, or AGP. The chipset contains the northbridge chip "440FX PCIset - 82441FX PCI and Memory Controller (PMC)" and the data bus accelerator (DBX) "82442FX". Its southbridge counterpart is the PIIX3. It was replaced by Intel 440LX. The designers of the QEMU emulator originally chose to simulate this chipset and its southbridge counterpart PIIX3. Gallery File:Intel sb82441fx su053.jpg, Intel 82441FX PCI and Memory Controller (PMC) File:Intel sb82442fx su054.jpg, Intel 82442FX Data Bus Accelerator (DBX) See also * PCI bus bridges * List of Intel chipsets This article provides a list of motherboard chipsets made by Intel, divided into thr ...
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Intel 430HX
The Intel 430HX (codenamed Triton II) is a chipset from Intel, supporting Socket 7 processors, including the Pentium and Pentium MMX. It is also known as i430HX and it was released in February 1996. The official part number is 82430HX. Features The 430HX chipset had all the features of the 430FX (Triton I) plus support for ECC, parity RAM, two-way SMP, USB, and then current PCI to improve speed. It consists of one 82439HX TXC, the northbridge and one PIIX3, the southbridge. The 430HX chipset supported up to 512MB of RAM (64MB or 512MB cacheable depending on tag RAM size). Gallery File:Intel fw82439hx su115.jpg, Intel FW82439HX PCIset System Controller (TXC) Limitations Not all 430HX boards allowed for tag RAM expansion, only allowing 64MB cacheable; 430HX also did not support the then-new SDRAM memory technology. Dual-voltage support, for Pentium MMX or AMD K6 CPUs, was also not mandatory on 430HX boards, requiring the use of an interposer to step down the voltage. See als ...
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Intel APIC Architecture
In computing, Intel's Advanced Programmable Interrupt Controller (APIC) is a family of programmable interrupt controllers. As its name suggests, the APIC is more advanced than Intel's 8259 Programmable Interrupt Controller (PIC), particularly enabling the construction of multiprocessor systems. It is one of several architectural designs intended to solve interrupt routing efficiency issues in multiprocessor computer systems. The APIC is a split architecture design, with a local component (LAPIC) usually integrated into the processor itself, and an optional I/O APIC on a system bus. The first APIC was the 82489DX it was a discrete chip that functioned both as local and I/O APIC. The 82489DX enabled construction of symmetric multiprocessor (SMP) systems with the Intel 486 and early Pentium processors; for example, the reference two-way 486 SMP system used three 82489DX chips, two as local APICs and one as I/O APIC. Starting with the P54C processor, the local APIC functionality was ...
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List Of Intel Chipsets
This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series). The chipsets are listed in chronological order. Pre-chipset situation An earlier chipset support for Intel 8085 microprocessor can be found at MCS-85 family section. Early IBM XT-compatible mainboards did not yet have a chipset, but relied instead on a collection of discrete TTL chips by Intel: * the 8284 clock generator * the 8288 bus controller * the 8254 programmable interval timer * the 8255 parallel I/O interface * the 8259 programmable interrupt controller * the 8237 DMA controller Early chipsets To integrate the functions needed on a mainboard into a smaller number of ICs, Intel licensed the ZyMOS POACH chipset for its Intel 80286 and Intel 80386SX processors (the 8223 ...
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Universal Serial Bus
Universal Serial Bus (USB) is an industry standard, developed by USB Implementers Forum (USB-IF), for digital data transmission and power delivery between many types of electronics. It specifies the architecture, in particular the physical interfaces, and communication protocols to and from ''hosts'', such as personal computers, to and from peripheral ''devices'', e.g. displays, keyboards, and mass storage devices, and to and from intermediate ''hubs'', which multiply the number of a host's ports. Introduced in 1996, USB was originally designed to standardize the connection of peripherals to computers, replacing various interfaces such as serial ports, parallel ports, game ports, and Apple Desktop Bus (ADB) ports. Early versions of USB became commonplace on a wide range of devices, such as keyboards, mice, cameras, printers, scanners, flash drives, smartphones, game consoles, and power banks. USB has since evolved into a standard to replace virtually all common ports on ...
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Intel 8237
Intel 8237 is a direct memory access (DMA) controller, a part of the MCS 85 microprocessor family. It enables data transfer between memory and the I/O with reduced load on the system's main processor by providing the memory with control signals and memory address information during the DMA transfer. The 8237 is a four-channel device that can be expanded to include any number of DMA channel inputs. The 8237 is capable of DMA transfers at rates of up to per second. Each channel is capable of addressing a full 64k-byte section of memory and can transfer up to 64k bytes with a single programming. A single 8237 was used as the DMA controller in the original IBM PC and IBM XT. The IBM PC AT added another 8237 in master-slave configuration, increasing the number of DMA channels from four to seven. Later IBM-compatible personal computers may have chip sets that emulate the functions of the 8237 for backward compatibility. The Intel 8237 was actually designed by AMD (called Am9517). I ...
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I/O Controller Hub
I/O Controller Hub (ICH) is a family of Intel Corporation, Intel southbridge (computing), southbridge microchips used to manage I/O, data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture. It is designed to be paired with a second support chip known as a northbridge (computing), northbridge. As with any other southbridge, the ICH is used to connect and control peripheral devices. As CPU speeds increased data transmission between the CPU and support chipset, the support chipset eventually emerged as a wikt:bottleneck, bottleneck between the processor and the motherboard. Accordingly, starting with the 2008 Intel 5 Series, a new architecture was used that incorporated some functions of the traditional north and south bridge chips onto the CPU itself, with the remaining functions being consolidated into a single Platform Controller Hub (PCH) and therefore replacing the traditional two chip setup. ICH The first version of ...
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System Controller Hub
System Controller Hub (SCH) is a family of Intel microchips employed in chipsets for low-power Atom-based platforms. Its architecture is consistent with the Intel Hub Architecture but combines the traditional northbridge and southbridge functions into a single microchip. Poulsbo Poulsbo is the codename of the first SCH and plays a key role in Intel's second-generation Menlow UMPC and MID platform chipset for Atom Silverthorne microprocessors. The graphics core is called GMA 500 and unlike most graphics cores used by Intel was developed by Imagination Technologies. Intel licensed the PowerVR SGX 535 as a graphics core and the PowerVR VXD370 for H.264/MPEG-4 AVC playback. The video core is able to process 720p as well as 1080i resolutions. This has the following variations: SCH UL11LSCH US15LSCH US15WSCH US15WPSCH US15WPTSCH US15X GMA 500 Linux support Although several netbooks using the Poulsbo chipset are shipped with some distribution of Linux (notably the Sony Vaio P ...
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Platform Controller Hub
The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chipsa northbridge and southbridge, and first appeared in the Intel 5 Series. The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. AMD has its equivalent for the PCH, known simply as a chipset since the release of the Zen architecture in 2017. ...
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Super I/O
Super I/O (sometimes Multi-IO) is a class of I/O controller integrated circuits that began to be used on personal computer motherboards in the late 1980s, originally as add-in cards, later embedded on the motherboards. A super I/O chip combines interfaces for a variety of low-bandwidth devices. Now it is mostly merged with EC. Functions The functions below are usually provided by the super I/O if they are on the motherboard: * A floppy-disk controller * An IEEE 1284-compatible parallel port (commonly used for printers) * One or more 16C550-compatible serial port UARTs * Keyboard controller for PS/2 keyboard and/or mouse Most Super I/O chips include some additional low-speed devices, such as: * Temperature, voltage, and fan speed interface * Connect temperature and voltage sensors via SMBus * Thermal Zone * Chassis intrusion detection * Mainboard power management, including control voltage regulator module * LED management * PWM fan speed control * An IrDA Port cont ...
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Itanium
Itanium (; ) is a discontinued family of 64-bit computing, 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel. Launching in June 2001, Intel initially marketed the processors for enterprise servers and high-performance computing systems. In the concept phase, engineers said "we could run circles around PowerPC...we could kill the x86". Early predictions were that IA-64 would expand to the lower-end servers, supplanting Xeon, and eventually penetrate into the personal computers, eventually to supplant Reduced instruction set computer, reduced instruction set computing (RISC) and complex instruction set computing (CISC) architectures for all general-purpose applications. When first released in 2001 after a decade of development, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Em ...
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Intel 440BX
The Intel 440BX (codenamed Seattle) is a chipset from Intel, supporting Pentium II, Pentium III, and Celeron processors. It is also known as the i440BX and was released in April 1998. The official part number is 82443BX. Features The 440BX originally supported Slot 1 and later Socket 370 Intel P6-based processors in single and SMP configurations at speeds of up to 1 GHz (and potentially up to 1.4 GHz with certain unsupported modifications, up to 1.7 GHz can be achieved using Front Side Bus speeds higher than 133 MHz and appropriate cooling). Its southbridge counterpart is the PIIX4E. History The Intel 440BX is the third Pentium II chipset released by Intel, succeeding the 440FX and 440LX. With the new 100 MHz front side bus, Pentium II CPUs were able to scale better in performance by reducing the difference between processor clock and bus speed. The previous 66 MHz bus had become a serious bottleneck and dated back to the first Pentium "Classic ...
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