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Nios II
Nios II is a 32-bit embedded processor architecture designed specifically for the Altera family of field-programmable gate array (FPGA) integrated circuits. Nios II incorporates many enhancements over the original Nios architecture, making it more suitable for a wider range of embedded computing applications, from digital signal processing (DSP) to system-control. Nios II is a successor to Altera's first configurable 16-bit embedded processor Nios, introduced in 2000. Intel announced the discontinuation of Nios II in 2023, with its successor being Nios V, based on the RISC-V architecture. Key features Like the original Nios, the Nios II architecture is a RISC soft-core architecture which is implemented entirely in the programmable logic and memory blocks of Altera FPGAs. Unlike its predecessor it is a full 32-bit design: * 32 general-purpose 32-bit registers, * Full 32-bit instruction set, data path, and address space, * Single-instruction 32 × 32 multiply and divide ...
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Altera
Altera Corporation is a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015 before becoming independent once again in 2025 as a company focused on development of Field-Programmable Gate Array (FPGA) technology and system on a chip FPGAs. Early history The company was founded in 1983 by semiconductor veterans Robert Hartmann, Paul Newhagen, James Sansbury, and Michael Magranet with $1,300,000 in seed money. The name of the company was a play on "alterable", the type of chips the company created. The founders selected Rodney Smith to be the company's first CEO. In 1988, Altera became a public company via an initial public offering (IPO). Products FPGAs The main product lines from Altera are the Agilex FPGA product lines, and their predecessors: the high-end Stratix series, mid-range Arria series, and lower-cost Cyclone series; as well as the MAX series non-volatile FPGAs. Semicond ...
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FreeRTOS
FreeRTOS is a real-time operating system Kernel (operating system), kernel for embedded devices that has been ported to 40 microcontroller platforms. It is distributed under the MIT License. History The FreeRTOS kernel was originally developed by Richard Barry around 2003, and was later developed and maintained by Barry's company, Real Time Engineers Ltd. In 2017, the firm passed stewardship of the FreeRTOS project to Amazon Web Services (AWS). Barry continues to work on FreeRTOS as part of an AWS team. With the transition to Amazon control, subsequent releases of the project also switched licensing from GPL version 2 (with special exceptions for static linking to proprietary code outside the FreeRTOS kernel itself) to MIT. Implementation FreeRTOS is designed to be small and simple. It is mostly written in the C (programming language), C programming language to make it easy to port and maintain. It also comprises a few assembly language functions where needed, mostly in archite ...
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GNU Toolchain
The GNU toolchain is a broad collection of programming tools produced by the GNU Project. These tools form a toolchain (a suite of tools used in a serial manner) used for developing software applications and operating systems. The GNU toolchain plays a vital role in development of Linux, some BSD systems, and software for embedded systems. Parts of the GNU toolchain are also directly used with or ported to other platforms such as Solaris, macOS, Microsoft Windows (via Cygwin and MinGW/MSYS/WSL2), Sony PlayStation Portable (used by PSP modding scene) and Sony PlayStation 3. Components Projects in the GNU toolchain are: * * * * * * * GNU * GNU See also * * * * * * * * References External links GCC, the GNU Compiler CollectionPrebuilt Win32 GNU Toolchains for various embedded platforms Programming tools toolchain A toolchain is a set of software development tools used to build and otherwise develop software. Often, the tools are executed sequentiall ...
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Eclipse (software)
Eclipse is an integrated development environment (IDE) used in computer programming. It contains a base workspace and an extensible plug-in system for customizing the environment. It had been the most popular IDE for Java development until 2016, when it was surpassed by IntelliJ IDEA. Eclipse is written mostly in Java and its primary use is for developing Java applications, but it may also be used to develop applications in other programming languages via plug-ins, including Ada, ABAP, C, C++, C#, Clojure, COBOL, D, Erlang, Fortran, Groovy, Haskell, HLASM, JavaScript, Julia, Lasso, Lua, NATURAL, Perl, PHP, PL/I, Prolog, Python, R, Rexx, Ruby (including Ruby on Rails framework), Rust, Scala, and Scheme. It can also be used to develop documents with LaTeX (via a TeXlipse plug-in) and packages for the software Mathematica. Development environments include the Eclipse Java development tools (JDT) for Java and Scala, Eclipse CDT for C/C++, and Eclipse PDT for P ...
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Graphical User Interface
A graphical user interface, or GUI, is a form of user interface that allows user (computing), users to human–computer interaction, interact with electronic devices through Graphics, graphical icon (computing), icons and visual indicators such as secondary notation. In many applications, GUIs are used instead of text-based user interface, text-based UIs, which are based on typed command labels or text navigation. GUIs were introduced in reaction to the perceived steep learning curve of command-line interfaces (CLIs), which require commands to be typed on a computer keyboard. The actions in a GUI are usually performed through direct manipulation interface, direct manipulation of the graphical elements. Beyond computers, GUIs are used in many handheld mobile devices such as MP3 players, portable media players, gaming devices, smartphones and smaller household, office and Distributed control system, industrial controls. The term ''GUI'' tends not to be applied to other lower-displa ...
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Switched Fabric
Switched fabric or switching fabric is a network topology in which network nodes interconnect via one or more network switches (particularly crossbar switches). Because a switched fabric network spreads network traffic across multiple physical links, it yields higher total throughput than broadcast networks, such as the early 10BASE5 version of Ethernet and most wireless networks such as Wi-Fi. The generation of high-speed serial data interconnects that appeared in 2001–2004 which provided point-to-point connectivity between processor and peripheral devices are sometimes referred to as fabrics; however, they lack features such as a message-passing protocol. For example, HyperTransport, the computer processor interconnect technology, continues to maintain a processor bus focus even after adopting a higher speed physical layer. Similarly, PCI Express is just a serial version of PCI; it adheres to PCI's host/peripheral load/store direct memory access (DMA)-based architectu ...
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Logic Block
In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable computing, reconfigurable logic gates. Logic blocks are the most common FPGA architecture, and are usually laid out within a logic block array. Logic blocks require I/O pads (to interface with external signals), and routing channels (to interconnect logic blocks). Programmable logic blocks were invented by David W. Page and LuVerne R. Peterson, and defined within their 1985 patents.Google Patent Search,Re-programmable PLA. Filed January 11, 1983. Granted April 2, 1985. Retrieved February 5, 2009.Google Patent Search,Dynamic data re-programmable PLA. Filed January 11, 1983. Granted June 18, 1985. Retrieved February 5, 2009. Applications An application circuit must be mapped into an FPGA with adequate resources. While the number of logic blocks and I/Os required is e ...
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JTAG
JTAG (named after the Joint Test Action Group which codified it) is an industry standard for verifying designs of and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation. It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip Test Access Port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts. The Joint Test Action Group formed in 1985 to develop a method of verifying designs and testing printed circuit boards after manufacture. In 1990 the Institute of Electrical and Electronics Engineers codified the results of the effort in IEEE Standard 1149.1-1990, entitled ''Stand ...
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Branch Predictor
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow in the instruction pipeline. Branch predictors play a critical role in achieving high performance in many modern pipelined microprocessor architectures. Two-way branching is usually implemented with a conditional jump instruction. A conditional jump can either be "taken" and jump to a different place in program memory, or it can be "not taken" and continue execution immediately after the conditional jump. It is not known for certain whether a conditional jump will be taken or not taken until the condition has been calculated and the conditional jump has passed the execution stage in the instruction pipeline (see fig. 1). Without branch prediction, the processor would have to wait until the conditional jump instruction has passed the ...
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DMIPS
Dhrystone is a synthetic computing benchmark program developed in 1984 by Reinhold P. Weicker intended to be representative of system (integer) programming. The Dhrystone grew to become representative of general processor (CPU) performance. The name "Dhrystone" is a pun on a different benchmark algorithm called Whetstone, which emphasizes floating point performance. With Dhrystone, Weicker gathered meta-data from a broad range of software, including programs written in FORTRAN, PL/1, SAL, ALGOL 68, and Pascal. He then characterized these programs in terms of various common constructs: procedure calls, pointer indirections, assignments, etc. From this he wrote the Dhrystone benchmark to correspond to a representative mix. Dhrystone was published in Ada, with the C version for Unix developed by Rick Richardson ("version 1.1") greatly contributing to its popularity. Dhrystone vs. Whetstone The Dhrystone benchmark contains no floating point operations, thus the name is a pun ...
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Gigabyte
The gigabyte () is a multiple of the unit byte for digital information. The SI prefix, prefix ''giga-, giga'' means 109 in the International System of Units (SI). Therefore, one gigabyte is one billion bytes. The unit symbol for the gigabyte is GB. This definition is used in all contexts of science (especially data science), engineering, business, and many areas of computing, including storage capacities of hard disk drive, hard drives, solid-state drives, and magnetic-tape data storage, tapes, as well as data transmission speeds. The term is also used in some fields of computer science and information technology to denote (10243 or 230) bytes, however, particularly for sizes of random-access memory, RAM. Thus, some usage of ''gigabyte'' has been ambiguous. To resolve this difficulty, IEC 80000-13 clarifies that a ''gigabyte'' (GB) is 109 bytes and specifies the term ''gibibyte'' (GiB) to denote 230 bytes. These differences are still readily seen, for example, when a 400  ...
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Memory Protection Unit
A memory protection unit (MPU) is a computer hardware unit that provides memory protection. It is usually implemented as part of the central processing unit (CPU). MPU is a trimmed down version of memory management unit (MMU) providing only memory protection support. It is usually implemented in low power processors that require only memory protection and do not need the full-fledged feature of a MMU like virtual memory management. Overview The MPU allows the privileged software to define memory regions and assign memory access permission and memory attributes to each of them. Depending on the implementation of the processor, the number of supported memory regions will vary. The MPU on ARMv8-M processors supports up to 16 regions. The memory attributes define the ordering and merging behaviors of these regions, as well as caching and buffering attributes. Cache attributes can be used by internal caches, if available, and can be exported for use by system caches. MPU monitors ...
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