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Interposer
An interposer is an electrical interface routing between one socket or connection to another. The purpose of an interposer is to spread a connection to a wider pitch or to reroute a connection to a different connection. Interposer comes from the Latin word "interpōnere", meaning "to put between". They are often used in BGA packages, multi-chip modules and high bandwidth memory. A common example of an interposer is an integrated circuit die to BGA, such as in the Pentium II. This is done through various substrates, both rigid and flexible, most commonly FR4 for rigid, and polyimide for flexible. Silicon and glass are also evaluated as an integration method. Interposer stacks are also a widely accepted, cost-effective alternative to 3D ICs. There are already several products with interposer technology in the market, notably the AMD Fiji/Fury GPU, and the Xilinx Virtex-7 FPGA. In 2016, CEA Leti demonstrated their second generation 3D-NoC technology which combines small ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
High Bandwidth Memory
High Bandwidth Memory (HBM) is a high-speed computer memory interface for 3D-stacked synchronous dynamic random-access memory (SDRAM) initially from Samsung, AMD and SK Hynix. It is used in conjunction with high-performance graphics accelerators, network devices, high-performance datacenter AI ASICs and FPGAs and in some supercomputers (such as the NEC SX-Aurora TSUBASA and Fujitsu A64FX). The first HBM memory chip was produced by SK Hynix in 2013, and the first devices to use HBM were the AMD Fiji GPUs in 2015. High Bandwidth Memory has been adopted by JEDEC as an industry standard in October 2013.High Bandwidth Memory (HBM) DRAM (JESD235) JEDEC, October 2013 The second generation, HBM2, was accepted by JEDEC in January 2016. Technology ...
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Three-dimensional Integrated Circuit
A three-dimensional integrated circuit (3D IC) is a MOS (metal-oxide semiconductor) integrated circuit (IC) manufactured by stacking as many as 16 or more ICs and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. The 3D IC is one of several 3D integration schemes that exploit the z-direction to achieve electrical performance benefits in microelectronics and nanoelectronics. 3D integrated circuits can be classified by their level of interconnect hierarchy at the global ( package), intermediate (bond pad) and local (transistor) level. In general, 3D integration is a broad term that includes such technologies as 3D wafer-level packaging (3DWLP); 2.5D and 3D interposer-based integration; 3D stacked ICs (3D-SICs); monolithic 3D ICs; 3D heterogeneous integration; and ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Multi-chip Module
A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are integrated, usually onto a unifying substrate, so that in use it can be treated as if it were a larger IC. Other terms for MCM packaging include "heterogeneous integration" or " hybrid integrated circuit". The advantage of using MCM packaging is it allows a manufacturer to use multiple components for modularity and/or to improve yields over a conventional monolithic IC approach. Overview Multi-chip modules come in a variety of forms depending on the complexity and development philosophies of their designers. These can range from using pre-packaged ICs on a small printed circuit board (PCB) meant to mimic the package footprint of an existing chip package to fully custom chip packages integrating many chip dies on a high density interconnection ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Virtex 7
Virtex is the flagship family of FPGA products developed by Xilinx, a part of AMD. Other current product lines include Kintex (mid-range) and Artix (low-cost), each including configurations and models optimized for different applications.DSP-FPGA.comXilinx FPGA Products” April 2010. Retrieved June 10, 2010. In addition, Xilinx offers the Spartan low-cost series, which continues to be updated and is nearing production utilizing the same underlying architecture and process node as the larger 7-series devices. Virtex FPGAs are typically programmed in hardware description languages such as VHDL or Verilog, using the Xilinx ISE or Vivado Design Suite computer software.Brian Bailey, EE Times.Second generation for FPGA software" Apr 25, 2012. Retrieved Dec 21, 2012. Xilinx FPGA products have been recognized by EE Times, EDN and others for innovation and market impact.EE Times, �EE Times 2010 ACE Award for Design Innovation.” April 27, 2010. Retrieved June 17, 2010.EDN, �EDN Hot 100 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Ball Grid Array
A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds. BGAs were introduced in the 1990s and became popular by 2001. Soldering of BGA devices requires precise control and is usually done by automated processes such as in computer-controlled automatic reflow ovens. Description The BGA is descended from the pin grid array (PGA), which is a package with one face covered (or partly covered) with pins in a grid pattern which, in operation, conduct electrical signals between ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
AMD Radeon RX 300 Series
The Radeon 300 series is a series of graphics processors developed by AMD. All of the GPUs of the series are produced in 28 nm format and use the Graphics Core Next (GCN) micro-architecture. The series includes the Fiji and Tonga GPU dies based on AMD's GCN 3 or "Volcanic Islands" architecture, which had originally been introduced with the Tonga based (though cut-down) R9 285 slightly earlier. Some of the cards in the series include the Fiji based flagship AMD Radeon R9 Fury X, cut-down Radeon R9 Fury and small form factor Radeon R9 Nano, which are the first GPUs to feature High Bandwidth Memory (HBM) technology, which AMD co-developed in partnership with SK Hynix. HBM is faster and more power efficient than GDDR5 memory, though also more expensive. However, the remaining GPUs in the series outside the Tonga based R9 380 and R9 380X are based on previous generation GPUs with revised power management, and therefore only feature GDDR5 memory (something Tonga does as well). ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CMOS
Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", ) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors ( CMOS sensors), data converters, RF circuits ( RF CMOS), and highly integrated transceivers for many types of communication. The CMOS process was originally conceived by Frank Wanlass at Fairchild Semiconductor and presented by Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963. Wanlass later filed US patent 3,356,858 for CMOS circuitry and it was granted in 1967. commercialized the technology with the trademar ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Integrated Circuit
An integrated circuit or monolithic integrated circuit (also referred to as an IC, a chip, or a microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material, usually silicon. Transistor count, Large numbers of tiny MOSFETs (metal–oxide–semiconductor field-effect transistors) integrate into a small chip. This results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete electronic components. The IC's mass production capability, reliability, and building-block approach to integrated circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones and other home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs such as mode ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Die Preparation
Die preparation is a step of semiconductor device fabrication during which a wafer is prepared for IC packaging and IC testing. The process of die preparation typically consists of two steps: wafer mounting and wafer dicing. Wafer mounting Wafer mounting is a step that is performed during the die preparation of a wafer as part of the process of semiconductor fabrication. During this step, the wafer is mounted on a plastic tape that is attached to a ring. Wafer mounting is performed right before the wafer is cut into separate dies. The adhesive film upon which the wafer is mounted ensures that the individual dies remain firmly in place during 'dicing', as the process of cutting the wafer is called. The picture on the right shows a 300 mm wafer after it was mounted and diced. The blue plastic is the adhesive tape. The wafer is the round disc in the middle. In this case, a large number of dies were already removed. Semiconductor-die cutting In the manufacturing of micro-elect ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Storage Networking Industry Association
The Storage Networking Industry Association (SNIA) is a registered 501(c)(6) non-profit trade association incorporated in December 1997. SNIA has more than 185 unique members, 2,000 active contributing members and over 50,000 IT end users and storage professionals. The SNIA absorbed the Small Form Factor Committee. SNIA's membership community participates in the following storage-related technical working groups: * Certification * Cloud Storage Technologies * Computational Storage * Data Management * Data Security * Dictionary * Networked Storage * Next Generation Data Center * Persistent Memory * Physical Storage * Power Efficiency Measurement * Storage Management Initiative – Specification (SMI-S) * Storage Management Swordfish Protocol SNIA and its technical council maintain a vendor-neutral dictionary and glossary of storage networking, data, and information management terminology. The SNIA dictionary won an award for publication excellence in 2009 and 2012 from the B ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Redundancy (engineering)
In engineering, redundancy is the intentional duplication of critical components or functions of a system with the goal of increasing reliability of the system, usually in the form of a backup or fail-safe, or to improve actual system performance, such as in the case of GNSS receivers, or multi-threaded computer processing. In many safety-critical systems, such as fly-by-wire and hydraulic systems in aircraft, some parts of the control system may be triplicated, which is formally termed triple modular redundancy (TMR). An error in one component may then be out-voted by the other two. In a triply redundant system, the system has three sub components, all three of which must fail before the system fails. Since each one rarely fails, and the sub components are expected to fail independently, the probability of all three failing is calculated to be extraordinarily small; it is often outweighed by other risk factors, such as human error. Redundancy may also be known by the te ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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