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GNU Linux User Group
GNU ( ) is an extensive collection of free software (394 packages ), which can be used as an operating system or can be used in parts with other operating systems. The use of the completed GNU tools led to the family of operating systems popularly known as Linux. Most of GNU is licensed under the GNU Project's own General Public License ( GPL). GNU is also the project within which the free software concept originated. Richard Stallman, the founder of the project, views GNU as a "technical means to a social end". Relatedly, Lawrence Lessig states in his introduction to the second edition of Stallman's book '' Free Software, Free Society'' that in it Stallman has written about "the social aspects of software and how Free Software can create community and social justice". Name ''GNU'' is a recursive acronym for "GNU's Not Unix!", chosen because GNU's design is Unix-like, but differs from Unix by being free software and containing no Unix code. Stallman chose the name by usi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Debian GNU/Hurd
Debian () is a free and open-source software, free and open source Linux distribution, developed by the Debian Project, which was established by Ian Murdock in August 1993. Debian is one of the oldest operating systems based on the Linux kernel, and is the basis of List of Linux distributions#Debian-based, many other Linux distributions. As of September 2023, Debian is the second-oldest Linux distribution still in active development: only Slackware is older. The project is coordinated over the Internet by a team of volunteers guided by the List of Debian project leaders, Debian Project Leader and three foundational documents: the Debian Social Contract, the Debian Constitution, and the Debian Free Software Guidelines. In general, Debian has been developed openly and distributed freely according to some of the principles of the GNU Project and Free Software. Because of this, the Free Software Foundation sponsored the project from November 1994 to November 1995. However, Debian ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
IA-32
IA-32 (short for "Intel Architecture, 32-bit", commonly called ''i386'') is the 32-bit version of the x86 instruction set architecture, designed by Intel and first implemented in the i386, 80386 microprocessor in 1985. IA-32 is the first incarnation of x86 that supports 32-bit computing; as a result, the "IA-32" term may be used as a Metonymy, metonym to refer to all x86 versions that support 32-bit computing. Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture. In some other contexts, certain iterations of the IA-32 ISA are sometimes labelled ''i486'', ''i586'' and ''i686'', referring to the instruction supersets offered by the i486, 80486, the P5 (microarchitecture), P5 and the P6 (microarchitecture), P6 microarchitectures respectively. These updates offered numerous additions alongside the base IA-32 set including X87, floating-point capabilities and the MMX (instruction set), MMX extensions. Intel was historically ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
M68k
The Motorola 68000 series (also known as 680x0, m68000, m68k, or 68k) is a family of 32-bit complex instruction set computer (CISC) microprocessors. During the 1980s and early 1990s, they were popular in personal computers and workstations and were the primary competitors of Intel's x86 microprocessors. They were best known as the processors used in the early Apple Macintosh, the Sharp X68000, the Commodore Amiga, the Sinclair QL, the Atari ST and Falcon, the Atari Jaguar, the Sega Genesis (Mega Drive) and Sega CD, the Philips CD-i, the Capcom System I (Arcade), the AT&T UNIX PC, the Tandy Model 16/16B/6000, the Sun Microsystems Sun-1, Sun-2 and Sun-3, the NeXT Computer, NeXTcube, NeXTstation, and NeXTcube Turbo, early Silicon Graphics IRIS workstations, the Aesthedes, computers from MASSCOMP, the Texas Instruments TI-89/ TI-92 calculators, the Palm Pilot (all models running Palm OS 4.x or earlier), the Control Data Corporation CDCNET Device Interface, the VTec ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
M32R
The M32R is a 32-bit RISC instruction set architecture (ISA) developed by Mitsubishi Electric for embedded microprocessors and microcontrollers. The ISA is now owned by Renesas Electronics Corporation, and the company designs and fabricates M32R implementations. M32R processors are used in embedded systems such as Engine Control Units, digital cameras and PDAs. The ISA was supported by Linux and the GNU Compiler Collection The GNU Compiler Collection (GCC) is a collection of compilers from the GNU Project that support various programming languages, Computer architecture, hardware architectures, and operating systems. The Free Software Foundation (FSF) distributes ... but was dropped in Linux kernel version 4.16. GCC removed support for this architecture in the GCC 12.1 release. References External links M32R homepageLinux/M32R homepageInterface (CQ Publishing Co., Ltd.) Computer-related introductions in 1997 Instruction set architectures Renesas microcontrollers ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Itanium
Itanium (; ) is a discontinued family of 64-bit computing, 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel. Launching in June 2001, Intel initially marketed the processors for enterprise servers and high-performance computing systems. In the concept phase, engineers said "we could run circles around PowerPC...we could kill the x86". Early predictions were that IA-64 would expand to the lower-end servers, supplanting Xeon, and eventually penetrate into the personal computers, eventually to supplant Reduced instruction set computer, reduced instruction set computing (RISC) and complex instruction set computing (CISC) architectures for all general-purpose applications. When first released in 2001 after a decade of development, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Em ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Qualcomm Hexagon
Hexagon is the brand name for a family of digital signal processor (DSP) and later neural processing unit (NPU) products by Qualcomm. Hexagon is also known as QDSP6, standing for “sixth generation digital signal processor.” According to Qualcomm, the Hexagon architecture is designed to deliver performance with low power over a variety of applications. Each version of Hexagon has an instruction set and a micro-architecture. These two features are intimately related. Hexagon is used in Qualcomm Snapdragon chips, for example in smartphones, cars, wearable devices and other mobile devices and is also used in components of cellular phone networks. Instruction set architecture Computing devices have instruction sets, which are their lowest, most primitive languages. Common instructions are those which cause two numbers to be added, multiplied or combined in other ways, as well as instructions that direct the processor where to look in memory for its next instruction. There ar ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
H8/300
The Hitachi H8 is a large family of 8-bit, 16-bit and 32-bit microcontrollers made by Renesas Technology, originating in the early 1990s within Hitachi Semiconductor. The original design, the H8/300, was an 8-bit processor that had a 16-bit registers and ALU that allowed some 16-bit operations. Two upgraded versions were introduced, the H8/300L that expanded the instructions to become a full 16-bit machine while being optimized for low cost, and the H8/300H which further expanded the registers to allow 32-bit operations and was optimized for low-power/high-performance roles. Many variations exist. The entire line was sold to Renesas in 2003. Renesas continues to sell the designs , but only to existing customers. An administrator on the Renesas user community boards commented in 2011 that there are no plans for further development of H8 based products. H8 was supported in the Linux kernel starting with version 4.2 but support was removed in version 5.19. For higher performan ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
FR-V
The Fujitsu FR-V (Fujitsu RISC- VLIW) is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency. The family was presented in 1999. Its design was influenced by the VPP500/5000 models of the Fujitsu VP/2000 vector processor supercomputer line. Featuring a 1–8 way very long instruction word (VLIW, Multiple Instruction Multiple Data (MIMD), up to 256 bit) instruction set it additionally uses a 4-way single instruction, multiple data (SIMD) vector processor core. A 32-bit RISC instruction set in the superscalar core is combined with most variants integrating a dual 16-bit media processor also in VLIW and vector architecture. Each processor core is superpipelined as well as 4-unit superscalar. A typical integrated circuit integrates a system on a chip and further multipli ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ETRAX CRIS
The ETRAX CRIS is a RISC Instruction set architecture, ISA and series of Central processing unit, CPUs designed and manufactured by Axis Communications for use in embedded systems since 1993. The name is an acronym of the chip's features: ''Ethernet, Token Ring, AXis - Code Reduced Instruction Set''. Token Ring support has been taken out from the latest chips as it has become obsolete. Types of chips The CGA-1 (Coax Gate Array) was the first microprocessor developed by Axis Communications. It contains IBM 3270 (coax) and IBM 5250 (Twinax) communications. The chip has a microcontroller and various I/O's such as serial and parallel. The CGA-1 chip was designed by Martin Gren and Staffan Göransson. ETRAX * In 1993, Axis developed the ETRAX-1 Ethernet Controller, which has 10 Mbit/s Ethernet and Token Ring controllers. * In 1995, Axis introduced the ETRAX-4 System on a chip, SoC which contains a Ethernet Controller, CPU, Memory Interface, SCSI controller, and parallel and seri ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Blackfin
Blackfin is a family of 16-/32-bit microprocessors developed, manufactured and marketed by Analog Devices. The processors have built-in, fixed-point digital signal processor (DSP) functionality performed by 16-bit multiply–accumulates (MACs), accompanied on-chip by a microcontroller. It was designed for a unified low-power processor architecture that can run operating systems while simultaneously handling complex numeric tasks such as real-time H.264 video encoding. Architecture details Blackfin processors use a 32-bit RISC microcontroller programming model on a SIMD architecture, which was co-developed by Intel and Analog Devices, as MSA (Micro Signal Architecture). The architecture was announced in December 2000, and first demonstrated at the Embedded Systems Conference in June, 2001. It incorporates aspects of ADI's older SHARC architecture and Intel's XScale architecture into a single core, combining digital signal processing (DSP) and microcontroller functional ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
AVR32
AVR32 is a 32-bit RISC microcontroller architecture produced by Atmel. The microcontroller architecture was designed by a handful of people educated at the Norwegian University of Science and Technology, including lead designer Øyvind Strøm and CPU architect Erik Renno in Atmel's Norwegian design center. Most instructions are executed in a single-cycle. The multiply–accumulate unit can perform a 32-bit × 16-bit + 48-bit arithmetic operation in two cycles (result latency), issued once per cycle. It does not resemble the 8-bit AVR microcontroller family, even though they were both designed at Atmel Norway, in Trondheim. Some of the debug-tools are similar. Support for AVR32 has been dropped from Linux as of kernel 4.12; Atmel has switched mostly to M variants of the ARM architecture. Architecture The AVR32 has at least two micro-architectures, the AVR32A and AVR32B. These differ in the instruction set architecture, register configurations and the use of caches for in ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
