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Functional Verification
Functional verification is the task of verifying that the digital circuit, logic design conforms to specification. Functional verification attempts to answer the question "Does this proposed design do what is intended?" This is complex and takes the majority of time and effort (up to 70% of design and development time) in most large electronic system design projects. Functional verification is a part of more encompassing ''design verification'', which, besides functional verification, considers non-functional aspects like timing, layout and power. Background Although the number of transistors increased exponential growth, exponentially according to Moore's law, increasing the number of engineers and time taken to produce the designs only increase linearly. As the transistors' complexity increases, the number of coding errors also increases. Most of the errors in logic coding come from careless coding (12.7%), miscommunication (11.4%), and microarchitecture challenges (9.3%). Thus, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Digital Circuit
In theoretical computer science, a circuit is a model of computation in which input values proceed through a sequence of gates, each of which computes a function. Circuits of this kind provide a generalization of Boolean circuits and a mathematical model for digital logic circuits. Circuits are defined by the gates they contain and the values the gates can produce. For example, the values in a Boolean circuit are Boolean values, and the circuit includes conjunction, disjunction, and negation gates. The values in an integer circuit are sets of integers and the gates compute set union, set intersection, and set complement, as well as the arithmetic operations addition and multiplication. Formal definition A circuit is a triplet (M, L, G), where * M is a set of values, * L is a set of gate labels, each of which is a function from M^ to M for some non-negative integer i (where i represents the number of inputs to the gate), and * G is a labelled graph, labelled directed acyclic gra ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Dynamic Verification
Software verification is a discipline of software engineering, programming languages, and theory of computation whose goal is to assure that software satisfies the expected requirements. Broad scope and classification A broad definition of verification makes it related to software testing. In that case, there are two fundamental approaches to verification: * ''Dynamic verification'', also known as experimentation, dynamic testing or, simply testing. - This is good for finding faults (software bugs). * ''Static verification'', also known as analysis or, static testing - This is useful for proving the correctness of a program. Although it may result in false positives when there are one or more conflicts between the process a software really does and what the static verification assumes it does. Under the ACM Computing Classification System, software verification topics appear under "Software and its engineering", within "Software creation", whereas Program verification also appe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
High-level Verification
High-level verification (HLV), or electronic system-level (ESL) verification, is the task to verify ESL designs at high abstraction level, i.e., it is the task to verify a model that represents hardware above register-transfer level (RTL) abstract level. For high-level synthesis (HLS or C synthesis), HLV is to HLS as functional verification is to logic synthesis. Electronic digital hardware design has evolved from low level abstraction at gate level to register transfer level (RTL), the abstraction level above RTL is commonly called high-level, ESL, or behavioral/algorithmic level. In high-level synthesis, behavioral/algorithmic designs in ANSI C/C++/SystemC code is synthesized to RTL, which is then synthesized into gate level through logic synthesis. Functional verification is the task to make sure a design at RTL or gate level conforms to a specification. As logic synthesis matures, most functional verification is done at the higher abstraction, i.e. at RTL level, the correctne ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cleanroom Software Engineering
The cleanroom software engineering process is a software development process intended to produce software with a certifiable level of reliability. The central principles are software development based on formal methods, incremental implementation under statistical quality control, and statistically sound testing. History The cleanroom process was originally developed by Harlan Mills and several of his colleagues including Alan Hevner at IBM. The cleanroom process first saw use in the mid to late 1980s. Demonstration projects within the military began in the early 1990s. Recent work on the cleanroom process has examined fusing cleanroom with the automated verification capabilities provided by specifications expressed in CSP. Philosophy The focus of the cleanroom process is on defect prevention rather than defect removal. The name "cleanroom" was chosen to evoke the cleanrooms used in the electronics industry to prevent the introduction of defects during the fabrication of ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Analog Verification
Analog verification is a methodology for performing functional verification on analog, mixed-signal and RF integrated circuits and systems on chip.Henry Chang and Ken KundertVerification of Complex Analog and RF IC Designs. ''Proceedings of the IEEE'', February 2007. Discussion of analog verification began in 2005 when it started to become recognized that the analog portion of large mixed-signal chips had become so complex that a significant and ever-increasing number of these chips were being designed with functional errors in the analog portion that prevented them from operating correctly. Technical details Analog verification is built on the idea that transistor-level simulation will always be too slow to provide adequate functional verification. Instead, it is necessary to build simple and efficient models of the blocks that make up the analog portion of the design and use those to verify the design. Those models are typically written in Verilog or Verilog-AMS, but could also ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Code Coverage
In software engineering, code coverage, also called test coverage, is a percentage measure of the degree to which the source code of a program is executed when a particular test suite is run. A program with high code coverage has more of its source code executed during testing, which suggests it has a lower chance of containing undetected software bugs compared to a program with low code coverage. Many different metrics can be used to calculate test coverage. Some of the most basic are the percentage of program subroutines and the percentage of program statements called during execution of the test suite. Code coverage was among the first methods invented for systematic software testing. The first published reference was by Miller and Maloney in '' Communications of the ACM'', in 1963. Coverage criteria To measure what percentage of code has been executed by a test suite, one or more ''coverage criteria'' are used. These are usually defined as rules or requirements, whi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Machine Code Monitor
A machine code monitor ( machine language monitor) is software that allows a user to enter commands to view and change memory address, memory locations on a computer, with options to load and save memory contents from/to secondary storage. Some full-featured machine code monitors provide detailed control ("single-stepping") of the execution of machine language programs (much like a debugger), and include absolute-address Assembly language#Assembler, code assembly and disassembler, disassembly capabilities. Motorola published the MIKBUG ROM monitor for the 6800 in 1973 and the BUFFALO ROM monitor for the Motorola 68HC11, 68HC11. Machine code monitors became popular during the home computer era of the 1970s and 1980s and were sometimes available as resident firmware in some computers (e.g., the built-in monitors in the Commodore 128, Zenith Z-89, Heathkit H89 and Zenith laptops). Often, computer manufacturers rely on their ROM-resident monitors to permit users to reconfigure their ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Simulator
A simulation is an imitative representation of a process or system that could exist in the real world. In this broad sense, simulation can often be used interchangeably with model. Sometimes a clear distinction between the two terms is made, in which simulations require the use of models; the model represents the key characteristics or behaviors of the selected system or process, whereas the simulation represents the evolution of the model over time. Another way to distinguish between the terms is to define simulation as experimentation with the help of a model. This definition includes time-independent simulations. Often, computers are used to execute the simulation. Simulation is used in many contexts, such as simulation of technology for performance tuning or optimizing, safety engineering, testing, training, education, and video games. Simulation is also used with scientific modelling of natural systems or human systems to gain insight into their functioning, as in economi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Device Driver
In the context of an operating system, a device driver is a computer program that operates or controls a particular type of device that is attached to a computer or automaton. A driver provides a software interface to hardware devices, enabling operating systems and other computer programs to access hardware functions without needing to know precise details about the hardware being used. A driver communicates with the device through the computer bus or communications subsystem to which the hardware connects. When a calling program invokes a routine in the driver, the driver issues commands to the device (drives it). Once the device sends data back to the driver, the driver may invoke routines in the original calling program. Drivers are hardware dependent and operating-system-specific. They usually provide the interrupt handling required for any necessary asynchronous time-dependent hardware interface. Purpose The main purpose of device drivers is to provide abstraction b ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Constraint Satisfaction Problem
Constraint satisfaction problems (CSPs) are mathematical questions defined as a set of objects whose state must satisfy a number of constraints or limitations. CSPs represent the entities in a problem as a homogeneous collection of finite constraints over variables, which is solved by constraint satisfaction methods. CSPs are the subject of research in both artificial intelligence and operations research, since the regularity in their formulation provides a common basis to analyze and solve problems of many seemingly unrelated families. CSPs often exhibit high complexity, requiring a combination of heuristics and combinatorial search methods to be solved in a reasonable time. Constraint programming (CP) is the field of research that specifically focuses on tackling these kinds of problems. Additionally, the Boolean satisfiability problem (SAT), satisfiability modulo theories (SMT), mixed integer programming (MIP) and answer set programming (ASP) are all fields of research ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Random Test Generator
Random test generators (often abbreviated RTG or ISG for Instruction Stream Generator or Instruction Sequence Generator) are a type of computer software that is used in functional verification of microprocessors. Their primary use lies in providing input stimulus to a device under test. In a simulation/ testbench verification environment, the simulator processes input created by the RTG and coverage monitors may be used to verify that the generator is properly testing the design. Random test generators range in scope from simple scripts and parameterized macros that can be created in a matter of weeks to full featured systems requiring extensive software development. Random test generators are most often created by the designing organizations. Table Based Generators Table based test generators are the simplest RTGs available. Creation of such generators can be accomplished relatively quickly, and maintenance requirements are often low. These generators work by capturing knowl ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Lint Programming Tool
Lint is the computer science term for a static code analysis tool used to flag programming errors, bugs, stylistic errors and suspicious constructs. The term originates from a Unix utility that examined C language source code. A program which performs this function is also known as a "linter" or "linting tool". History Stephen C. Johnson, a computer scientist at Bell Labs, came up with the term "lint" in 1978 while debugging the yacc grammar he was writing for C and dealing with portability issues stemming from porting Unix to a 32-bit machine. The term was borrowed from the word lint, the tiny bits of fiber and fluff shed by clothing, as the command he wrote would act like a lint trap in a clothes dryer, capturing waste fibers while leaving whole fabrics intact. In 1979, lint programming was used outside of Bell Labs for the first time, in the seventh version ( V7) of Unix. Over the years, different versions of lint have been developed for many C and C++ compilers, and wh ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
