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In computer architecture, 32-bit
32-bit
integers, memory addresses, or other data units are those that are 32 bits (4 octets) wide. Also, 32-bit
32-bit
CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 32-bit microcomputers are computers in which 32-bit
32-bit
microprocessors are the norm.

Contents

1 Range for storing integers 2 Technical history 3 Architectures 4 Applications 5 Images 6 File
File
formats 7 See also 8 References 9 External links

Range for storing integers[edit] A 32-bit
32-bit
register can store 232 different values. The range of integer values that can be stored in 32 bits depends on the integer representation used. With the two most common representations, the range is 0 through 4,294,967,295 (232 − 1) for representation as an (unsigned) binary number, and −2,147,483,648 (−231) through 2,147,483,647 (231 − 1) for representation as two's complement. One important consequence is that a processor with 32-bit
32-bit
memory addresses can directly access at most 4 GiB of byte-addressable memory (though in practice the limit may be lower). Technical history[edit] Memory, as well as other digital circuits and wiring, was expensive during the first decades of 32-bit
32-bit
architectures (the 1960s to the 1980s).[1] Older 32-bit
32-bit
processor families (or simpler, cheaper variants thereof) could therefore have many compromises and limitations in order to cut costs. This could be a 16-bit ALU, for instance, or external (or internal) buses narrower than 32 bits, limiting memory size or demanding more cycles for instruction fetch, execution or write back. Despite this, such processors could be labeled "32-bit," since they still had 32-bit
32-bit
registers and instructions able to manipulate 32-bit quantities. For example, the original Motorola 68000
Motorola 68000
had a 16-bit data ALU and a 16-bit external data bus, but had 32-bit
32-bit
registers and a 32-bit
32-bit
based instruction set. Such designs were sometimes referred to as "16/32-bit".[2] However, the opposite is often true for newer 32-bit
32-bit
designs. For example, the Pentium Pro
Pentium Pro
processor is a 32-bit
32-bit
machine, with 32-bit registers and instructions that manipulate 32-bit
32-bit
quantities, but the external address bus is 36 bits wide, giving a larger address space than 4 GB, and the external data bus is 64 bits wide, primarily in order to permit a more efficient prefetch of instructions and data.[3] Architectures[edit] Prominent 32-bit
32-bit
instruction set architectures used in general-purpose computing include the IBM System/360
IBM System/360
and IBM System/370
IBM System/370
(which had 2 4-bit
4-bit
addressing) and the System/370-XA, ESA/370, and ESA/390
ESA/390
(which had 31-bit addressing), the DEC VAX, the NS320xx, the Motorola 68000 family (the first two models of which had 2 4-bit
4-bit
addressing), the Intel
Intel
IA-32 32-bit
32-bit
version of the x86 architecture, and the 32-bit versions of the ARM,[4] SPARC, MIPS, PowerPC
PowerPC
and PA-RISC architectures. 32-bit
32-bit
instruction set architectures used for embedded computing include the 68000 family and ColdFire, x86, ARM, MIPS, PowerPC, and Infineon TriCore architectures. Applications[edit] On the x86 architecture, a 32-bit
32-bit
application normally means software that typically (not necessarily) uses the 32-bit
32-bit
linear address space (or flat memory model) possible with the 80386
80386
and later chips. In this context, the term came about because DOS, Microsoft Windows
Microsoft Windows
and OS/2[5] were originally written for the 8088/8086 or 80286, 16-bit microprocessors with a segmented address space where programs had to switch between segments to reach more than 64 kilobytes of code or data. As this is quite time-consuming in comparison to other machine operations, the performance may suffer. Furthermore, programming with segments tend to become complicated; special far and near keywords or memory models had to be used (with care), not only in assembly language but also in high level languages such as Pascal, compiled BASIC, Fortran, C, etc. The 80386
80386
and its successors fully support the 16-bit segments of the 80286 but also segments for 32-bit
32-bit
address offsets (using the new 32-bit
32-bit
width of the main registers). If the base address of all 32-bit segments is set to 0, and segment registers are not used explicitly, the segmentation can be forgotten and the processor appears as having a simple linear 32-bit
32-bit
address space. Operating systems like Windows or OS/2
OS/2
provide the possibility to run 16-bit (segmented) programs as well as 32-bit
32-bit
programs. The former possibility exists for backward compatibility and the latter is usually meant to be used for new software development. Images[edit]

A 32-bit
32-bit
floating point image of Nahal Amud
Nahal Amud
In Israel. The format allows for modification of exposure and gamma for high dynamic range results.

In digital images/pictures, 32-bit
32-bit
usually refers to RGBA color space; that is, 2 4-bit
4-bit
truecolor images with an additional 8-bit alpha channel. Other image formats also specify 32 bits per pixel, such as RGBE. In digital images, 32-bit
32-bit
sometimes refers to high-dynamic-range imaging (HDR) formats that use 32 bits per channel, a total of 96 bits per pixel. 32-bit-per-channel images are used to represent values brighter than what sRGB color space allows (brighter than white); these values can then be used to more accurately retain bright highlights when either lowering the exposure of the image or when it is seen through a dark filter or dull reflection. For example, a reflection in an oil slick is only a fraction of that seen in a mirror surface. HDR imagery allows for the reflection of highlights that can still be seen as bright white areas, instead of dull grey shapes. File
File
formats[edit] A 32-bit
32-bit
file format is a binary file format for which each elementary information is defined on 32 bits (or 4 bytes). An example of such a format is the Enhanced Metafile Format. See also[edit]

16-bit 64-bit History of video games ( 32-bit
32-bit
era) Word (data type) Physical Address Extension
Physical Address Extension
(PAE)

References[edit]

^ Patterson, David; Ditzel, David (2000). Readings in Computer Architecture. San Diego: Academic Press. p. 136. ISBN 9781558605398.  ^ "68000 users manual" (PDF).  ^ Gwennap, Linley (16 February 1995). "Intel's P6 Uses Decoupled Superscalar Design" (PDF). Microprocessor
Microprocessor
Report. Retrieved 3 December 2012.  ^ " ARM architecture
ARM architecture
overview" (PDF).  ^ There were also variants of UNIX
UNIX
for the 80286.

This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the "relicensing" terms of the GFDL, version 1.3 or later.

External links[edit]

HOW Stuff Works "How Bits and Bytes work" Ken Colburn on LockerGnome.com: 32- Bit
Bit
Vs. 64- Bit
Bit
Windows

v t e

CPU technologies

Architecture

Turing machine Post–Turing machine Universal Turing machine Quantum Turing machine Belt machine Stack machine Register machine Counter machine Pointer machine Random access machine Random access stored program machine Finite-state machine Queue automaton Von Neumann Harvard (modified) Dataflow TTA Cellular Artificial neural network

Machine learning Deep learning Neural processing unit (NPU)

Convolutional neural network Load/store architecture Register memory architecture Endianness FIFO Zero-copy NUMA HUMA HSA Mobile computing Surface computing Wearable computing Heterogeneous computing Parallel computing Concurrent computing Distributed computing Cloud computing Amorphous computing Ubiquitous computing Fabric computing Cognitive computing Unconventional computing Hypercomputation Quantum computing Adiabatic quantum computing Linear optical quantum computing Reversible computing Reverse computation Reconfigurable computing Optical computing Ternary computer Analogous computing Mechanical computing Hybrid computing Digital computing DNA computing Peptide computing Chemical computing Organic computing Wetware computing Neuromorphic computing Symmetric multiprocessing
Symmetric multiprocessing
(SMP) Asymmetric multiprocessing
Asymmetric multiprocessing
(AMP) Cache hierarchy Memory hierarchy

ISA types

ASIP CISC RISC EDGE (TRIPS) VLIW (EPIC) MISC OISC NISC ZISC Comparison

ISAs

x86 z/Architecture ARM MIPS Power Architecture
Power Architecture
(PowerPC) SPARC Mill Itanium
Itanium
(IA-64) Alpha Prism SuperH V850 Clipper VAX Unicore PA-RISC MicroBlaze RISC-V

Word size

1-bit 2-bit 4-bit 8-bit 9-bit 10-bit 12-bit 15-bit 16-bit 18-bit 22-bit 24-bit 25-bit 26-bit 27-bit 31-bit 32-bit 33-bit 34-bit 36-bit 39-bit 40-bit 48-bit 50-bit 60-bit 64-bit 128-bit 256-bit 512-bit Variable

Execution

Instruction pipelining

Bubble Operand forwarding

Out-of-order execution

Register renaming

Speculative execution

Branch predictor Memory dependence prediction

Hazards

Parallel level

Bit

Bit-serial Word

Instruction Pipelining

Scalar Superscalar

Task

Thread Process

Data

Vector

Memory

Multithreading

Temporal Simultaneous (SMT) (Hyper-threading) Speculative (SpMT) Preemptive Cooperative Clustered Multi-Thread (CMT) Hardware scout

Flynn's taxonomy

SISD SIMD
SIMD
(SWAR) SIMT MISD MIMD

SPMD

Addressing mode

CPU performance

Instructions per second (IPS) Instructions per clock (IPC) Cycles per instruction (CPI) Floating-point operations per second (FLOPS) Transactions per second (TPS) Synaptic Updates Per Second (SUPS) Performance per watt Orders of magnitude (computing) Cache performance measurement and metric

Core count

Single-core processor Multi-core processor Manycore processor

Types

Central processing unit
Central processing unit
(CPU) GPGPU AI accelerator Vision processing unit (VPU) Vector processor Barrel processor Stream processor Digital signal processor
Digital signal processor
(DSP) I/O processor/DMA controller Network processor Baseband processor Physics processing unit
Physics processing unit
(PPU) Coprocessor Secure cryptoprocessor ASIC FPGA FPOA CPLD Microcontroller Microprocessor Mobile processor Notebook processor Ultra-low-voltage processor Multi-core processor Manycore processor Tile processor Multi-chip module
Multi-chip module
(MCM) Chip stack multi-chip modules System on a chip
System on a chip
(SoC) Multiprocessor system-on-chip (MPSoC) Programmable System-on-Chip
System-on-Chip
(PSoC) Network on a chip (NoC)

Components

Execution unit (EU) Arithmetic logic unit
Arithmetic logic unit
(ALU) Address generation unit
Address generation unit
(AGU) Floating-point unit
Floating-point unit
(FPU) Load-store unit (LSU) Branch predictor Unified Reservation Station Barrel shifter Uncore Sum addressed decoder (SAD) Front-side bus Back-side bus Northbridge (computing) Southbridge (computing) Adder (electronics) Binary multiplier Binary decoder Address decoder Multiplexer Demultiplexer Registers Cache Memory management unit
Memory management unit
(MMU) Input–output memory management unit
Input–output memory management unit
(IOMMU) Integrated Memory Controller (IMC) Power Management Unit (PMU) Translation lookaside buffer
Translation lookaside buffer
(TLB) Stack engine Register file Processor register Hardware register Memory buffer register (MBR) Program counter Microcode
Microcode
ROM Datapath Control unit Instruction unit Re-order buffer Data buffer Write buffer Coprocessor Electronic switch Electronic circuit Integrated circuit Three-dimensional integrated circuit Boolean circuit Digital circuit Analog circuit Mixed-signal integrated circuit Power management integrated circuit Quantum circuit Logic gate

Combinational logic Sequential logic Emitter-coupled logic
Emitter-coupled logic
(ECL) Transistor–transistor logic
Transistor–transistor logic
(TTL) Glue logic

Quantum gate Gate array Counter (digital) Bus (computing) Semiconductor device Clock rate CPU multiplier Vision chip Memristor

Power management

APM ACPI Dynamic frequency scaling Dynamic voltage scaling Clock gating

Hardware security

Non-executable memory (NX bit) Memory Protection Extensions ( Intel
Intel
MPX) Intel
Intel
Secure Key Hardware restriction (firmware) Software
Software
Guard Extensions ( Intel
Intel
SGX) Trusted Execution Technology Trusted Platform Module
Trusted Platform Module
(TPM) Secure cryptoprocessor Hardware security module Hengzhi chip

Related

History of ge

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