The PowerPC e500 is a

32-bit In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32-bit units. Compared to smaller bit widths, 32-bit computers can perform large calculation ...

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...

core Core or cores may refer to: Science and technology * Core (anatomy), everything except the appendages * Core (manufacturing), used in casting and molding * Core (optical fiber), the signal-carrying portion of an optical fiber * Core, the centra ...

from

Freescale Semiconductor Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embe ...

. The core is compatible with the older PowerPC Book E specification as well as the Power ISA v.2.03. It has a dual issue, seven-stage

pipeline Pipeline may refer to: Electronics, computers and computing * Pipeline (computing), a chain of data-processing stages or a CPU optimization found on ** Instruction pipelining, a technique for implementing instruction-level parallelism within a s ...

with FPUs (from version 2 onwards), 32/32 KiB data and instruction L1

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s and 256, 512 or 1024 KiB L2 frontside cache. Speeds range from 533 MHz up to 1.5 GHz, and the core is designed to be highly configurable and meet the specific needs of embedded applications with features like multi-core operation interface for auxiliary application processing units (APU). e500 powers the high-performance PowerQUICC III

system on a chip A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...

(SoC) network processors and they all share a common naming scheme, ''MPC85xx''. Freescale's new

QorIQ QorIQ is a brand of ARM-based and Power ISA-based communications microprocessors from NXP Semiconductors (formerly Freescale). It is the evolutionary step from the PowerQUICC platform, and initial products were built around one or more e500mc ...

is the evolutionary step from PowerQUICC III and will also be based on e500 cores.

Versions

There are three versions of the e500 core, namely the original ''e500v1'', the ''e500v2'' and the ''e500mc''. A 64-bit evolution of the e500mc core is called the e5500 core and was introduced in 2010, and a subsequent e6500 core added multithreading capabilities in 2012.

e500v1

*Support for the SPE (Signal Processing Engine) extensions. The integer register file is extended to a width of 64-bits. The non-SPE instructions only access and write to the low 32-bits. However the SIMD SPE instructions read and write from the full 64-bits. These extensions overlap with the string and AltiVec instructions. *Support for SPESFP (Single Precision Embedded Scalar Floating Point). This is a new floating point unit that is distinct from the classic FPU, the latter of which is lacking in e500v1 and e500v2. SPESFP uses the integer register file. It is not completely IEEE754 compliant.

e500v2

Key improvements in the e500v2 over the e500v1 include: * Increase from 32-bit (4 GiB) to 36-bit (64 GiB) physical address space. This change means that e500v2-based devices often use a more advanced

board support package In embedded systems, a board support package (BSP) is the layer of software containing hardware-specific boot firmware and device drivers and other routines that allow a given embedded operating system, for example a real-time operating system ( ...

(BSP) than e500v1-based devices, as various peripheral units have moved to physical addresses higher than 4 GiB. * Addition of 1 GiB and 4 GiB variable-page sizes * Addition of DPESFP (double-precision embedded scalar floating point) support. Building on top of SPESFP, these instructions access both halves of the 64-bit integer register. * Doubling in size and associativity of the MMU's second-level 4K-page array (from 256-entry 2-way to 512-entry 4-way) * Increase from 3 to 5 maximum outstanding data cache misses * Addition of the Alternate Time Base for cycle-granularity timestamps

e500mc

Freescale introduced the ''e500mc'' in the

family of chips in June 2008. The e500mc has the following features: * Power ISA v.2.06, which includes

hypervisor A hypervisor (also known as a virtual machine monitor, VMM, or virtualizer) is a type of computer software, firmware or hardware that creates and runs virtual machines. A computer on which a hypervisor runs one or more virtual machines is calle ...

and

virtualization In computing, virtualization or virtualisation (sometimes abbreviated v12n, a numeronym) is the act of creating a virtual (rather than actual) version of something at the same abstraction level, including virtual computer hardware platforms, stor ...

functionality for embedded platforms. * The "classic" floating-point unit has been reinstated. * SPE, SPESFP, and DPESFP are all removed, and the integer register file is back to 32 bits. * Support anything from two to more than 32 cores (not necessarily the same type of cores) on a single chip. * Supports the ''CoreNet'' communications fabric for connecting cores and datapath accelerators. * e500mc cores have private L2 caches but typically share other facilities like L3 caches, memory controllers, application specific acceleration cores, I/O and such.

Applications

PowerQUICC

All

PowerQUICC PowerQUICC is the name for several PowerPC- and Power ISA-based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the Communications Processor Module ( QUICC Engine) which is a separate RISC core sp ...

85xx devices are based on e500v1 or e500v2 cores, most of them on the latter.

QorIQ

In June 2008 Freescale announced the

brand, microprocessors based on the e500 family of cores.

Software

free and open source software Free and open-source software (FOSS) is a term used to refer to groups of software consisting of both free software and open-source software where anyone is freely licensed to use, copy, study, and change the software in any way, and the source ...

, the e500/MPC85xx family (minus the e500mc, which has no SPE) is generally known as "PPC SPE" (powerpcspe), with the EABI known as "eabispe". Both GCC (before version 9) and

LLVM LLVM is a set of compiler and toolchain technologies that can be used to develop a front end for any programming language and a back end for any instruction set architecture. LLVM is designed around a language-independent intermediate repre ...

offer support for compiling to this platform, and

QEMU QEMU is a free and open-source emulator (Quick EMUlator). It emulates the machine's central processing unit, processor through dynamic binary translation and provides a set of different hardware and device models for the machine, enabling it t ...

provides emulation.

Debian Debian (), also known as Debian GNU/Linux, is a Linux distribution composed of free and open-source software, developed by the community-supported Debian Project, which was established by Ian Murdock on August 16, 1993. The first version of D ...

offered an unofficial port for the e500v2.https://wiki.debian.org/PowerPCSPEPort#Architecture_summary

References

Freescale's PowerQUICC page

Freescale's PowerPC e500 Core Family Reference Manual
{{Motorola processors E500 E500 Power microprocessors