The

Itanium Itanium ( ) is a discontinued family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Launched in June 2001, Intel marketed the processors for enterprise servers and high-performance computin ...

from

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...

is a high-end

server Server may refer to: Computing *Server (computing), a computer program or a device that provides functionality for other programs or devices, called clients Role * Waiting staff, those who work at a restaurant or a bar attending customers and su ...

and

supercomputer A supercomputer is a computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second ( FLOPS) instead of million instructions ...

microprocessor.

Itanium (2001)

Merced (180 nm)

Steppings: C0, C1 and C2.

CPUID In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from CPU IDentification) allowing software to discover details of the processor. It was introduced by Intel i ...

: 0007000604h (stepping C0), 0007000704h (stepping C1) or 0007000804h (stepping C2). Transistor count: 25.4 million for CPU, 295 million for the external L3 cache. The FSB data bus is 64 bits wide, not 128 like in Itanium 2.

Itanium 2 (2002-2007)

Itanium 2 uses socket

PAC611 Socket PAC611 is a 611 pin microprocessor socket designed to interface an Intel Itanium 2 processor to the rest of the computer (usually via the motherboard). It provides both an electrical interface as well as physical support. This socket is de ...

with a 128 bit wide FSB. The 90 nm CPUs (9000 and 9100 series) bring dual-core chips and an updated microarchitecture adding multithreading and splitting the L2 cache into a 256 KB data cache and 1 MB instruction cache per core (the pre-9000 series L2 cache being a 256 KB common cache). All Itaniums except some 130 nm models are capable of >2-socket SMP.

McKinley (180 nm)

Stepping: B3. Die size: 421 mm². Transistor count: 221 million.

: 001F000704h

Madison (130 nm)

Stepping: B1. Die size: 374 mm². Transistor count: 410 million.

: 001F010504h.
The Madison 9M table contains the 4MB and 6MB successors of the first Madisons.

Deerfield

The same chip as Madison, but at a lower voltage.

Madison 9M (130 nm)

Steppings: A1 and A2. Die size: 432 mm². Transistor count: 592 million.

: 001F020104h (stepping A1) or 001F020204h (stepping A2).
9M is the chip of all the third generation Itanium 2s, irrespective of the amount of enabled cache.

Fanwood

The same chip as Madison 9M, but restricted to 2-socket and uniprocessor systems.

HP mx2 MCM (130 nm)

This

multi-chip module A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are int ...

codenamed Hondo is not an Intel product, but a separate project of Hewlett-Packard to pack two CPUs onto one

socket. The S-Spec SL75Z was assigned to the chips that Intel sent to HP for use in mx2.

Montecito (90 nm)

Steppings: C1 and C2. Die size: 596 mm². Transistor count: 1720 million.

: 0020000504h (stepping C1) or 0020000704h (stepping C2).
All processors can support the legacy 400 MT/s FSB. From Montecito onwards all Itaniums are MP-capable.

Montvale (90 nm)

The chip is similar to Montecito, but the stepping is A1 and the

is 0020010104h. The models with 533 MT/s FSB also support 400 MT/s FSB operation. The processors with the ''Core level Lock-Step'' error correction feature were released only in 2008. Even though Intel does not use the "Itanium 2" branding for the 9100-series, it's still grouped with Itanium 2 processors because it uses the same platform and is a minor update on the 9000-series.

Itanium (2007–2019)

These later generations of Itanium use socket

LGA 1248 LGA 1248 is an Intel CPU Socket for Itanium processors from the 9300-series to the 9700-series. It replaces PAC611 (also known as PPGA661) used by Itanium 9100-series processors and adds Intel QuickPath Interconnect functionalities. See also * L ...

, the

QuickPath Interconnect The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008. It increased the scalability and availab ...

and Scalable Memory Interconnect having replaced the Front-Side Bus used by Itanium 2.

Tukwila (65 nm)

Stepping: E0. Die size: 699 mm². Transistor count: 2046 million.

: 0020020404.
All models support: XD bit (an

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...

implementation),

Hyper-threading Hyper-threading (officially called Hyper-Threading Technology or HT Technology and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multip ...

Turbo Boost Intel Turbo Boost is Intel's trade name for central processing units (CPUs) dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher resulting ...

, VT-i2 (Itanium Virtualization technology),

Intel VT-d x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...

, RAS with Advanced Machine Check Architecture, Cache Safe technology, Enhanced Demand Based Switching, ECC, two memory controllers each with two SMI links to memory buffers for DDR3, for a combined memory bandwidth of 34 GB/s and capacity of 256 GB. The QPI bandwidth is 96 GB/s for cache coherency and 24 GB/s for I/O. * *

Poulson (32 nm)

Stepping: D0. Die size: 544 mm². Transistor count: 3.1 billion.

: 0021000404.
All models support: Itanium New Instructions, XD bit (an

implementation),

Intel VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-as ...

, VT-i3 (Itanium Virtualization technology),

(with Dual-Domain Multithreading), Turbo Boost, Enhanced Intel

SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dynami ...

Technology (EIST), Cache-Safe technology, RAS with Advanced Machine Check Architecture, Instruction Replay technology, ECC, two memory controllers each with two SMI links to memory buffers for DDR3, for a combined memory bandwidth of 45 GB/s and capacity of 512 GB. The QPI bandwidth is 128 GB/s for cache coherency and 32 GB/s for I/O.

Kittson (32 nm)

The 9700 series, despite nominally having a different stepping (E0 with

0021000504), is functionally identical with the 9500 series, even having exactly the same bugs, the only difference being the 133 MHz higher frequency of 9760 and 9750 over 9560 and 9550 respectively. Intel had committed to at least one more generation after Poulson, first mentioning Kittson on 14 June 2007. Kittson was supposed to be on a 22 nm process and use the same

LGA2011 LGA 2011, also called ''Socket R'', is a CPU socket by Intel released on November 14, 2011. It launched along with LGA 1356 to replace its predecessor, LGA 1366 (Socket B) and LGA 1567. While LGA 1356 was designed for dual-processor or ...

socket and platform as

Xeon Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same arc ...

s. On 31 January 2013 Intel issued an update to their plans for Kittson: it would have the same

LGA1248 LGA 1248 is an Intel CPU Socket for Itanium processors from the 9300-series to the 9700-series. It replaces PAC611 (also known as PPGA661) used by Itanium 9100-series processors and adds Intel QuickPath Interconnect functionalities. See also * ...

socket and 32 nm process as Poulson, effectively halting any further development of Itanium processors.

References

{{Intel processors} *Itanium

Intel Itanium Itanium ( ) is a discontinued family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Launched in June 2001, Intel marketed the processors for enterprise servers and high-performance computin ...

Very long instruction word computing