The electric circuit extraction or simply circuit extraction, also netlist extraction, is the translation of an
integrated circuit layout
Integrated circuit layout, also known IC layout, IC mask layout, or mask design, is the representation of an integrated circuit in terms of planar geometric shapes which correspond to the patterns of metal, oxide, or semiconductor layers that make ...
back into the
electrical circuit (
netlist
In electronic design, a netlist is a description of the connectivity of an electronic circuit. In its simplest form, a netlist consists of a list of the electronic components in a circuit and a list of the nodes they are connected to. A network ...
) it is intended to represent. This extracted circuit is needed for various purposes including
circuit simulation Electronic circuit simulation uses mathematical models to replicate the behavior of an actual electronic device or circuit.
Simulation software allows for modeling of circuit operation and is an invaluable analysis tool. Due to its highly accurat ...
,
static timing analysis,
signal integrity,
power analysis and optimization, and
logic to layout comparison. Each of these functions require a slightly different representation of the circuit, resulting in the need for multiple layout extractions. In addition, there may be a postprocessing step of converting the device-level circuit into a purely
digital circuit, but this is not considered part of the extraction process.
The detailed functionality of an extraction process will depend on its system environment. The simplest form of extracted circuit may be in the form of a netlist, which is formatted for a particular simulator or analysis program. A more complex extraction may involve writing the extracted circuit back into the original database containing the physical layout and the logic diagram. In this case, by associating the extracted circuit with the layout and the logic network, the user can cross-reference any point in the circuit to its equivalent points in the logic and layout (cross-probing). For simulation or analysis, various formats of netlist can then be generated using programs that read the database and generate the appropriate text information.
In extraction, it is often helpful to make an (informal) distinction between ''designed devices'', which are devices that are deliberately created by the designer, and ''parasitic devices'', which were not explicitly intended by the designer but are inherent in the layout of the circuit.
Primarily there are three different parts to the extraction process. These are designed device extraction, interconnect extraction, and parasitic device extraction. These parts are inter-related since various device extractions can change the connectivity of the circuit, e.g., resistors (whether designed or parasitic) convert single nets into multiple electrical nodes. Usually one level of interconnect extraction is used with designed device extraction to provide a circuit for simulation or gate-level reduction, and a second level of interconnect extraction is used with parasitic device extraction to provide a circuit for timing analysis.
See also
*
Electromagnetic field solver
References
''Electronic Design Automation For Integrated Circuits Handbook'', by Lavagno, Martin and Scheffer, ( {{ISBN, 0-8493-3096-3 ) A survey of the field of
electronic design automation. This summary was derived, with permission, from Volume II, Chapter 22, ''Layout Extraction'', by William Kao, Chi-Yuan Lo, Mark Basel, Raminderpal Singh, Peter Spink, and Lou Scheffer.
Electronic engineering
Electronic design
Integrated circuits
Electronic design automation