Joseph A "Josh" Fisher is an American and Spanish

computer scientist A computer scientist is a person who is trained in the academic study of computer science. Computer scientists typically work on the theoretical side of computation, as opposed to the hardware side on which computer engineers mainly focus (al ...

noted for his work on

VLIW Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP). Whereas conventional central processing units (CPU, processor) mostly allow programs to specify instructions to exe ...

architectures,

compiling In computing, a compiler is a computer program that translates computer code written in one programming language (the ''source'' language) into another language (the ''target'' language). The name "compiler" is primarily used for programs that ...

, and

instruction-level parallelism Instruction-level parallelism (ILP) is the parallel or simultaneous execution of a sequence of instructions in a computer program. More specifically ILP refers to the average number of instructions run per step of this parallel execution. Discu ...

, and for the founding of Multiflow Computer. He is a

Hewlett-Packard The Hewlett-Packard Company, commonly shortened to Hewlett-Packard ( ) or HP, was an American multinational information technology company headquartered in Palo Alto, California. HP developed and provided a wide variety of hardware components ...

Senior Fellow (Emeritus).Hewlett-Packard Senior Fellow Biography

Biography

Fisher holds a BA (1968) in mathematics (with honors) from

New York University New York University (NYU) is a private research university in New York City. Chartered in 1831 by the New York State Legislature, NYU was founded by a group of New Yorkers led by then-Secretary of the Treasury Albert Gallatin. In 1832, the ...

and obtained a

Master's A master's degree (from Latin ) is an academic degree awarded by universities or colleges upon completion of a course of study demonstrating mastery or a high-order overview of a specific field of study or area of professional practice.

and PhD degree (1979) in Computer Science from The Courant Institute of Mathematics of New York University. Fisher joined the Yale University Department of Computer Science in 1979 as an assistant professor, and was promoted to associate professor in 1983. In 1984 Fisher left Yale to found Multiflow Computer with Yale colleagues John O'Donnell and John Ruttenberg. Fisher joined

HP Labs HP Labs is the exploratory and advanced research group for HP Inc. HP Labs' headquarters is in Palo Alto, California and the group has research and development facilities in Bristol, UK. The development of programmable desktop calculators, ink ...

upon the closing of Multiflow in 1990. He directed HP Labs in Cambridge, MA USA from its founding in 1994, and became an HP Fellow (2000) and then Senior Fellow (2002) upon the inception of those titles at Hewlett-Packard. Fisher retired from HP Labs in 2006. Fisher is married (1967) to Elizabeth Fisher; they have a son, David Fisher, and a daughter, Dora Fisher.http://www.MultiflowTheBook.com Multiflow Computer: A Startup Odyssey. He holds Spanish citizenship due to his

Sephardic Sephardic (or Sephardi) Jews (, ; lad, Djudíos Sefardíes), also ''Sepharadim'' , Modern Hebrew: ''Sfaradim'', Tiberian Hebrew, Tiberian: Səp̄āraddîm, also , ''Ye'hude Sepharad'', lit. "The Jews of Spain", es, Judíos sefardíes (or ), ...

heritage.

Work

Trace Scheduling

In his Ph.D. dissertation, Fisher created the

Trace Scheduling Trace scheduling is an optimization technique developed by Josh Fisher used in compilers for computer programs. A compiler often can, by rearranging its generated machine instructions for faster execution, improve program performance. It increase ...

compiler algorithm and coined the term

Instruction-level parallelism Instruction-level parallelism (ILP) is the parallel or simultaneous execution of a sequence of instructions in a computer program. More specifically ILP refers to the average number of instructions run per step of this parallel execution. Discu ...

to characterize VLIW,

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

dataflow In computing, dataflow is a broad concept, which has various meanings depending on the application and context. In the context of software architecture, data flow relates to stream processing or reactive programming. Software architecture Dataf ...

and other architecture styles that involve fine-grained parallelism among simple machine-level instructions. Trace scheduling was the first practical algorithm to find large amounts of parallelism between instructions that occupied different

basic block In compiler construction, a basic block is a straight-line code sequence with no branches in except to the entry and no branches out except at the exit. This restricted form makes a basic block highly amenable to analysis. Compilers usually deco ...

s. This greatly increased the potential speed-up for instruction-level parallel architectures.

The VLIW architecture style

Because of the difficulty of applying trace scheduling to idiosyncratic systems (such as 1970s-era DSPs) that in theory should have been suitable targets for a trace scheduling compiler, Fisher put forward the VLIW architectural style. VLIWs are normal computers, designed to run compiled code and used like ordinary computers, but offering large amounts of instruction-level parallelism scheduled by a trace scheduling or similar compiler. VLIWs are now used extensively, especially in embedded systems. The most popular VLIW cores have sold in quantities of several billion processors. The ST231. The ST231 is rumored to have been sold in quantities upwards of 1 billion cores, used mostly in digital video.

Multiflow Computer

Multiflow was founded to commercialize trace scheduling and VLIW architectures, then widely thought to be impractical. Multiflow's technical success and the dissemination of its technology and people had a great effect on the future of computer science and the computer industry.

Awards and honors

* 1984 NSF Presidential Young Investigator's Award. (This award was meant to persuade promising faculty to stay at universities; financial grant to Yale University declined due to Fisher's leaving to start Multiflow.) * 1987 Eli Whitney Connecticut Entrepreneur of the Year. * 2003

Eckert–Mauchly Award The Eckert–Mauchly Award recognizes contributions to digital systems and computer architecture. It is known as the computer architecture community’s most prestigious award. First awarded in 1979, it was named for John Presper Eckert and Jo ...

given by The

IEEE Computer Society The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operati ...

and The

Association for Computing Machinery The Association for Computing Machinery (ACM) is a US-based international learned society for computing. It was founded in 1947 and is the world's largest scientific and educational computing society. The ACM is a non-profit professional member ...

, ''in recognition of 25 years of seminal contributions to instruction-level parallelism, pioneering work on VLIW architectures, and the formulation of the Trace Scheduling compilation technique''. The Eckert-Mauchly is known as the computer architecture community's highest award. * 2012 B. Ramakrishna Rau Award given by The

''for the development of trace scheduling compilation and pioneering work in VLIW (Very Long Instruction Word) architectures''.

Writings

* Joseph A Fisher, Paolo Farabochi and Cliff Young
''Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools''.
Elsevier/Morgan Kaufmann, 2004. * Joseph A Fisher
''Trace Scheduling: A Technique for Global Microcode Compaction''
IEEE Trans. Computers, 30(7):478-490, 1981. * Joseph A. Fisher
''Very Long Instruction Word architectures and the ELI-512''
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture, Pages 140–150, ACM, New York, NY, USA. Retrospective, ''25 Years of ISCA'', ACM, 1998. * Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, Alexandru Nicolau
''Parallel Processing: A Smart Compiler and a Dumb Machine''
Symp. Compiler Construction, 1984: 37–47. Retrospective, ''Best of PLDI'', ACM SIGPLAN Notices, 39(4):112, 2003. * B. Ramakrishna Rau, Joseph A. Fisher
''Instruction-level parallel processing: history, overview, and perspective''
The Journal of Supercomputing - Special issue on instruction-level parallelism, Volume 7 Issue 1–2, May 1993. Also published by Kluwer Academic Publishers Hingham, MA, USA.

References

External links

* Elizabeth Fisher
''Multiflow Computer: A Startup Odyssey''
CreateSpace, 2013. * IEEE
''The VLIW Architecture of Joseph A. Fisher, Part 1''
Solid-State Circuits Magazine, IEEE, 2009, Volume: 1, Issue: 2. Als
''Part 2''
{{DEFAULTSORT:Fisher, Josh American computer scientists Spanish computer scientists Computer designers People from the Bronx Living people 1946 births Yale University faculty Hewlett-Packard people Computer science writers Scientists from the Bronx