Globally asynchronous locally synchronous (GALS), in

electronics The field of electronics is a branch of physics and electrical engineering that deals with the emission, behaviour and effects of electrons using electronic devices. Electronics uses active devices to control electron flow by amplification ...

, is an architecture for

designing A design is a plan or specification for the construction of an object or system or for the implementation of an activity or process or the result of that plan or specification in the form of a prototype, product, or process. The verb ''to design'' ...

electronic circuits which addresses the problem of safe and reliable

data transfer Data transmission and data reception or, more broadly, data communication or digital communications is the transfer and reception of data in the form of a digital bitstream or a digitized analog signal transmitted over a point-to-point or ...

between independent

clock domain In electronics, metastability is the ability of a digital electronic system to persist for an unbounded time in an unstable equilibrium or metastable state. In digital logic circuits, a digital signal is required to be within certain voltage or ...

s. GALS is a

model of computation In computer science, and more specifically in computability theory and computational complexity theory, a model of computation is a model which describes how an output of a mathematical function is computed given an input. A model describes how ...

that emerged in the 1980s. It allows to design computer systems consisting of several synchronous islands (using synchronous programming for each such island) interacting with other islands using

asynchronous communication In telecommunications, asynchronous communication is transmission of data, generally without the use of an external clock signal, where data can be transmitted intermittently rather than in a steady stream. Any timing required to recover data f ...

, e.g. with FIFOs.

Details

A GALS circuit consists of a set of locally synchronous modules communicating with each other via asynchronous wrappers. Each synchronous subsystem ("clock domain") can run on its own independent clock (frequency). Advantages include much lower electromagnetic interference (EMI). The CMOS circuit (logic gates) requires relatively large supply current when changing state from 0 to 1. These changes are aggregated for

synchronous circuit In digital electronics, a synchronous circuit is a digital circuit in which the changes in the state of memory elements are synchronized by a clock signal. In a sequential digital logic circuit, data are stored in memory devices called flip-f ...

as most changes are initialised by an active clock edge. Therefore, large spikes on supply current occur at active clock edges. These spikes can cause large electromagnetic interference, and may lead to circuit

malfunction A malfunction is a state in which something functions incorrectly or is obstructed from functioning at all. Some types of malfunctions are: * Malfunction (parachuting), malfunction of a parachute * Sexual malfunction, also called "sexual dysfunc ...

. In order to limit these spikes large number of decoupling capacitors are used. Another solution is to use a GALS design style, i.e. design (locally) is synchronous (thus easier to be designed than

asynchronous circuit Asynchronous circuit (clockless or self-timed circuit) is a sequential digital logic circuit that does not use a global clock circuit or signal generator to synchronize its components. Instead, the components are driven by a handshaking circui ...

) but globally asynchronous, i.e. there are different (e.g. phase shifted, rising and falling active edge) clock signal regimes thus supply current spikes do not aggregate at the same time. Consequently, GALS design style is often used in system on a chip (SoC).Zhoukun WANG and Omar HAMMAMI. "A 24 Processors System on Chip FPGA Design with Network on Chip"

/ref> It is especially used in

network on a chip A network on a chip or network-on-chip (NoC or )This article uses the convention that "NoC" is pronounced . Therefore, it uses the convention "a" for the indefinite article corresponding to NoC ("a NoC"). Other sources may pronounce it as a ...

(NoC) architectures for SoCs. Some larger GALS circuits contain multiple CPUs. Generally each CPU in such an asynchronous array of simple processors has its own independent oscillator. That oscillator can be halted when there's no work for its CPU to do. In some cases each CPU is further divided into smaller modules, each with their own independent clock, or in a few cases no clock at all ().

References

General

*
Dataflow Architectures for GALS
{{DEFAULTSORT:Globally Asynchronous Locally Synchronous Synchronization Digital circuits

Details

See also

References

General