The 9S08 (68HCS08 or S08 for short) is a

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(µC) family originally produced by

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, later by

Freescale Semiconductor Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embe ...

, and currently by NXP, descended from the

Motorola 6800 The 6800 ("''sixty-eight hundred''") is an 8-bit microprocessor designed and first manufactured by Motorola in 1974. The MC6800 microprocessor was part of the M6800 Microcomputer System (latter dubbed ''68xx'') that also included serial and paral ...

microprocessor. It is a CISC microcontroller. A slightly extended variant of the 68HC08, it shares upward compatibility with the aging 68HC05 microcontrollers, and is found in almost any type of embedded systems. The larger members offer up to 128 KiB of flash, and 8 KiB of RAM via a simple MMU which allows bank-switching 16 KiB of the address space and an address/data register pair which allows data fetches from any address. The paging scheme used allows for a theoretical maximum of 4MB of flash. MMU equipped variants offer two extra CPU instructions, CALL and RTC, which are used instead of JSR and RTS respectively when dealing with subroutines placed in paged memory, allowing direct page-to-page subroutine calls. In a single atomic operation, CALL saves and RTC restores not only the PC but also one extra address byte, the PPAGE (program page) byte. Because of this extra byte, and to also keep the stack balanced, a subroutine ending with RTC must always be called with CALL, even if it resides in the same memory page. Internally, the 9S08

instruction set In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called a ...

is upward compatible with the 6805, with the addition of

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indexed addressing modes. (Instructions using the SP register have

opcode In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the opera ...

s prefixed with the byte 0x9E). It has a single eight-bit accumulator, A, one sixteen-bit index register, HX (whose lower half, X, is used in isolation by 6805-compatible instructions), a condition code register, a 16-bit stack pointer, and a program counter. For compatibility with the 6805 which does not have an H register, the most significant byte of the HX register, H, is cleared during reset, and H is the only register not stacked automatically when entering any ISR ( Interrupt Service Routine). Unlike the 6805, the stack can be placed anywhere in memory using appropriate instructions. The standard method of programming or debugging the 9S08 family is via a standard 6-pin BDM interface (only one pin is used for communication with the microcontroller). A wide variety of peripherals is available for different members and/or packages. SCI, SPI, 8/10/12-bit A/D, (C)PWM, Input Captures, and Output Compares are common with most members, but no external bus is available. Some members come with a built-in CAN controller.

Compiler support

The S08 is partly supported (e.g., no MMU support) by the free C compiler SDCC and fully by CodeWarrior.

References

External links

HCS08/9S08 Processor Families

Example assembly language code written for ASM8
{{Motorola microcontrollers Motorola microcontrollers Freescale Semiconductor microcontrollers NXP Semiconductors microcontrollers