In
electronic design automation
Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing Electronics, electronic systems such as integrated circuits and printed circuit boards. The tools wo ...
, a design rule is a geometric constraint imposed on
circuit board
A printed circuit board (PCB; also printed wiring board or PWB) is a medium used in Electrical engineering, electrical and electronic engineering to connect electronic components to one another in a controlled manner. It takes the form of a L ...
,
semiconductor device
A semiconductor device is an electronic component that relies on the electronic properties of a semiconductor material (primarily silicon, germanium, and gallium arsenide, as well as organic semiconductors) for its function. Its conductivity li ...
, and
integrated circuit
An integrated circuit or monolithic integrated circuit (also referred to as an IC, a chip, or a microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material, usually silicon. Large numbers of tiny ...
(IC) designers to ensure their designs function properly, reliably, and can be produced with acceptable yield. Design rules for production are developed by process engineers based on the capability of their processes to realize design intent.
Electronic design automation
Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing Electronics, electronic systems such as integrated circuits and printed circuit boards. The tools wo ...
is used extensively to ensure that designers do not violate design rules; a process called design rule checking (DRC). DRC is a major step during
physical verification
Physical verification is a process whereby an integrated circuit layout (IC layout) design is verified via EDA software tools to ensure correct electrical and logical functionality and manufacturability. Verification involves design rule check ( ...
signoff on the design, which also involves LVS (
layout versus schematic
The Layout Versus Schematic (LVS) is the class of electronic design automation (EDA) verification software that determines whether a particular integrated circuit layout corresponds to the original schematic or circuit diagram of the design.
Back ...
) checks, XOR checks, ERC (
electrical rule check), and antenna checks. The importance of design rules and DRC is greatest for ICs, which have micro- or nano-scale geometries; for advanced processes, some fabs also insist upon the use of more
restricted rules to improve yield.
Design rules
Design rules are a series of parameters provided by
semiconductor manufacturer
The semiconductor industry is the aggregate of companies engaged in the design and fabrication of semiconductors and semiconductor devices, such as transistors and integrated circuits. It formed around 1960, once the fabrication of semiconduct ...
s that enable the designer to verify the correctness of a
mask set
A photomask is an opaque plate with holes or transparencies that allow light to shine through in a defined pattern. They are commonly used in photolithography and the production of integrated circuits (ICs or "chips") in particular. Masks are used ...
. Design rules are specific to a particular semiconductor manufacturing process. A design rule set specifies certain geometric and connectivity restrictions to ensure sufficient margins to account for variability in semiconductor manufacturing processes, so as to ensure that most of the parts work correctly.
The most basic design rules are shown in the diagram on the right. The first are single layer rules. A ''width'' rule specifies the minimum width of any shape in the design. A ''spacing'' rule specifies the minimum distance between two adjacent objects. These rules will exist for each layer of semiconductor manufacturing process, with the lowest layers having the smallest rules (typically 100 nm as of 2007) and the highest metal layers having larger rules (perhaps 400 nm as of 2007).
A two layer rule specifies a relationship that must exist between two layers. For example, an ''enclosure'' rule might specify that an object of one type, such as a contact or via, must be covered, with some additional margin, by a metal layer. A typical value as of 2007 might be about 10 nm.
There are many other rule types not illustrated here. A ''minimum area'' rule is just what the name implies.
Antenna rules are complex rules that check ratios of areas of every layer of a net for configurations that can result in problems when intermediate layers are etched. Many other such rules exist and are explained in detail in the documentation provided by the semiconductor manufacturer.
Academic design rules are often specified in terms of a scalable parameter, λ, so that all geometric tolerances in a design may be defined as integer multiples of λ. This simplifies the migration of existing chip layouts to newer processes. Industrial rules are more highly optimized, and only approximate uniform scaling. Design rule sets have become increasingly more complex with each subsequent generation of semiconductor process.
Software
The main objective of design rule checking (DRC) is to achieve a high overall yield and reliability for the design. If design rules are violated the design may not be functional. To meet this goal of improving die yields, DRC has evolved from simple measurement and Boolean checks, to more involved rules that modify existing features, insert new features, and check the entire design for process limitations such as layer density. A completed layout consists not only of the geometric representation of the design, but also data that provides support for the manufacture of the design. While design rule checks do not validate that the design will operate correctly, they are constructed to verify that the structure meets the process constraints for a given design type and process technology.
DRC software usually takes as input a layout in the
GDSII
GDSII stream format (GDSII), is a binary database file format which is the de facto industry standard for Electronic Design Automation data exchange of integrated circuit or IC layout artwork. It is a binary file format representing planar geome ...
standard format and a list of rules specific to the semiconductor process chosen for fabrication. From these it produces a report of design rule violations that the designer may or may not choose to correct. Carefully "stretching" or waiving certain design rules is often used to increase performance and component density at the expense of yield.
DRC products define rules in a
language
Language is a structured system of communication. The structure of a language is its grammar and the free components are its vocabulary. Languages are the primary means by which humans communicate, and may be conveyed through a variety of met ...
to describe the operations needed to be performed in DRC. For example, Mentor Graphics uses
Standard Verification Rule Format
In electronic design automation, a design rule is a geometric constraint imposed on circuit board, semiconductor device, and integrated circuit (IC) designers to ensure their designs function properly, reliably, and can be produced with accept ...
(SVRF) language in their DRC rules files and Magma Design Automation is using
Tcl
TCL or Tcl or TCLs may refer to:
Business
* TCL Technology, a Chinese consumer electronics and appliance company
**TCL Electronics, a subsidiary of TCL Technology
* Texas Collegiate League, a collegiate baseball league
* Trade Centre Limited ...
-based language. A set of rules for a particular process is referred to as a run-set, rule deck, or just a deck.
DRC is a very computationally intense task. Usually DRC checks will be run on each sub-section of the ASIC to minimize the number of errors that are detected at the top level. If run on a single CPU, customers may have to wait up to a week to get the result of a Design Rule check for modern designs. Most design companies require DRC to run in less than a day to achieve reasonable cycle times since the DRC will likely be run several times prior to design completion. With today's processing power, full-chip DRC's may run in much shorter times as quick as one hour depending on the chip complexity and size.
Some example of DRC's in IC design include:
*Active to active spacing
*Well to well spacing
*Minimum channel length of the transistor
*Minimum metal width
*Metal to metal spacing
*Metal fill density (for processes using CMP)
*Poly density
*ESD and I/O rules
*
Antenna effect
The antenna effect, more formally plasma induced gate oxide damage, is an effect that can potentially cause yield and reliability problems during the manufacture of MOS integrated circuits. Factories (''fabs'') normally supply antenna rules, wh ...
Commercial
Major products in the ''DRC'' area of ''EDA'' include:
* ''
Altium Designer
Altium Designer (AD) is a PCB and electronic design automation software package for printed circuit boards. It is developed by Australian software company Altium Limited.
History
Altium Designer was originally launched in 2005 by Altium, ...
''
* ''
Advanced Design System
Advanced Design System (ADS) is an electronic design automation software system produced by PathWave Design, a division of Keysight Technologies. It provides an integrated design environment to designers of RF electronic products such as mobile ...
Desktop DRC'' by
PathWave Design
PathWave Design is a division of Keysight Technologies that was formerly called EEsof ( ; electronic engineering software). It is a provider of electronic design automation (EDA) software that helps engineers design products such as cellular phon ...
(
Keysight Technologies
Keysight Technologies, or Keysight, is an American company that manufactures electronics test and measurement equipment and software. The name is a blend of ''key'' and ''insight''. The company was formed as a spin-off of Agilent Technologies, wh ...
Previously
Agilent
Agilent Technologies, Inc. is an American life sciences company that provides instruments, software, services, and consumables for the entire laboratory workflow. Its global headquarters is located in Santa Clara, California. Agilent was establi ...
's
EEsof
PathWave Design is a division of Keysight Technologies that was formerly called EEsof ( ; electronic engineering software). It is a provider of electronic design automation (EDA) software that helps engineers design products such as cellular phone ...
EDA division)
* ''Calibre'' by
Mentor Graphics
Siemens EDA is a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981 as Mentor Graphics, the company was acquired by Siemens in ...
* ''Diva'', ''DRACULA'', ''Assura'', ''PVS'' and ''Pegasus'' by
Cadence Design Systems
Cadence Design Systems, Inc. (stylized as cādence), headquartered in San Jose, California, is an American multinational corporation, multinational computational software company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The co ...
* ''Hercules'' and ''IC Validator'' by
Synopsys
Synopsys is an American electronic design automation (EDA) company that focuses on silicon design and verification, silicon intellectual property and software security and quality. Products include tools for logic synthesis and physical design ...
* ''Guardian'' by
Silvaco
Silvaco Group, Inc., develops and markets electronic design automation (EDA) and technology CAD (TCAD) software and semiconductor design IP (SIP). The company is headquartered in Santa Clara, California, and has a global presence with offices ...
* ''HyperLynx DRC Free/Gold'' by Mentor Graphics
* ''PowerDRC'' -now SmartDRC by Silvaco
* ''SmartDRC'' by Silvaco
* ''Quartz'' by
Magma Design Automation
Magma headquarters at Santa Clara
Magma Design Automation was a software company in the electronic design automation (EDA) industry. The company was founded in 1997 and maintained headquarters in San Jose, California, with facilities through ...
Free software
* ''
Electric VLSI Design System''
* ''KLayout''
* ''
Magic
Magic or Magick most commonly refers to:
* Magic (supernatural), beliefs and actions employed to influence supernatural beings and forces
* Ceremonial magic, encompasses a wide variety of rituals of magic
* Magical thinking, the belief that unrela ...
''
* '' Alliance -- A Free VLSI/CAD System''
* Opencircuitdesign software:
* ''Microwind -- An educational layout CAD system''
* '' Opensource 130nm CMOS PDK by Google and SkyWater tech. Foundry''
References
*''Electronic Design Automation For Integrated Circuits Handbook'', by Lavagno, Martin, and Scheffer, {{ISBN, 0-8493-3096-3 A survey of the field, from which part of the above summary were derived, with permission.
Electronic circuit verification
Integrated circuits