The PDP-8 is a 12-bit minicomputer that was produced by Digital Equipment Corporation (DEC). It was the first commercially successful minicomputer, with over 50,000 units being sold over the model's lifetime. Its basic design follows the pioneering

LINC The LINC (Laboratory INstrument Computer) is a 12-bit, 2048-word transistorized computer. The LINC is considered by some the first minicomputer and a forerunner to the personal computer. Originally named the "Linc", suggesting the project's or ...

but has a smaller

instruction set In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ' ...

, which is an expanded version of the

PDP-5 The PDP-5 was Digital Equipment Corporation's first 12-bit computer, introduced in 1963. History An earlier 12-bit computer, named LINC has been described as the first minicomputer and also "the first modern personal computer." It had 2,048 12- ...

instruction set. Similar machines from DEC are the

PDP-12 The PDP-12 (Programmed Data Processor) was created by Digital Equipment Corporation (DEC) in 1969 and was marketed specifically for science and engineering.see Mini-Computer section and press see more, then press see more again It was the third i ...

which is a modernized version of the PDP-8 and LINC concepts, and the

PDP-14 The PDP-14 was a specialized computer from Digital Equipment Corporation’s Industrial Products Group designed to replace industrial level relay controls for machinery and machine tools that performed repetitive tasks. It was specifically designed ...

industrial controller An industrial control system (ICS) is an electronic control system and associated instrumentation used for industrial process control. Control systems can range in size from a few modular panel-mounted controllers to large interconnected and in ...

system.

Overview

The earliest PDP-8 model, informally known as a "Straight-8", was introduced on 22 March 1965 priced at $18,500 (). It used

diode–transistor logic Diode–transistor logic (DTL) is a class of digital circuits that is the direct ancestor of transistor–transistor logic. It is called so because the logic gating function (e.g., AND) is performed by a diode network and the amplifying function ...

packaged on

flip chip Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting dies such as semiconductor devices, IC chips, integrated passive devices and microelectromechanical systems (MEMS), to exter ...

cards in a machine about the size of a small household refrigerator. It was the first computer to be sold for under $20,000, making it the best-selling computer in history at that time. The Straight-8 was supplanted in 1966 by the PDP-8/S, which was available in desktop and rack-mount models. Using a one-bit serial arithmetic logic unit (ALU) allowed the PDP-8/S to be smaller and less expensive, although slower than the original PDP-8. A basic 8/S sold for under $10,000, the first machine to reach that milestone. Later systems (the PDP-8/I and /L, the PDP-8/E, /F, and /M, and the PDP-8/A) returned to a faster, fully parallel implementation but use much less costly

transistor–transistor logic Transistor–transistor logic (TTL) is a logic family built from bipolar junction transistors. Its name signifies that transistors perform both the logic function (the first "transistor") and the amplifying function (the second "transistor"), as o ...

(TTL) MSI logic. Most surviving PDP-8s are from this era. The PDP-8/E is common, and well-regarded because many types of I/O devices were available for it. The last commercial PDP-8 models introduced in 1979 are called "CMOS-8s", based on CMOS microprocessors. They were not priced competitively, and the offering failed.

Intersil Intersil is an American semiconductor company headquartered in Milpitas, California. As of February 24, 2017, Intersil is a subsidiary of Renesas. The previous Intersil was formed in August 1999 through the acquisition of the semiconductor busin ...

sold the integrated circuits commercially through 1982 as the

Intersil 6100 The Intersil 6100 is a single-chip microprocessor implementation of the 12-bit PDP-8 instruction set, along with a range of peripheral support and memory ICs developed by Intersil in the mid-1970s. It was sometimes referred to as the CMOS-PDP8 ...

family. By virtue of their CMOS technology they had low power requirements and were used in some embedded military systems. The chief engineer who designed the initial version of the PDP-8 was

Edson de Castro Edson de Castro (born 1938) is a computer engineer and businessman, perhaps best known for designing the Data General Nova series of computers. De Castro was founder and CEO of Data General Corporation throughout the 1970s, the 1980s and into th ...

, who later founded

Data General Data General Corporation was one of the first minicomputer firms of the late 1960s. Three of the four founders were former employees of Digital Equipment Corporation (DEC). Their first product, 1969's Data General Nova, was a 16-bit minicompute ...

Architectural significance

The PDP-8 combines low cost, simplicity, expandability, and careful engineering for value. The greatest historical significance was that the PDP-8's low cost and high volume made a computer available to many new customers for many new uses. Its continuing significance is as a historical example of value-engineered computer design. The low complexity brought other costs. It made programming cumbersome, as is seen in the examples in this article and from the discussion of "pages" and "fields". Much of one's code performed the required mechanics, as opposed to setting out the algorithm. For example, subtracting a number involves computing its two's complement then adding it; writing a conditional jump involves writing a conditional skip around the jump, the skip coding the condition negative to the one desired. Some ambitious programming projects failed to fit in memory or developed design defects that could not be solved. For example, as noted below, inadvertent recursion of a subroutine produces defects that are difficult to trace to the subroutine in question. As design advances reduced the costs of logic and memory, the programmer's time became relatively more important. Subsequent computer designs emphasized ease of programming, typically using larger and more intuitive instruction sets. Eventually, most machine code was generated by

compiler In computing, a compiler is a computer program that translates computer code written in one programming language (the ''source'' language) into another language (the ''target'' language). The name "compiler" is primarily used for programs that ...

s and report generators. The reduced instruction set computer returned full-circle to the PDP-8's emphasis on a simple instruction set and achieving multiple actions in a single instruction cycle, in order to maximize execution speed, although the newer computers have much longer instruction words.

Description

The PDP-8 used ideas from several 12-bit predecessors, most notably the

Seymour Cray Seymour Roger Cray (September 28, 1925 – October 5, 1996
) was an American

CDC 160 The CDC 160 series was a series of minicomputers built by Control Data Corporation. The CDC 160 and CDC 160-A were 12-bit minicomputers built from 1960 to 1965; the CDC 160G was a 13-bit minicomputer, with an extended version of the CDC 160-A ins ...

minicomputer. PDP 8-e

The PDP-8 uses 12 bits for its

word A word is a basic element of language that carries an semantics, objective or pragmatics, practical semantics, meaning, can be used on its own, and is uninterruptible. Despite the fact that language speakers often have an intuitive grasp of w ...

size and arithmetic (on unsigned integers from 0 to 4095 or signed integers from −2048 to +2047). However, software can do

multiple-precision arithmetic In computing, an arithmetic logic unit (ALU) is a combinational digital circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floating-point unit (FPU), which operates on floating point numb ...

. An interpreter was available for

floating point In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can b ...

operations, for example, that uses a 36-bit floating point representation with a two-word (24-bit) significand (mantissa) and one-word exponent. Subject to speed and memory limitations, the PDP-8 can perform calculations similar to more expensive contemporary electronic computers, such as the

IBM 1130 The IBM 1130 Computing System, introduced in 1965, was IBM's least expensive computer at that time. A binary 16-bit machine, it was marketed to price-sensitive, computing-intensive technical markets, like education and engineering, succeeding th ...

and various models of the IBM System/360, while being easier to interface with external devices. The memory address space is also 12 bits, so the PDP-8's basic configuration has a main memory of 4,096 (2¹²) twelve-bit words. An optional memory-expansion unit can switch banks of memories using an IOT instruction. The memory is

magnetic-core memory Magnetic-core memory was the predominant form of random access, random-access computer memory for 20 years between about 1955 and 1975. Such memory is often just called core memory, or, informally, core. Core memory uses toroids (rings) of a ...

with a cycle time of 1.5

microsecond A microsecond is a unit of time in the International System of Units (SI) equal to one millionth (0.000001 or 10−6 or ) of a second. Its symbol is μs, sometimes simplified to us when Unicode is not available. A microsecond is equal to 1000 ...

s (0.667

MHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...

), so that a typical two-cycle (Fetch, Execute) memory-reference instruction runs at a speed of 0.333 MIPS. The 1974 Pocket Reference Card for the PDP-8/E gives a basic instruction time of 1.2 microseconds, or 2.6 microseconds for instructions that reference memory. The PDP-8 was designed in part to handle contemporary telecommunications and text.

Six-bit character code A six-bit character code is a character encoding designed for use on computers with word lengths a multiple of 6. Six bits can only encode 64 distinct characters, so these codes generally include only the upper-case letters, the numerals, some punc ...

s were in widespread use at the time, and the PDP-8's twelve-bit words can efficiently store two such characters. In addition, a six-bit teleprinter code called the teletypesetting or TTS code was in widespread use by the news wire services, and an early application for the PDP-8 was typesetting using this code. PDP-8 instructions have a 3-bit opcode, so there are only eight instructions. The assembler provides more instruction mnemonics to a programmer by translating I/O and operate-mode instructions to combinations of the op-codes and instruction fields. It also has only three programmer-visible

register Register or registration may refer to: Arts entertainment, and media Music * Register (music), the relative "height" or range of a note, melody, part, instrument, etc. * ''Register'', a 2017 album by Travis Miller * Registration (organ), th ...

s: A 12-bit accumulator (AC), a

program counter The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is ...

(PC), and a

carry flag In computer processors the carry flag (usually indicated as the C flag) is a single bit in a system status register/flag register used to indicate when an arithmetic carry or borrow has been generated out of the most significant arithmetic l ...

called the "link register" (L). For input and output, the PDP-8 has a single interrupt shared by all devices, an I/O bus accessed by I/O instructions and a

direct memory access Direct memory access (DMA) is a feature of computer systems and allows certain hardware subsystems to access main system memory independently of the central processing unit (CPU). Without DMA, when the CPU is using programmed input/output, it is t ...

(DMA) channel. The programmed I/O bus typically runs low to medium-speed peripherals, such as

printer Printer may refer to: Technology * Printer (publishing), a person or a company * Printer (computing), a hardware device * Optical printer for motion picture films People * Nariman Printer (fl. c. 1940), Indian journalist and activist * James ...

s, teletypes, paper tape punches and readers, while DMA is used for cathode-ray tube screens with a

light pen A light pen is a computer input device in the form of a light-sensitive wand used in conjunction with a computer's cathode-ray tube (CRT) display. It allows the user to point to displayed objects or draw on the screen in a similar way to a tou ...

analog-to-digital converter In electronics, an analog-to-digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal. An ADC may also provide ...

digital-to-analog converter In electronics, a digital-to-analog converter (DAC, D/A, D2A, or D-to-A) is a system that converts a digital signal into an analog signal. An analog-to-digital converter (ADC) performs the reverse function. There are several DAC archit ...

tape drive A tape drive is a data storage device that reads and writes data on a magnetic tape. Magnetic tape data storage is typically used for offline, archival data storage. Tape media generally has a favorable unit cost and a long archival stability. ...

s, and

disk drive Disk storage (also sometimes called drive storage) is a general category of storage mechanisms where data is recorded by various electronic, magnetic, optical, or mechanical changes to a surface layer of one or more rotating disks. A disk drive is ...

s. To save money, the design uses inexpensive main memory for many purposes that are served by more expensive flip-flop registers in other computers, such as auxiliary counters and subroutine linkage. Basic models use software to do multiplication and division. For faster math, the Extended Arithmetic Element (EAE) provides multiply and divide instructions with an additional register, the Multiplier/Quotient (MQ) register. The EAE was an option on the original PDP-8, the 8/I, and the 8/E, but it is an integral part of the

microprocessor. The PDP-8 is optimized for simplicity of design. Compared to more complex machines, unnecessary features were removed and logic is shared when possible. Instructions use autoincrement, autoclear, and indirect access to increase the software's speed, reduce memory use, and substitute inexpensive memory for expensive registers. The electronics of a basic PDP-8 CPU has only four 12-bit registers: the accumulator, program counter, memory-buffer register, and memory-address register. To save money, these served multiple purposes at different points in the operating cycle. For example, the memory buffer register provides arithmetic operands, is part of the instruction register, and stores data to rewrite the

core memory Core or cores may refer to: Science and technology * Core (anatomy), everything except the appendages * Core (manufacturing), used in casting and molding * Core (optical fiber), the signal-carrying portion of an optical fiber * Core, the centra ...

. (This restores the core data destroyed by the read.) Because of their simplicity, early PDP-8 models were less expensive than most other commercially available computers. However, they used costly production methods often used for prototypes. They used thousands of very small, standardized logic-modules, with gold connectors, integrated by a costly, complex wire-wrapped backplane in a large cabinet. In the later 8/S model, introduced in August 1966, two different logic voltages increased the

fan-out In digital electronics, the fan-out is the number of gate inputs driven by the output of another single logic gate. In most designs, logic gates are connected to form more complex circuits. While no logic gate input can be fed by more than one ...

of the inexpensive

. The 8/S also reduced the number of logic gates by using a serial, single-bit-wide data path to do arithmetic. The CPU of the PDP-8/S has only about 519 logic gates. In comparison, small microcontrollers (as of 2008) usually have 15,000 or more. The reductions in the electronics permitted a much smaller case, about the size of a bread-box. The 8/S was designed by Saul Dinman. The even later PDP-8/E is a larger, more capable computer, but further reengineered for better value. It employs faster

, in integrated circuits. The core memory was redesigned. It allows expansion with less expense because it uses the OMNIBUS in place of the wire-wrapped backplane on earlier models. (A personal account of the development of the PDP-8/E can be read on the Engineering and Technology History Wiki.)

Versions of the PDP-8

The total sales figure for the PDP-8 family has been estimated at over 300,000 machines. The following models were manufactured:

Latter-day implementations

The PDP-8 is readily

emulated In computing, an emulator is Computer hardware, hardware or software that enables one computer system (called the ''host'') to behave like another computer system (called the ''guest''). An emulator typically enables the host system to run so ...

, as its instruction set is much simpler than modern architectures. Enthusiasts have created entire PDP-8s using single FPGA devices. Several software simulations of a PDP-8 are available on the Internet, as well as open-source hardware re-implementations. The best of these correctly execute DEC's operating systems and diagnostic software. The software simulations often simulate late-model PDP-8s with all possible peripherals. Even these use only a tiny fraction of the capacity of a modern personal computer. One of the first commercial versions of a PDP-8/S virtual machine ran on a Kaypro 386 (an 80386-based computer) and was written in the C computer language (before the ANSI-C standard was finalized) and assembler by David Beecher of Denver, Colorado. It replaced a failing PDP-8/S computer that operated the fuel handling machine at Reactor #85, the Platteville, Colorado Nuclear Fuel powered Electric Generating Station, Ft. St. Vrain. It was reviewed by Rockwell International and performed flawlessly for 2.5 years during the operation of the Fuel Handling Machine while it was used to remove fuel from the reactor core and decommission the plant. It included a simulated paper tape loader and front panel.

Input/output

The I/O systems underwent huge changes during the PDP-8 era. Early PDP-8 models use a

front panel A front panel was used on early electronic computers to display and allow the alteration of the state of the machine's internal registers and memory. The front panel usually consisted of arrays of indicator lamps, digit and symbol displays, to ...

interface, a paper-tape reader and a

teletype A teleprinter (teletypewriter, teletype or TTY) is an electromechanical device that can be used to send and receive typed messages through various communications channels, in both point-to-point and point-to-multipoint configurations. Init ...

printer with an optional paper-tape punch. Over time, I/O systems such as

magnetic tape Magnetic tape is a medium for magnetic storage made of a thin, magnetizable coating on a long, narrow strip of plastic film. It was developed in Germany in 1928, based on the earlier magnetic wire recording from Denmark. Devices that use magne ...

RS-232 In telecommunications, RS-232 or Recommended Standard 232 is a standard originally introduced in 1960 for serial communication transmission of data. It formally defines signals connecting between a ''DTE'' (''data terminal equipment'') such ...

and

current loop In electrical signalling an analog current loop is used where a device must be monitored or controlled remotely over a pair of conductors. Only one current level can be present at any time. A major application of current loops is the industry d ...

dumb terminals A computer terminal is an electronic or electromechanical hardware device that can be used for entering data into, and transcribing data from, a computer or a computing system. The teletype was an example of an early-day hard-copy terminal and ...

punched card A punched card (also punch card or punched-card) is a piece of stiff paper that holds digital data represented by the presence or absence of holes in predefined positions. Punched cards were once common in data processing applications or to di ...

readers, and fixed-head disks were added. Toward the end of the PDP-8 era,

floppy disk A floppy disk or floppy diskette (casually referred to as a floppy, or a diskette) is an obsolescent type of disk storage composed of a thin and flexible disk of a magnetic storage medium in a square or nearly square plastic enclosure lined w ...

s and moving-head

cartridge Cartridge may refer to: Objects * Cartridge (firearms), a type of modern ammunition * ROM cartridge, a removable component in an electronic device * Cartridge (respirator), a type of filter used in respirators Other uses * Cartridge (surname), a ...

disk drives Data storage is the recording (storing) of information (data) in a storage medium. Handwriting, phonographic recording, magnetic tape, and optical discs are all examples of storage media. Biological molecules such as RNA and DNA are consi ...

were popular I/O devices. Modern enthusiasts have created standard PC style IDE hard disk adapters for real and simulated PDP-8 computers. Several types of I/O are supported: *In-

backplane A backplane (or "backplane system") is a group of electrical connectors in parallel with each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. It is used as a back ...

dedicated slots for I/O controllers *A "Negative" I/O bus (using negative voltage signalling) *A "Positive" I/O bus (the same architecture using TTL signalling) *The Omnibus (a backplane of undedicated system bus slots) introduced in the PDP-8/E. (Details are described in the referenced IEEE article listed below.) A simplified, inexpensive form of DMA called "three-cycle data break" is supported; this requires the assistance of the processor. The "data break" method moves some of common logic needed to implement DMA I/O from each I/O device into one common copy of the logic within the processor. "Data break" places the processor in charge of maintaining the DMA address and word count registers. In three successive memory cycles, the processor updates the word count, updates the transfer address, and stores or retrieves the actual I/O data word. One-cycle data break effectively triples the DMA transfer rate because only the target data needed to be transferred to and from the core memory. However, the I/O devices need more electronic logic to manage their own word count and transfer address registers. By the time the PDP-8/E was introduced, electronic logic had become less expensive and "one-cycle data break" became more popular.

Programming facilities

Early PDP-8 systems were shipped with no pre-installed software; each time the PDP-8 was powered up, the user hand-entered instructions using a bank of 12 toggle switches. Typically, these instructions were a

bootstrap loader In computing, booting is the process of starting a computer as initiated via hardware such as a button or by a software command. After it is switched on, a computer's central processing unit (CPU) has no software in its main memory, so so ...

to read a program from the paper tape reader. Program development could then proceed, using paper tape input and output. Paper-tape versions of a number of programming languages became available, including DEC's FOCAL interpreter and a 4K FORTRAN compiler and runtime. Toward the end of the PDP-8 era, operating systems such as

OS/8 OS/8 is the primary operating system used on the Digital Equipment Corporation's PDP-8 minicomputer. PDP-8 operating systems which precede OS/8 include: * R-L Monitor, also referred to as MS/8. * P?S/8, requiring only 4K of memory. * PDP-8 4K ...

and COS-310 allowed a traditional

line mode A command-line interpreter or command-line processor uses a command-line interface (CLI) to receive command (computing), commands from a user in the form of lines of text. This provides a means of setting parameters for the environment, invokin ...

editor and command-line

development system using languages such as PAL-III assembly language, FORTRAN,

BASIC BASIC (Beginners' All-purpose Symbolic Instruction Code) is a family of general-purpose, high-level programming languages designed for ease of use. The original version was created by John G. Kemeny and Thomas E. Kurtz at Dartmouth College ...

, and

DIBOL DIBOL or Digital's Business Oriented Language is a general-purpose, procedural, imperative programming language, designed for use in Management Information Systems (MIS) software development. It has a syntax similar to FORTRAN and BASIC, alon ...

. Fairly modern and advanced

real-time operating system A real-time operating system (RTOS) is an operating system (OS) for real-time applications that processes data and events that have critically defined time constraints. An RTOS is distinct from a time-sharing operating system, such as Unix, which m ...

(RTOS) and

preemptive multitasking In computing, preemption is the act of temporarily interrupting an executing task, with the intention of resuming it at a later time. This interrupt is done by an external scheduler with no assistance or cooperation from the task. This preemp ...

multi-user systems were available: a real-time system (RTS-8) was available as were multiuser commercial systems (COS-300 and COS-310) and a dedicated single-user word-processing system (WPS-8). A

time-sharing In computing, time-sharing is the sharing of a computing resource among many users at the same time by means of multiprogramming and multi-tasking.DEC Timesharing (1965), by Peter Clark, The DEC Professional, Volume 1, Number 1 Its emergence a ...

system,

TSS-8 TSS/8 is a discontinued time-sharing operating system co-written by Don Witcraft and John Everett at Digital Equipment Corporation in 1967. DEC also referred to it as Timeshared-8 and EduSystem 50. The operating system runs on the 12-bit PDP-8 co ...

, was also available. TSS-8 allows multiple users to log into the system via 110-baud terminals, and edit, compile and debug programs. Languages include a special version of BASIC, a FORTRAN subset similar to FORTRAN-1 (no user-written subroutines or functions), an

ALGOL ALGOL (; short for "Algorithmic Language") is a family of imperative computer programming languages originally developed in 1958. ALGOL heavily influenced many other languages and was the standard method for algorithm description used by the ...

subset, FOCAL, and an assembler called PAL-D. A fair amount of user-donated software for the PDP-8 was available from

DECUS The Digital Equipment Computer Users' Society (DECUS) was an independent computer user group related to Digital Equipment Corporation (DEC). The Connect User Group Community, formed from the consolidation in May, 2008 of DECUS, Encompass, HP- ...

, the Digital Equipment Corporation User Society, and often came with full source listings and documentation.

Instruction set

The three high-order bits of the 12-bit instruction word (labelled bits 0 through 2) are the operation code. For the six operations that refer to memory, bits 5 through 11 provide a 7-bit address. Bit 4, if set, says to complete the address using the 5 high-order bits of the

(PC) register, meaning that the addressed location was within the same 128 words as the instruction. If bit 4 is clear, zeroes are used, so the addressed location is within the first 128 words of memory. Bit 3 specifies indirection; if set, the address obtained as described so far points to a 12-bit value in memory that gives the actual effective address for the instruction; this allows operands to be anywhere in memory at the expense of an additional word. The JMP instruction does not operate on a memory word, except if indirection is specified, but has the same bit fields. ; Memory pages This use of the instruction word divides the 4,096-word memory into 128-word

pages Page most commonly refers to: * Page (paper), one side of a leaf of paper, as in a book Page, PAGE, pages, or paging may also refer to: Roles * Page (assistance occupation), a professional occupation * Page (servant), traditionally a young mal ...

; bit 4 of the instruction selects either the current page or page 0 (addresses 0000–0177 in

octal The octal numeral system, or oct for short, is the radix, base-8 number system, and uses the Numerical digit, digits 0 to 7. This is to say that 10octal represents eight and 100octal represents sixty-four. However, English, like most languages, ...

). Memory in page 0 is at a premium, since variables placed here can be addressed directly from any page. (Moreover, address 0000 is where any interrupt service routine must start, and addresses 0010–0017 have the special property of auto-incrementing preceding any indirect reference through them.) The standard assembler places constant values for arithmetic in the current page. Likewise, cross-page jumps and subroutine calls use an indirect address in the current page. It was important to write routines to fit within 128-word pages, or to arrange routines to minimize page transitions, as references and jumps outside the current page require an extra word. Consequently, much time was spent cleverly conserving one or several words. Programmers deliberately placed code at the end of a page to achieve a free transition to the next page as PC was incremented.

Basic instructions

:000 – AND –

AND or AND may refer to: Logic, grammar, and computing * Conjunction (grammar), connecting two words, phrases, or clauses * Logical conjunction in mathematical logic, notated as "∧", "⋅", "&", or simple juxtaposition * Bitwise AND, a boolea ...

the memory operand with AC. :001 – TAD –

Two's complement Two's complement is a mathematical operation to reversibly convert a positive binary number into a negative binary number with equivalent (but negative) value, using the binary digit with the greatest place value (the leftmost bit in big- endian ...

ADd Addition (usually signified by the plus symbol ) is one of the four basic operations of arithmetic, the other three being subtraction, multiplication and division. The addition of two whole numbers results in the total amount or '' sum'' of ...

the memory operand to (a ''12 bit'' signed value (AC) w. carry in L). :010 – ISZ – Increment the memory operand and Skip next instruction if result is Zero. :011 – DCA – Deposit AC into the memory operand and Clear AC. :100 – JMS – JuMp to Subroutine (storing

return address In postal mail, a return address is an explicit inclusion of the address of the person sending the message. It provides the recipient (and sometimes authorized intermediaries) with a means to determine how to respond to the sender of the message i ...

in first word of subroutine!). :101 – JMP – JuMP. :110 – IOT – Input/Output Transfer (see below). :111 – OPR – microcoded OPeRations (see below).

IOT (Input-Output Transfer) instructions

The PDP-8 processor defined few of the IOT instructions, but simply provided a framework. Most IOT instructions were defined by the individual I/O devices. ; Device Bits 3 through 8 of an IOT instruction select an I/O device. Some of these device addresses are standardized by convention: *00 is handled by the processor and not sent to any I/O device (see below). *01 is usually the high-speed paper tape reader. *02 is the high-speed paper tape punch. *03 is the console keyboard (and any associated low-speed paper tape reader). *04 is the console printer (and any associated low-speed paper tape punch). Instructions for device 0 affect the processor as a whole. For example, ION (6001) enables interrupt processing, and IOFF (6002) disables it. ; Function Bits 9 through 11 of an IOT instruction select the function(s) the device performs. Simple devices (such as the paper tape reader and punch and the console keyboard and printer) use the bits in standard ways: *Bit 11 causes the processor to skip the next instruction if the I/O device is ready. *Bit 10 clears AC. *Bit 9 moves a word between AC and the device, initiates another I/O transfer, and clears the device's "ready" flag. These operations take place in a well-defined order that gives useful results if more than one bit is set. More complicated devices, such as disk drives, use these 3 bits in device-specific fashions. Typically, a device decodes the 3 bits to give 8 possible function codes.

OPR (OPeRate)

Many operations are achieved using OPR, including most of the conditionals. OPR does not address a memory location; conditional execution is achieved by conditionally skipping one instruction, which is typically a JMP. The OPR instruction was said to be "microcoded." This did not mean what the word means today (that a lower-level program fetched and interpreted the OPR instruction), but meant that each bit of the instruction word specifies a certain action, and the programmer could achieve several actions in a single instruction cycle by setting multiple bits. In use, a programmer can write several instruction mnemonics alongside one another, and the assembler combines them with OR to devise the actual instruction word. Many I/O devices support "microcoded" IOT instructions. Microcoded actions take place in a well-defined sequence designed to maximize the utility of many combinations. The OPR instructions come in Groups. Bits 3, 8 and 11 identify the Group of an OPR instruction, so it is impossible to combine the microcoded actions from different groups.

Group 1

        00 01 02 03 04 05 06 07 08 09 10 11
        ___________________________________
       ,  1,  1,  1,  0,   ,   ,   ,   ,   ,   ,   ,   , 
       , __, __, __, __, __, __, __, __, __, __, __, __, 
                   , CLA   CMA   RAR   BSW
                       CLL   CML   RAL   IAC

    Execution order  1  1  2  2  4  4  4  3

:7200 – CLA – Clear Accumulator :7100 – CLL – Clear the L Bit :7040 – CMA – Ones Complement Accumulator :7020 – CML – Complement L Bit :7001 – IAC – Increment :7010 – RAR – Rotate Right :7004 – RAL – Rotate Left :7012 – RTR – Rotate Right Twice :7006 – RTL – Rotate Left Twice :7002 – BSW – Byte Swap 6-bit "bytes" (PDP 8/e and up) In most cases, the operations are sequenced so that they can be combined in the most useful ways. For example, combining CLA (CLear Accumulator), CLL (CLear Link), and IAC (Increment ACcumulator) first clears the AC and Link, then increments the accumulator, leaving it set to 1. Adding RAL to the mix (so CLA CLL IAC RAL) causes the accumulator to be cleared, incremented, then rotated left, leaving it set to 2. In this way, small integer constants were placed in the accumulator with a single instruction. The combination CMA IAC, which the assembler lets you abbreviate as CIA, produces the arithmetic inverse of AC: the twos-complement negation. Since there is no subtraction instruction, only the twos-complement add (TAD), computing the difference of two operands, requires first negating the subtrahend. A Group 1 OPR instruction that has none of the microprogrammed bits set performs no action. The programmer can write NOP (No Operation) to assemble such an instruction.

Group 2, Or Group

         00 01 02 03 04 05 06 07 08 09 10 11
        ___________________________________
       ,  1,  1,  1,  1,   ,   ,   ,   ,  0,   ,   ,  0, 
       , __, __, __, __, __, __, __, __, __, __, __, __, 
                   , CLA   SZA      OSR
                       SMA   SNL      HLT

                     2  1  1  1     3  3

:7600 – CLA – Clear AC :7500 – SMA – Skip on AC < 0 (or group) :7440 – SZA – Skip on AC = 0 (or group) :7420 – SNL – Skip on L ≠ 0 (or group) :7404 – OSR – logically 'or' front-panel switches with AC :7402 – HLT – Halt When bit 8 is clear, a skip is performed if any of the specified conditions are true. For example, "SMA SZA", opcode 7540, skips if AC ≤ 0. A Group 2 OPR instruction that has none of the microprogrammed bits set is another No-Op instruction.

Group 2, And Group

         00 01 02 03 04 05 06 07 08 09 10 11
        ___________________________________
       ,  1,  1,  1,  1,   ,   ,   ,   ,  1,   ,   ,  0, 
       , __, __, __, __, __, __, __, __, __, __, __, __, 
                   , CLA   SNA      OSR
                       SPA   SZL      HLT

                     2  1  1  1     3  2

:7410 – SKP – Skip Unconditionally :7610 – CLA – Clear AC :7510 – SPA – Skip on AC ≥ 0 (and group) :7450 – SNA – Skip on AC ≠ 0 (and group) :7430 – SZL – Skip on L = 0 (and group) When bit 8 is set, the Group 2, Or skip condition is inverted, via

De Morgan's laws In propositional logic and Boolean algebra, De Morgan's laws, also known as De Morgan's theorem, are a pair of transformation rules that are both valid rules of inference. They are named after Augustus De Morgan, a 19th-century British math ...

: the skip is ''not'' performed if any of the group 2, Or conditions are true, meaning that ''all'' of the specified skip conditions must be true. For example, "SPA SNA", opcode 7550, skips if AC > 0. If none of bits 5–7 are set, then the skip is unconditional.

Group 3

Unused bit combinations of OPR are defined as a third Group of microprogrammed actions mostly affecting the MQ (Multiplier/Quotient) register. The MQ register and the extended arithmetic element (EAE) instructions are optional and only exist when EAE option was purchased.

        00 01 02 03 04 05 06 07 08 09 10 11
        ___________________________________
       ,  1,  1,  1,  1,   ,   ,   ,   ,   ,   ,   ,  1, 
       , __, __, __, __, __, __, __, __, __, __, __, __, 
                   , CLA   SCA   \_    _/
                   ,    MQA   MQL  CODE

                     1* 2  2  2     3

:7601 – CLA – Clear AC :7501 – MQA – Multiplier Quotient with AC (logical or MQ into AC) :7441 – SCA – Step counter load into AC :7421 – MQL – Multiplier Quotient Load (Transfer AC to MQ, clear AC) :7621 – CAM – CLA + MQL clears both AC and MQ. Typically CLA and MQA were combined to transfer MQ into AC. Another useful combination is MQA and MQL, to exchange the two registers. Three bits specified a multiply/divide instruction to perform: :7401 – No operation :7403 – SCL – Step Counter Load (immediate word follows, PDP-8/I and up) :7405 – MUY – Multiply :7407 – DVI – Divide :7411 – NMI – Normalize :7413 – SHL – Shift left (immediate word follows) :7415 – ASR – Arithmetic shift right :7417 – LSR – Logical shift right

Memory control

A 12-bit word can have 4,096 different values, and this is the maximum number of words the original PDP-8 can address indirectly through a word pointer. 4,096 12-bit words represent 6,144 bytes in modern terminology, or 6 kB. As programs became more complex and the price of memory fell, it became desirable to expand this limit. To maintain compatibility with pre-existing programs, new hardware outside the original design added high-order bits to the effective addresses generated by the program. The Memory Extension Controller expands the addressable memory by a factor of 8, to a total of 32,768 words. This expansion was thought sufficient because, with core memory then costing about 50 cents a word, a full 32K of memory would equal the cost of the CPU. Each 4K of memory is called a field. The Memory Extension Controller contains two three-bit registers: the DF (Data Field) and the IF (Instruction Field). These registers specify a field for each memory reference of the CPU, allowing a total of 15 bits of address. The IF register specifies the field for instruction fetches and direct memory references; the DF register specifies the field for indirect data accesses. A program running in one field can reference data in the same field by direct addressing, and reference data in another field by indirect addressing. A set of I/O instructions in the range 6200 through 6277 is handled by the Memory Extension Controller and give access to the DF and IF registers. The 62X1 instruction (CDF, Change Data Field) set the data field to X. Similarly 62X2 (CIF) set the instruction field, and 62X3 set both. Pre-existing programs would never execute CIF or CDF; the DF and IF registers would both point to the same field, a single field to which these programs were limited. The effect of the CIF instruction was deferred to coincide with the next JMP or JMS instruction, so that executing CIF would not cause a jump. It was more complicated for multiple-field programs to deal with field boundaries and the DF and IF registers than it would have been if they could simply generate 15-bit addresses, but the design provided backward compatibility and is consistent with the 12-bit architecture used throughout the PDP-8. Compare the later

Intel 8086 The 8086 (also called iAPX 86) is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088, released July 1, 1979, is a slightly modified chip with an external 8-bit data bus (allowi ...

, whose 16-bit memory addresses are expanded to 20 bits by combining them with the contents of a specified or implied segment register. The extended memory scheme let existing programs handle increased memory with minimal changes. For example, 4K FOCAL normally had about 3K of code with only 1K left over for user program and data. With a few patches, FOCAL could use a second 4K field for user program and data. Moreover, additional 4K fields could be allocated to separate users, turning 4K FOCAL into a multi-user timesharing system. ; Virtualization On the PDP-8/E and later models, the Memory Extension Controller was enhanced to enable machine virtualization. A program written to use a PDP-8's entire resources can coexist with other such programs on the same PDP-8 under the control of a virtual machine manager. The manager can make all I/O instructions (including those that operated on the Memory Extension Controller) cause a trap (an interrupt handled by the manager). In this way, the manager can map memory references, map data or instruction fields, and redirect I/O to different devices. Each original program has complete access to a "virtual machine" provided by the manager. New I/O instructions to the Memory Extension Controller retrieve the current value of the data and instruction fields, letting software save and restore most of the machine state across a trap. However, a program can not sense whether the CPU is in the process of deferring the effect of a CIF instruction (whether it has executed a CIF and not yet executed the matching jump instruction). The manager has to include a complete PDP-8 emulator (not difficult for an 8-instruction machine). Whenever a CIF instruction traps to the manager, it has to emulate the instructions up to the next jump. Fortunately, as a jump usually is the next instruction after CIF, this emulation does not slow programs down much, but it is a large workaround to a seemingly small design deficiency. By the time of the PDP-8/A, memory prices had fallen enough that memory exceeding 32K was desirable. The 8/A added a new set of instructions for handling more than eight fields of memory. The field number could now be placed in the AC, rather than hard-coded into the instruction. However, by this time, the PDP-8 was in decline, so very little standard software was modified to use these new features.

Examples

The following examples show code in PDP-8

assembly language In computer programming, assembly language (or assembler language, or symbolic machine code), often referred to simply as Assembly and commonly abbreviated as ASM or asm, is any low-level programming language with a very strong correspondence be ...

as one might write for the PAL-III assembler.

Comparing two numbers

The following piece of code shows what is needed just to compare two numbers:

    /Compare numbers in memory at OPD1 and OPD2
            CLA CLL     /Must start with 0 in AC and link
            TAD OPD1    /Load first operand into AC (by adding it to 0); link is still clear
            CIA         /Complement, then increment AC, negating it
            TAD OPD2    /AC now has OPD2-OPD1; if OPD2≥OPD1, sum overflows and link is set
            SZL         /Skip if link is clear
            JMP OP2GT   /Jump somewhere in the case that OPD2≥OPD1;
                        /Otherwise, fall through to code below.

As shown, much of the text of a typical PDP-8 program focuses not on the author's intended algorithm but on low-level mechanics. An additional readability problem is that in conditional jumps such as the one shown above, the conditional instruction (which skips around the JMP) highlights the opposite of the condition of interest.

String output

This complete PDP-8 assembly language program outputs "Hello, world!" to the teleprinter.

    *10                   / Set current assembly origin to address 10,
    STPTR,    STRNG-1     / An auto-increment register (one of eight at 10-17)

    *200                  / Set current assembly origin to program text area
    HELLO,  CLA CLL       / Clear AC and Link again (needed when we loop back from tls)
            TAD I Z STPTR / Get next character, indirect via PRE-auto-increment address from the zero page
            SNA           / Skip if non-zero (not end of string)
            HLT           / Else halt on zero (end of string)
            TLS           / Output the character in the AC to the teleprinter
            TSF           / Skip if teleprinter ready for character
            JMP .-1       / Else jump back and try again
            JMP HELLO     / Jump back for the next character

    STRNG,  310           / H
            345           / e
            354           / l
            354           / l
            357           / o
            254           /,
            240           / (space)
            367           / w
            357           / o
            362           / r
            354           / l
            344           / d
            241           / !
            0             / End of string
    $HELLO                /DEFAULT TERMINATOR

Subroutines

The PDP-8 processor does not implement a stack upon which to store registers or other

context Context may refer to: * Context (language use), the relevant constraints of the communicative situation that influence language use, language variation, and discourse summary Computing * Context (computing), the virtual environment required to su ...

when a

subroutine In computer programming, a function or subroutine is a sequence of program instructions that performs a specific task, packaged as a unit. This unit can then be used in programs wherever that particular task should be performed. Functions may ...

is called or an

interrupt In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to ''interrupt'' currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted, ...

occurs. (A stack can be implemented in software, as demonstrated in the next section.) Instead, the JMS instruction simply stores the updated PC (pointing past JMS, to the return address) at the effective address and jumps to the effective address plus one. The subroutine returned to its caller using an indirect JMP instruction that addresses the subroutine's first word. For example, here is "Hello, World!" re-written to use a subroutine. When the JMS instruction jumps to the subroutine, it modifies the 0 coded at location OUT1:

    *10                     / Set current assembly origin to address 10,
    STPTR,  STRNG-1         / An auto-increment register (one of eight at 10-17)

    *200                    / Set assembly origin (load address)
    LOOP,   TAD I STPTR     / Pre-increment mem location 10, fetch indirect to get the next character of our message
            SNA             / Skip on non-zero AC
            HLT             / Else halt at end of message
            JMS OUT1        / Write out one character
            JMP LOOP        / And loop back for more
    OUT1,   0               / Will be replaced by caller's updated PC
            TSF             / Skip if printer ready
            JMP .-1         / Wait for flag
            TLS             / Send the character in the AC
            CLA CLL         / Clear AC and Link for next pass
            JMP I OUT1      / Return to caller
    STRNG, "H               / A well-known message
           "e               /
           "l               / NOTE:
           "l               /
           "o               /   Strings in PAL-8 and PAL-III were "sixbit"
           ",               /   To use ASCII, we spell it out, character by character
           "                /
           "w               /
           "o               /
           "r               /
           "l               /
           "d               /
           "!               /
           015              /
           012              /
           0                / Mark the end of our null-terminated string (.ASCIZ hadn't been invented yet!)

The fact that the JMS instruction uses the word just before the code of the subroutine to deposit the

prevents reentrancy and

recursion Recursion (adjective: ''recursive'') occurs when a thing is defined in terms of itself or of its type. Recursion is used in a variety of disciplines ranging from linguistics to logic. The most common application of recursion is in mathemati ...

without additional work by the programmer. It also makes it difficult to use

ROM Rom, or ROM may refer to: Biomechanics and medicine * Risk of mortality, a medical classification to estimate the likelihood of death for a patient * Rupture of membranes, a term used during pregnancy to describe a rupture of the amniotic sac * ...

with the PDP-8 because read-write return-address storage is commingled with read-only code storage in the address space. Programs intended to be placed into ROMs approach this problem in several ways: *They copy themselves to read-write memory before execution, or *They are placed into special ROM cards that provide a few words of read/write memory, accessed indirectly through the use of a thirteenth flag bit in each ROM word. *They avoid the use of subroutines; or use code such as the following, instead of the JMS instruction, to put the return address in read-write memory:

    JUMPL, DCA TEMP         / Deposit the accumulator in some temporary location
           TAD JUMPL+3      / Load the return address into the accumulator: hard coded
           JMP SUBRO        / Go to the subroutine, and have it handle jumping back (to JUMPL+3)

The use of the JMS instruction makes debugging difficult. If a programmer makes the mistake of having a subroutine call itself, directly or by an intermediate subroutine, then the return address for the outer call is destroyed by the return address of the subsequent call, leading to an infinite loop. If one module is coded with an incorrect or obsolete address for a subroutine, it would not just fail to execute the entire code sequence of the subroutine, it might modify a word of the subroutine's code, depositing a return address that the processor might interpret as an instruction during a subsequent correct call to the subroutine. Both types of error might become evident during the execution of code that was written correctly.

Software stack

Though the PDP-8 does not have a hardware stack, stacks can be implemented in software. Mark Smotherman
"DEC PDP-8 Subroutines"
2002. Here are example PUSH and POP subroutines, simplified to omit issues such as testing for stack overflow and underflow:

    *100              /make routines accessible for next example
    PUSH, 0
          DCA DATA
          CLA CMA     / -1
          TAD SP
          DCA SP
          TAD DATA
          DCA I SP
          JMP I PUSH     /Return

    POP,  0
          CLA CLL
          TAD I SP
          ISZ SP
          JMP I POP

    DATA, 0
    SP, 0

And here is "Hello World" with this "stack" implemented, and "OUT" subroutine:

    *200
    MAIN,  CLA CLL         /Set the message pointer
           TAD (MESSG      /To the beginning of the message (literal)
           DCA SP

    LOOP,  JMS POP
           SNA             /Stop execution if zero
           HLT
           JMS OUT         /Otherwise, output a character
           JMP LOOP

    MESSG, "H
           "e
           "l
           "l
           "o
           ",
           "
           "w
           "o
           "r
           "l
           "d
           "!
           015
           012
           0

    OUT,    0               / Will be replaced by caller's updated PC
            TSF             / Skip if printer ready
            JMP .-1         / Wait for flag
            TLS             / Send the character in the AC
            CLA CLL         / Clear AC and Link for next pass
            JMP I OUT       / Return to caller

Linked list

Another possible subroutine for the PDP-8 is a linked list.

     GETN, 0     /Gets the number pointed to and moves the pointer
     CLA CLL     /Clear accumulator
     TAD I PTR   /Gets the number pointed to
     DCA TEMP    /Save current value
     ISZ PTR     /Increment pointer
     TAD I PTR   /Get next address
     DCA PTR     /Put in pointer
     JMP I GETN  /return
     PTR,  0
     TEMP, 0

Interrupts

There is a single

line on the PDP-8 I/O bus. The processor handles any interrupt by disabling further interrupts and executing a JMS to location 0000. As it is difficult to write reentrant subroutines, it is difficult to nest interrupts and this is usually not done; each interrupt runs to completion and re-enables interrupts just before executing the JMP I 0 instruction that returns from the interrupt. Because there is only a single interrupt line on the I/O bus, the occurrence of an interrupt does not inform the processor of the source of the interrupt. Instead, the interrupt service routine has to serially poll each active I/O device to see if it is the source. The code that does this is called a ''skip chain'' because it consists of a series of PDP-8 "test and skip if flag set" I/O instructions. (It was not unheard-of for a skip chain to reach its end without finding any device in need of service.) The relative interrupt priority of the I/O devices is determined by their position in the skip chain: If several devices interrupt, the device tested earlier in the skip chain is serviced first.

Books

An engineering textbook popular in the 1980s, ''The Art of Digital Design'' by David Winkel and Franklin Prosser, contains an example problem spanning several chapters in which the authors demonstrate the process of designing a computer that is compatible with the PDP-8/I. The function of every component is explained. Although it is not a production design, as it uses more modern SSI and MSI components and solid state rather than core memory, the exercise provides a detailed description of the computer's operation.

Unlicensed clones

The USSR produced the minicomputers Saratov-1 and Saratov-2, which cloned the PDP-8 and PDP-8/E, respectively.

References

*C.

Gordon Bell Chester Gordon Bell (born August 19, 1934) is an American electrical engineer and manager. An early employee of Digital Equipment Corporation (DEC) 1960–1966, Bell designed several of their PDP machines and later became Vice President of Engi ...

and Allen Newell, 1971, ''Computer Structures: Readings and Examples'', McGraw-Hill Book Company, New York. Chapter 5 ''The DEC PDP-8'', pages 120–136. With enough detail that an electrical engineer could build one (if able to find the parts).

External links

pdp-8 Documentation: The Small Computer Handbook (1966 Edition), Sections 1 and 2
and others are available from

Simon Fraser University Simon Fraser University (SFU) is a public research university in British Columbia, Canada, with three campuses, all in Greater Vancouver: Burnaby (main campus), Surrey, and Vancouver. The main Burnaby campus on Burnaby Mountain, located from ...

*
pdp8online.com
has a running PDP8 that anyone can control through a Java applet, plus a webcam to show the results.
dpa
a portable PDP-8 cross-assembler *Spare Time Gizmos

PDP-8 compatible computer with optional front panel
Still working Classic 8, PDP 8e and 8i
in a German computer museum *Bernhard Baehr's slic

for Macintosh *Willem van der Mark'
PDP-8/E Simulator
in Java *http://simh.trailing-edge.com a very portable simulator for PDP-8, that works on virtually any modern OS.
PiDP-8
open-source replica of the PDP-8 using a Raspberry Pi running SIMH attached to a PDP-8 front panel replica.

omputer History Collection from the Smithsonian *Historic application of PDP8 in

Germany Germany,, officially the Federal Republic of Germany, is a country in Central Europe. It is the second most populous country in Europe after Russia, and the most populous member state of the European Union. Germany is situated betwe ...

for all

Deutsche Bank Deutsche Bank AG (), sometimes referred to simply as Deutsche, is a German multinational investment bank and financial services company headquartered in Frankfurt, Germany, and dual-listed on the Frankfurt Stock Exchange and the New York Sto ...

centers and other financial institutes: Olympia Multiplex 80 (Olympia Business Systems)
A guide to the preservation and restoration of PDP-8 computers
Steve Gibson's explanation on how the PDP-8 works and how to program it.
YouTube
has a video series showing the PDP-8. * {{Authority control DEC minicomputers Transistorized computers Instruction set architectures 12-bit computers Computer-related introductions in 1965