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Bit-serial Architecture
In digital logic applications, bit-serial architectures send data one bit at a time, along a single wire, in contrast to bit-parallel word architectures, in which data values are sent all bits or a word at once along a group of wires. All digital computers built before 1951, and most of the early massive parallel processing machines used a bit-serial architecture—they were serial computers. Bit-serial architectures were developed for digital signal processing in the 1960s through 1980s, including efficient structures for bit-serial multiplication and accumulation. Often, N serial processors will take less FPGA area and have a higher total performance than a single N-bit parallel processor. See also * 1-bit architecture * Bit banging * Bit slicing * Digit-serial architecture * BKM algorithm * CORDIC algorithm CORDIC (for "coordinate rotation digital computer"), also known as Volder's algorithm, or: Digit-by-digit method Circular CORDIC (Jack E. Volder), Linear CORDI ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Digital Logic
A logic gate is an idealized or physical device implementing a Boolean function, a logical operation performed on one or more Binary number, binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has for instance zero rise time and unlimited fan-out, or it may refer to a non-ideal physical device (see Ideal and real op-amps for comparison). Logic gates are primarily implemented using diodes or transistors acting as switch#Electronic switches, electronic switches, but can also be constructed using vacuum tubes, electromagnetic relays (relay logic), fluidic logic, pneumatics#Pneumatic logic, pneumatic logic, optics, molecular logic gate, molecules, or even analytical engine, mechanical elements. Now, most logic gates are made from MOSFETs (metal–oxide–semiconductor field-effect transistors). With amplification, logic gates can be cascaded in the same way that Boolean functions can be composed, allowing t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Parallel Transmission
In data transmission, parallel communication is a method of conveying multiple binary digits (bits) simultaneously using multiple conductors. This contrasts with serial communication, which conveys only a single bit at a time; this distinction is one way of characterizing a communications link. The basic difference between a parallel and a serial communication channel is the number of electrical conductors used at the physical layer to convey bits. Parallel communication implies more than one such conductor. For example, an 8-bit parallel channel will convey eight bits (or a byte) simultaneously, whereas a serial channel would convey those same bits sequentially, one at a time. If both channels operated at the same clock speed, the parallel channel would be eight times faster. A parallel channel may have additional conductors for other signals, such as a clock signal to pace the flow of data, a signal to control the direction of data flow, and handshaking signals. Parallel commu ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Word (computer Architecture)
In computing, a word is the natural unit of data used by a particular processor design. A word is a fixed-sized datum handled as a unit by the instruction set or the hardware of the processor. The number of bits or digits in a word (the ''word size'', ''word width'', or ''word length'') is an important characteristic of any specific processor design or computer architecture. The size of a word is reflected in many aspects of a computer's structure and operation; the majority of the registers in a processor are usually word-sized and the largest datum that can be transferred to and from the working memory in a single operation is a word in many (not all) architectures. The largest possible address size, used to designate a location in memory, is typically a hardware word (here, "hardware word" means the full-sized natural word of the processor, as opposed to any other definition used). Documentation for older computers with fixed word size commonly states memory sizes in words ra ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Massively Parallel (computing)
Massively parallel is the term for using a large number of computer processors (or separate computers) to simultaneously perform a set of coordinated computations in parallel. GPUs are massively parallel architecture with tens of thousands of threads. One approach is grid computing, where the processing power of many computers in distributed, diverse administrative domains is opportunistically used whenever a computer is available.''Grid computing: experiment management, tool integration, and scientific workflows'' by Radu Prodan, Thomas Fahringer 2007 pages 1–4 An example is BOINC, a volunteer-based, opportunistic grid system, whereby the grid provides power only on a best effort basis.''Parallel and Distributed Computational Intelligence'' by Francisco Fernández de Vega 2010 pages 65–68 Another approach is grouping many processors in close proximity to each other, as in a computer cluster. In such a centralized system the speed and flexibility of the interconnect beco ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Serial Computer
A serial computer is a computer typified by bit-serial architecture i.e., internally operating on one bit or digit for each clock cycle. Machines with serial main storage devices such as acoustic or magnetostrictive delay lines and rotating magnetic devices were usually serial computers. Serial computers require much less hardware than their parallel computing counterpart, but are much slower. There are modern variants of the serial computer available as a soft microprocessor which can serve niche purposes where size of the CPU is the main constraint. The first computer that was not serial (the first parallel computer) was the Whirlwind in 1951. A serial computer is not necessarily the same as a computer with a 1-bit architecture, which is a subset of the serial computer class. 1-bit computer instructions operate on data consisting of single bits, whereas a serial computer can operate on ''N''-bit data widths, but does so a single bit at a time. Serial machines * EDVAC ( ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Digital Signal Processing
Digital signal processing (DSP) is the use of digital processing, such as by computers or more specialized digital signal processors, to perform a wide variety of signal processing operations. The digital signals processed in this manner are a sequence of numbers that represent samples of a continuous variable in a domain such as time, space, or frequency. In digital electronics, a digital signal is represented as a pulse train, which is typically generated by the switching of a transistor. Digital signal processing and analog signal processing are subfields of signal processing. DSP applications include audio and speech processing, sonar, radar and other sensor array processing, spectral density estimation, statistical signal processing, digital image processing, data compression, video coding, audio coding, image compression, signal processing for telecommunications, control systems, biomedical engineering, and seismology, among others. DSP can involve linear or nonli ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence the term '' field-programmable''. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together. Logic blocks can be configured to perform complex combinational functions, or act as simple logic gates like AND and XOR. In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. Many FPGAs can be reprogrammed to implement different logic functions, allowing flexible reconfigurabl ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
1-bit Architecture
In computer architecture, 1-bit integers or other data units are those that are (1/8 octet) wide. Also, 1-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers of that size. There are no computers or microcontrollers of any kind that are exclusively 1-bit for all registers and address buses. A 1-bit register can only store 21 different values, i.e. 0 or 1 (off or on, respectively). This is very restrictive and therefore not enough for a program counter which, on modern systems, is implemented in an on-chip register, that isn't implemented on-chip in some 1-bit systems. Opcodes for at least one 1-bit processor architecture were 4-bit and the address bus was 8-bit. While 1-bit CPUs are obsolete, the first carbon nanotube computer from 2013 is a 1-bit one-instruction set computer (and has only 178 transistors). 1-bit A serial computer processes data a single bit at a time. For example, the PDP-8/S was a 12-bit co ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bit Banging
In computer engineering and electrical engineering, bit banging is a "term of art" for any method of data transmission that employs software as a substitute for dedicated hardware to generate transmitted signals or process received signals. Software directly sets and samples the states of GPIOs (e.g., pins on a microcontroller), and is responsible for meeting all timing requirements and protocol sequencing of the signals. In contrast to bit banging, dedicated hardware (e.g., UART, SPI, I²C) satisfies these requirements and, if necessary, provides a data buffer to relax software timing requirements. Bit banging can be implemented at very low cost, and is commonly used in some embedded systems. Bit banging allows a device to implement different protocols with minimal or no hardware changes. In some cases, bit banging is made feasible by newer, faster processors because more recent hardware operates much more quickly than hardware did when standard communications protocols were c ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bit Slicing
Bit slicing is a technique for constructing a processor from modules of processors of smaller bit width, for the purpose of increasing the word length; in theory to make an arbitrary ''n''-bit central processing unit (CPU). Each of these component modules processes one bit field or "slice" of an operand. The grouped processing components would then have the capability to process the chosen full word-length of a given software design. Bit slicing more or less died out due to the advent of the microprocessor. Recently it has been used in arithmetic logic units (ALUs) for quantum computers and as a software technique, e.g. for cryptography in x86 CPUs. Operational details Bit-slice processors (BSPs) usually include 1-, 2-, 4-, 8- or 16-bit arithmetic logic unit (ALU) and control lines (including carry or overflow signals that are internal to the processor in non-bitsliced CPU designs). For example, two 4-bit ALU chips could be arranged side by side, with control lines ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Digit-serial Architecture
A serial computer is a computer typified by bit-serial architecture i.e., internally operating on one bit or digit for each clock cycle. Machines with serial main storage devices such as acoustic or magnetostrictive delay lines and rotating magnetic devices were usually serial computers. Serial computers require much less hardware than their parallel computing counterpart, but are much slower. There are modern variants of the serial computer available as a soft microprocessor which can serve niche purposes where size of the CPU is the main constraint. The first computer that was not serial (the first parallel computer) was the Whirlwind in 1951. A serial computer is not necessarily the same as a computer with a 1-bit architecture, which is a subset of the serial computer class. 1-bit computer instructions operate on data consisting of single bits, whereas a serial computer can operate on ''N''-bit data widths, but does so a single bit at a time. Serial machines * EDVAC ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
BKM Algorithm
The BKM algorithm is a shift-and-add algorithm for computing elementary functions, first published in 1994 by Jean-Claude Bajard, Sylvanus Kla, and Jean-Michel Muller. BKM is based on computing complex logarithms (''L-mode'') and exponentials (''E-mode'') using a method similar to the algorithm Henry Briggs used to compute logarithms. By using a precomputed table of logarithms of negative powers of two, the BKM algorithm computes elementary functions using only integer add, shift, and compare operations. BKM is similar to CORDIC, but uses a table of logarithms rather than a table of arctangents. On each iteration, a choice of coefficient is made from a set of nine complex numbers, 1, 0, −1, i, −i, 1+i, 1−i, −1+i, −1−i, rather than only −1 or +1 as used by CORDIC. BKM provides a simpler method of computing some elementary functions, and unlike CORDIC, BKM needs no result scaling factor. The convergence rate of BKM is approximately one bit per iteration, like CORDIC, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
