Bit Rate Reduction
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Bit Rate Reduction, or BRR, also called Bit Rate Reduced, is a name given to an audio compression method used on the SPC700 sound coprocessor used in the
SNES The Super Nintendo Entertainment System, commonly shortened to Super Nintendo, Super NES or SNES, is a 16-bit home video game console developed by Nintendo that was released in 1990 in Japan, 1991 in North America, 1992 in Europe and Oceania an ...
, as well as the audio processors of the
Philips CD-i The Compact Disc-Interactive (CD-I, later CD-i) is a digital optical disc data storage format as well as a hardware platform, co-developed and marketed by Dutch company Philips and Japanese company Sony. It was created as an extension of CDDA ...
, the
PlayStation is a video gaming brand owned and produced by Sony Interactive Entertainment (SIE), a division of Japanese conglomerate Sony. Its flagship products consists of a series of home video game consoles produced under the brand; it also consists ...
, and the
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Macintosh Quadra The Macintosh Quadra is a family of personal computers designed, manufactured and sold by Apple Inc., Apple Computer, Inc. from October 1991 to October 1995. The Quadra, named for the Motorola 68040 central processing unit, replaced the Macintosh ...
series. The method is a form of
ADPCM Adaptive differential pulse-code modulation (ADPCM) is a variant of differential pulse-code modulation (DPCM) that varies the size of the quantization step, to allow further reduction of the required data bandwidth for a given signal-to-noise rati ...
. BRR compresses each consecutive sequence of sixteen 16-bit
PCM Pulse-code modulation (PCM) is a method used to Digital signal (signal processing), digitally represent analog signals. It is the standard form of digital audio in computers, compact discs, digital telephony and other digital audio application ...
samples into a block of 9
byte The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable un ...
s. From most to least significant, the first byte of each block consists of four bits indicating the ''range'' of the block (see below) which controls the size of steps between the 16 possible values such that minute changes can be recorded if the 16 values are closer together but minute changes are lost if the 16 values are far apart, two bits indicating the ''filter'' (see below), and two bits of control information for the SPC700. The remaining eight bytes consist of 16 signed 4-bit nibbles which correspond to the 16 samples, packed in a
big-endian '' Jonathan_Swift.html" ;"title="Gulliver's Travels'' by Jonathan Swift">Gulliver's Travels'' by Jonathan Swift, the novel from which the term was coined In computing, endianness is the order in which bytes within a word (data type), word of d ...
manner. As 32 bytes of input become 9 bytes of output, the BRR algorithm yields a 3.56:1 compression ratio.


Decompression algorithm

A nibble ''n'' in a block with filter f and range r should be decoded into a PCM sample s_t using the following second-order
linear prediction Linear prediction is a mathematical operation where future values of a discrete-time signal are estimated as a linear function of previous samples. In digital signal processing, linear prediction is often called linear predictive coding (LPC) and ...
equation: :s_t = 2^r n + k_1 s_ - k_2 s_ Here, s_ and s_ are the last-output and next-to-last-output PCM samples, respectively. The filter type f is translated into IIR prediction coefficients k using the following table: These calculations are all done in signed 16.16
fixed-point arithmetic In computing, fixed-point is a method of representing fractional (non-integer) numbers by storing a fixed number of digits of their fractional part. Dollar amounts, for example, are often stored with exactly two fractional digits, represen ...
. Or in words: * Filter 0 linearly decodes the r bit downquantized version of the samples. * Filter 1 adds an r bit downquantized version of the samples to a lowered previous input (delta pack or differential coding). * Filters 2 and 3 add an r bit downquantized version of the samples to the linear extrapolation from the last two samples (2nd order differential coding). The coefficients of the above filters are specified as slightly less than 1 or 2 in order to realize a
leaky integrator In mathematics, a leaky integrator equation is a specific differential equation, used to describe a component or system that takes the integral of an input, but gradually leaks a small amount of input over time. It appears commonly in hydraulics ...
that is more resilient to errors in the encoded bitstream. Otherwise, any errors could propagate infinitely, as an
impulse response In signal processing and control theory, the impulse response, or impulse response function (IRF), of a dynamic system is its output when presented with a brief input signal, called an impulse (). More generally, an impulse response is the reac ...
of an ideal integrator is a
step function In mathematics, a function on the real numbers is called a step function if it can be written as a finite linear combination of indicator functions of intervals. Informally speaking, a step function is a piecewise constant function having on ...
. The denominators are powers of 2 to facilitate implementation with bit shifts as opposed to a more expensive hardware multiplier. The PlayStation APU and the Philips CD-i CDIC add another set of coefficients to the above and reorders them, for five unique of 8 filters total (these come from the Green Book and Yellow Book specifications): These calculations are all done in signed 16.16
fixed-point arithmetic In computing, fixed-point is a method of representing fractional (non-integer) numbers by storing a fixed number of digits of their fractional part. Dollar amounts, for example, are often stored with exactly two fractional digits, represen ...
.


References

{{Reflist
SPC 700 Documentation
* US Patent 4,685,115 eginnings of system which became BRR* US Patent 4,783,792 urther development toward BRR* US Patent 4,797,902 RR; example coefficients can be seen on page 21* US Patent 4,829,522 RR with error correction-aware interpolation for reading from a disc medium such as a MiniDisc; the final MiniDisc implementation did not use BRR] * US Patent 5,041,830 [BRR shifting/quantization] * US Patent 5,070,515 [BRR encoding/noise shaping; example coefficients can be seen on page 23] * US Patent 5,086,475 [BRR Looping, pitch/frequency detection for encoding] * US Patent 5,111,530 ather specific patent on the workings of the DSP in the SNES and PlayStation">SNES.html" ;"title="ather specific patent on the workings of the DSP in the SNES">ather specific patent on the workings of the DSP in the SNES and PlayStation APU] * US Patent 5,128,963 [a later patent on the system which became BRR] * US Patent 5,166,981 [Using LPC analysis for assisting in encoding BRR] * US Patent 5,303,374 [Predictive error generator for assisting in encoding BRR; coefficients can be seen on page 6] * US Patent 5,430,241 RR Looping, pitch/frequency detection for encoding, similar to 5,086,475* US Patent 5,519,166 RR Looping, pitch/frequency detection for encoding, continuation of 5,430,241* US Patent 5,978,492 RR in the context of CD-XA on Sony PlayStation">Sony.html" ;"title="RR in the context of CD-XA on Sony">RR in the context of CD-XA on Sony PlayStation ">Sony">RR in the context of CD-XA on Sony PlayStation">Sony.html" ;"title="RR in the context of CD-XA on Sony">RR in the context of CD-XA on Sony PlayStation Digital audio Super Nintendo Entertainment System