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ARM
Instruction Set Simulator An instruction set simulator (ISS) is a simulation model, usually coded in a high-level programming language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent t ...
, also known as ARMulator, is one of the software development tools provided by the development systems business unit of ARM Limited to all users of ARM-based chips. It owes its heritage to the early development of the instruction set by
Sophie Wilson Sophie Mary Wilson (born Roger Wilson; June 1957) is an English computer scientist, who helped design the BBC Micro and ARM architecture. Wilson first designed a microcomputer during a break from studies at Selwyn College, Cambridge. She ...
. Part of this heritage is still visible in the provision of a Tube BBC Micro model in ARMulator.


Features

ARMulator is written in C and provides more than just an instruction set simulator, it provides a virtual platform for system emulation. It comes ready to emulate an ARM processor and certain ARM
coprocessor A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Operations performed by the coprocessor may be floating-point arithmetic, graphics, signal processing, string processing, cryptography or I ...
s. If the processor is part of an
embedded system An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is ''embedded ...
, then licensees may extend ARMulator to add their own implementations of the additional hardware to the ARMulator model. ARMulator provides a number of services to help with the time-based behaviour and event scheduling and ships with examples of memory mapped and co-processor expansions. This way, they can use ARMulator to emulate their entire
embedded system An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is ''embedded ...
. A key limitation for ARMulator is that it can only simulate a single ARM CPU at one time, although almost all ARM cores up to
ARM11 ARM11 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings. The ARM11 core family consists of ARM1136J(F)-S, ARM1156T2(F)-S, ARM1176JZ(F)-S, and ARM11MPCore. Since ARM11 cores were released from 2002 to 2005, they are no lon ...
are available. Performance of ARMulator is good for the technology employed, it's about 1000 host (PC) instructions per ARM instruction. This means that emulated speeds of 1 MHz were normal for PCs of the mid to late 90s. Accuracy is good too, although it is classed as cycle count accurate rather than cycle accurate, this is because the ARM pipeline isn't fully modeled (although register interlocks are). Resolution is to an instruction, as a consequence when single stepping the register interlocks are ignored and different cycle counts are returned than if the program had simply run, this was unavoidable. Testing ARMulator was always a time-consuming challenge, the full ARM architecture validation suites being employed. At over 1 million lines of C code it was a fairly hefty product. ARMulator allows runtime debugging using either armsd (ARM Symbolic Debugger), or either of the graphical debuggers that were shipped in SDT and the later ADS products. ARMulator suffered from being an invisible tool with a text file configuration (armul.conf) that many found complex to configure. ARMulator II formed the basis for the high accuracy, cycle callable co-verification models of ARM processors, these CoVs models (see Cycle Accurate Simulator) were the basis of many CoVerification systems for ARM processors.


Availability

ARMulator was available on a very broad range of platforms through its life, including Mac,
RISC OS RISC OS is a computer operating system originally designed by Acorn Computers Ltd in Cambridge, England. First released in 1987, it was designed to run on the ARM chipset, which Acorn had designed concurrently for use in its new line of Archi ...
platforms,
DEC Alpha Alpha (original name Alpha AXP) is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). Alpha was designed to replace 32-bit VAX complex instruction set compute ...
,
HP-UX HP-UX (from "Hewlett Packard Unix") is Hewlett Packard Enterprise's proprietary implementation of the Unix operating system, based on Unix System V (initially System III) and first released in 1984. Current versions support HPE Integrity Se ...
, Solaris,
SunOS SunOS is a Unix-branded operating system developed by Sun Microsystems for their workstation and server computer systems. The ''SunOS'' name is usually only used to refer to versions 1.0 to 4.1.4, which were based on BSD, while versions 5.0 an ...
,
Windows Windows is a group of several proprietary graphical operating system families developed and marketed by Microsoft. Each family caters to a certain sector of the computing industry. For example, Windows NT for consumers, Windows Server for se ...
,
Linux Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, whi ...
. In the mid-1990s there was reluctance to support Windows platforms; pre-Windows 95 it was a relatively challenging platform. Through the late 1990s and early 2000s support was removed for all but Solaris, Windows and Linux - although undoubtedly the code base remains littered with pragmas such as #ifdef RISCOS. ARMulator II shipped in early ARM toolkits as well as the later SDT 2.5, SDT 2.5.1, ADS 1.0, ADS 1.1, ADS 1.2, RCVT 1.0 and also separately as RVISS. Special models were produced during the development of CPUs, notably the
ARM9E ARM9 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings for microcontroller use. The ARM9 core family consists of ARM9TDMI, ARM940T, ARM9E-S, ARM966E-S, ARM920T, ARM922T, ARM946E-S, ARM9EJ-S, ARM926EJ-S, ARM968E-S, ARM99 ...
, ARM10 and
ARM11 ARM11 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings. The ARM11 core family consists of ARM1136J(F)-S, ARM1156T2(F)-S, ARM1176JZ(F)-S, and ARM11MPCore. Since ARM11 cores were released from 2002 to 2005, they are no lon ...
, these models helped with architectural decisions such as Thumb-2 and TrustZone. ARMulator has been gradually phased out and has been replaced by
Just-in-time compilation In computing, just-in-time (JIT) compilation (also dynamic translation or run-time compilations) is a way of executing computer code that involves compilation during execution of a program (at run time) rather than before execution. This may co ...
-based high performance CPU and system models (See FastSim link below). ARMulator I was made open source and is the basis for the GNU version of ARMulator. Key differences are in the memory interface and services, also the instruction decode is done differently. The GNU ARMulator is available as part of the GDB debugger in the ARM GNU Tools. ARMulator II formed the basis for the high accuracy, cycle callable co-verification models of ARM processors, these CoVs models (see Cycle Accurate Simulator) were the basis of many CoVerification systems for ARM processors. Mentor Graphic's Seamless have the market leading CoVs system that supports many ARM cores, and many other CPUs. ARMulator II shipped in early ARM toolkits as well as the later SDT 2.5, SDT 2.5.1, ADS 1.0, ADS 1.1, ADS 1.2, RVCT 1.0 and also separately as RVISS. Key contributors to ARMulator II were Mike Williams, Louise Jameson, Charles Lavender, Donald Sinclair, Chris Lamb and Rebecca Bryan (who worked on ARMulator as both an engineer and later as product manager). Significant input was also made by Allan Skillman, who was working on ARM CoVerification models at the time. A key contributor to ARMulator I was
Dave Jaggar David Jaggar (born 4 February 1967) is a computer scientist who was responsible for the development of the ARM architecture between 1992 and 2000, redefining it from a low-cost workstation processor to the dominant embedded system processor. ...
. Special models were produced during the development of CPUs, notably the ARM9E, ARM10 and ARM11, these models helped with architectural decisions such as Thumb-2 and TrustZone.


See also

*
ARM architecture ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured ...
* Computer architecture simulator * OVPsim *
Qemu QEMU is a free and open-source emulator (Quick EMUlator). It emulates the machine's central processing unit, processor through dynamic binary translation and provides a set of different hardware and device models for the machine, enabling it t ...
*
Simics Simics is a full-system simulator or virtual platform used to run unchanged production binaries of the target hardware. Simics was originally developed by the Swedish Institute of Computer Science (SICS), and then spun off to Virtutech for commer ...


References


External links


Official ARMulator information

uClinux GDB ARMulator homepage



Mentor's Seamless homepage

Imperas' homepage : developer of suite of embedded software tools using virtual platform models of the ARM cores

ARM Fast Models Documentation (FastSim)

Red Squirrel Acorn Archimedes Emulator

A list of open source ARM emulators

GNU Debugger
{{DEFAULTSORT:Armulator ARM architecture Free simulation software Year of introduction missing