|
GNU Debugger
The GNU Debugger (GDB) is a portable debugger that runs on many Unix-like systems and works for many programming languages, including Ada, C, C++, Objective-C, Free Pascal, Fortran, Go, and partially others. History GDB was first written by Richard Stallman in 1986 as part of his GNU system, after his GNU Emacs was "reasonably stable". GDB is free software released under the GNU General Public License (GPL). It was modeled after the DBX debugger, which came with Berkeley Unix distributions. From 1990 to 1993 it was maintained by John Gilmore. Now it is maintained by the GDB Steering Committee which is appointed by the Free Software Foundation. Technical details Features GDB offers extensive facilities for tracing and altering the execution of computer programs. The user can monitor and modify the values of programs' internal variables, and even call functions independently of the program's normal behavior. GDB target processors (as of 2003) include: Alpha, ARM, AVR, H8 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
GNU Project
The GNU Project () is a free software, mass collaboration project announced by Richard Stallman on September 27, 1983. Its goal is to give computer users freedom and control in their use of their computers and computing devices by collaboratively developing and publishing software that gives everyone the rights to freely run the software, copy and distribute it, study it, and modify it. GNU software grants these rights in its license. In order to ensure that the ''entire'' software of a computer grants its users all freedom rights (use, share, study, modify), even the most fundamental and important part, the operating system (including all its numerous utility programs) needed to be free software. According to its manifesto, the founding goal of the project was to build a free operating system, and if possible, "everything useful that normally comes with a Unix system so that one could get along without any software that is not free." Stallman decided to call this operating sy ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Dbx (debugger)
dbx is a source-level debugger found primarily on Solaris, AIX, IRIX, Tru64 UNIX, Linux and BSD operating systems. It provides symbolic debugging for programs written in C, C++, Fortran, Pascal and Java. Useful features include stepping through programs one source line or machine instruction at a time. In addition to simply viewing operation of the program, variables can be manipulated and a wide range of expressions can be evaluated and displayed. History dbx was originally developed at University of California, Berkeley, by Mark Linton during the years 1981–1984 and subsequently made its way to various vendors who had licensed BSD. Availability Besides being provided to various vendors through BSD, dbx has also found its way into other products: * dbx is also available on IBM z/OS systems, in the UNIX System Services component. dbx for z/OS can debug programs written in C and C++, and can also perform machine level debugging. As of z/OS V1R5, dbx is ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
X86-64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mode. With 64-bit mode and the new paging mode, it supports vastly larger amounts of virtual memory and physical memory than was possible on its 32-bit predecessors, allowing programs to store larger amounts of data in memory. x86-64 also expands general-purpose registers to 64-bit, and expands the number of them from 8 (some of which had limited or fixed functionality, e.g. for stack management) to 16 (fully general), and provides numerous other enhancements. Floating-point arithmetic is supported via mandatory SSE2-like instructions, and x87/ MMX style registers are generally not used (but still available even in 64-bit mode); instead, a set of 16 vector registers, 128 bits each, is used. (Each register can store one or two double-preci ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System 390
The IBM System/390 is a discontinued mainframe product family implementing the ESA/390, the fifth generation of the System/360 instruction set architecture. The first computers to use the ESA/390 were the Enterprise System/9000 (ES/9000) family, which were introduced in 1990. These were followed by the 9672, Multiprise, and Integrated Server families of System/390 in 1994–1999, using CMOS microprocessors. The ESA/390 succeeded the ESA/370 used in the Enhanced 3090 and 4381 "E" models, and the System/370 architecture last used in the IBM 9370 low-end mainframe. The ESA/390 was succeeded by the 64-bit z/Architecture in 2000. History On February 15, 1988, IBM announced Enterprise Systems Architecture/370 (ESA/370) for 3090 enhanced ("E") models and for 4381 model groups 91E and 92E. In additional to the primary and secondary addressing modes that System/370 Extended Architecture (S/370-XA) supports, ESA has an access register mode in which each use of general register ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System/370
The IBM System/370 (S/370) is a model range of IBM mainframe computers announced on June 30, 1970, as the successors to the System/360 family. The series mostly maintains backward compatibility with the S/360, allowing an easy migration path for customers; this, plus improved performance, were the dominant themes of the product announcement. In September 1990, the System/370 line was replaced with the System/390. Evolution The original System/370 line was announced on June 30, 1970, with first customer shipment of the Models 155 and 165 planned for February 1971 and April 1971 respectively. The 155 first shipped in January 1971. System/370 underwent several architectural improvements during its roughly 20-year lifetime. The following features mentioned in Principles of Operation are either optional on S/360 but standard on S/370, introduced with S/370 or added to S/370 after announcement. *Branch and Save *Channel Indirect Data Addressing *Channel-Set Switching *Clear I/O *Co ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Altera Nios/Nios II
Altera Corporation was a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015. The main product lines from Altera were the flagship Stratix series, mid-range Arria series, and lower-cost Cyclone series system on a chip field-programmable gate arrays (FPGAs); the MAX series complex programmable logic device and non-volatile FPGAs; Quartus design software; and Enpirion PowerSoC DC-DC power solutions. The company was founded in 1983 by semiconductor veterans Rodney Smith, Robert Hartmann, James Sansbury, and Paul Newhagen with $500,000 in seed money. The name of the company was a play on "alterable", the type of chips the company created. In 1984, the company formed a long-running design partnership with Intel, and 1988, became a public company via an initial public offering. In 1994, Altera acquired the PLD business of Intel for $50 million. On December 28, 2015, the company was acquired by ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Hitachi H8
H8 is the name of a large family of 8-bit, 16-bit and 32-bit microcontrollers made by Renesas Technology, originating in the early 1990s within Hitachi Semiconductor. An administrator on the Renesas user community boards commented in 2011 that there are no plans for further development of H8 based products. The family of largely CISC machines is unrelated to the higher-performance SuperH family of 32-bit RISC-like microcontrollers. It was supported in the Linux kernel starting with version 4.2 but support was removed in version 5.19. Variants Subfamilies include the 8/16-bit H8/300 and H8/500, the 16/32-bit H8/300H and H8S and the 32-bit H8SX series, each with dozens of different variants, varying by speed, selection of built-in peripherals such as timers and serial ports, and amounts of ROM, flash memory and RAM. Built-in ROM and flash memory tends to range from 16 KB to 1024 KB, and RAM from 512 B to 512 KB. The basic architecture of the H8 is patterne ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Atmel AVR
AVR is a family of microcontrollers developed since 1996 by Atmel, acquired by Microchip Technology in 2016. These are modified Harvard architecture 8-bit Reduced instruction set computer, RISC single-chip microcontrollers. AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to Programmable read-only memory, one-time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time. AVR microcontrollers find many applications as embedded systems. They are especially common in hobbyist and educational embedded applications, popularized by their inclusion in many of the Arduino line of open hardware development boards. History The AVR architecture was conceived by two students at the Norwegian Institute of Technology (NTH), Alf-Egil Bogen and Vegard Wollan.Archived aGhostarchiveand thWayback Machine Atmel says that the name AVR is not an acronym and does not stand for anything in particular. The creators of ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ARM Architecture Family
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for central processing unit, computer processors, configured for various environments. Arm (company), Arm Ltd. develops the architectures and licenses them to other companies, who design their own products that implement one or more of those architectures, including system on a chip (SoC) and system on module (SOM) designs, that incorporate different components such as memory, interfaces, and radio#Radio communication, radios. It also designs semiconductor intellectual property core, cores that implement these instruction set architectures and licenses these designs to many companies that incorporate those core designs into their own products. There have been several generations of the ARM design. The original ARM1 used a 32-bit computing, 32-bit internal structure but had a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
DEC Alpha
Alpha (original name Alpha AXP) is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). Alpha was designed to replace 32-bit VAX complex instruction set computers (CISC) and to be a highly competitive RISC processor for Unix workstations and similar markets. Alpha is implemented in a series of microprocessors originally developed and fabricated by DEC. These microprocessors are most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards. Operating systems that support Alpha included OpenVMS (formerly named OpenVMS AXP), Tru64 UNIX (formerly named DEC OSF/1 AXP and Digital UNIX), Windows NT (discontinued after NT 4.0; and prerelease Windows 2000 RC2), Linux ( Debian, SUSE, Gentoo and Red Hat), BSD UNIX ( Ne ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Subroutine
In computer programming, a function or subroutine is a sequence of program instructions that performs a specific task, packaged as a unit. This unit can then be used in programs wherever that particular task should be performed. Functions may be defined within programs, or separately in libraries that can be used by many programs. In different programming languages, a function may be called a routine, subprogram, subroutine, method, or procedure. Technically, these terms all have different definitions, and the nomenclature varies from language to language. The generic umbrella term ''callable unit'' is sometimes used. A function is often coded so that it can be started several times and from several places during one execution of the program, including from other functions, and then branch back (''return'') to the next instruction after the ''call'', once the function's task is done. The idea of a subroutine was initially conceived by John Mauchly during his work on ENIAC, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Variable (programming)
In computer programming, a variable is an abstract storage location paired with an associated symbolic name, which contains some known or unknown quantity of information referred to as a ''value''; or in simpler terms, a variable is a named container for a particular set of bits or type of data (like integer, float, string etc...). A variable can eventually be associated with or identified by a memory address. The variable name is the usual way to reference the stored value, in addition to referring to the variable itself, depending on the context. This separation of name and content allows the name to be used independently of the exact information it represents. The identifier in computer source code can be bound to a value during run time, and the value of the variable may thus change during the course of program execution. Variables in programming may not directly correspond to the concept of variables in mathematics. The latter is abstract, having no reference to a physi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
_Cyclone_III_(cropped).jpg "Click for more on -> Altera Nios/Nios II")
.JPG "Click for more on -> Hitachi H8")
